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FAILED: patch "[PATCH] drm/amd/powerplay: map mclk to fclk for COMBINATIONAL_BYPASS" failed to apply to 5.5-stable tree

PATCH [email protected] 3 participants 3 messages Mar 9, 2020 – Mar 10, 2020

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Stable branch DRM drivers Radeon and amdgpu DRM drivers
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author maintainer
#0 lore raw

The patch below does not apply to the 5.5-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From ab65a371dd5f5cba6bd9a58a1a6d4115a71cc5c9 Mon Sep 17 00:00:00 2001
From: Prike Liang <[email protected]>
Date: Wed, 4 Mar 2020 10:36:21 +0800
Subject: [PATCH] drm/amd/powerplay: map mclk to fclk for COMBINATIONAL_BYPASS
case

When hit COMBINATIONAL_BYPASS the mclk will be bypass and can export fclk frequency to user usage.

Signed-off-by Prike Liang <[email protected]>
Reviewed-by Evan Quan <[email protected]>
Signed-off-by Alex Deucher <[email protected]>
Cc [email protected]
drivers/gpu/drm/amd/powerplay/renoir_ppt.c +3 -3
index 861e6410363b..568c041c2206 100644
@@ -111,8 +111,8 @@ static struct smu_12_0_cmn2aisc_mapping renoir_clk_map[SMU_CLK_COUNT] = {
 	CLK_MAP(GFXCLK, CLOCK_GFXCLK),
 	CLK_MAP(SCLK,	CLOCK_GFXCLK),
 	CLK_MAP(SOCCLK, CLOCK_SOCCLK),
-	CLK_MAP(UCLK, CLOCK_UMCCLK),
-	CLK_MAP(MCLK, CLOCK_UMCCLK),
+	CLK_MAP(UCLK, CLOCK_FCLK),
+	CLK_MAP(MCLK, CLOCK_FCLK),
 };
 
 static struct smu_12_0_cmn2aisc_mapping renoir_table_map[SMU_TABLE_COUNT] = {

@@ -280,7 +280,7 @@ static int renoir_print_clk_levels(struct smu_context *smu,
 		break;
 	case SMU_MCLK:
 		count = NUM_MEMCLK_DPM_LEVELS;
-		cur_value = metrics.ClockFrequency[CLOCK_UMCCLK];
+		cur_value = metrics.ClockFrequency[CLOCK_FCLK];
 		break;
 	case SMU_DCEFCLK:
 		count = NUM_DCFCLK_DPM_LEVELS;
maintainer
#1 lore raw
Quoted 18 lines · On Mon, Mar 09, 2020 at 08:32:45PM +0100, [email protected] wrote:

The patch below does not apply to the 5.5-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From ab65a371dd5f5cba6bd9a58a1a6d4115a71cc5c9 Mon Sep 17 00:00:00 2001
From: Prike Liang <[email protected]>
Date: Wed, 4 Mar 2020 10:36:21 +0800
Subject: [PATCH] drm/amd/powerplay: map mclk to fclk for COMBINATIONAL_BYPASS case

Quoted 7 lines

When hit COMBINATIONAL_BYPASS the mclk will be bypass and can export fclk frequency to user usage.

Signed-off-by Prike Liang <[email protected]>
Reviewed-by Evan Quan <[email protected]>
Signed-off-by Alex Deucher <[email protected]>
Cc [email protected]

Is it actually needed anywhere without 0b97bd6cde1d ("drm/amd/powerplay:
implement interface to retrieve clock freq for renoir")?

Signature · 2 lines
Thanks,
Sasha
#2 lore raw
Quoted 36 lines

-----Original Message-----
From: Sasha Levin <[email protected]>
Sent: Tuesday, March 10, 2020 8:28 AM
To: [email protected]
Cc: Liang, Prike <[email protected]>; Deucher, Alexander <[email protected]>; Quan, Evan <[email protected]>; [email protected]
Subject: Re: FAILED: patch "[PATCH] drm/amd/powerplay: map mclk to fclk for COMBINATIONAL_BYPASS" failed to apply to 5.5-stable tree

Quoted 6 lines · On Mon, Mar 09, 2020 at 08:32:45PM +0100, [email protected] wrote:

The patch below does not apply to the 5.5-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

Quoted 7 lines

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From ab65a371dd5f5cba6bd9a58a1a6d4115a71cc5c9 Mon Sep 17 00:00:00

2001

Quoted 8 lines

From: Prike Liang <[email protected]>
Date: Wed, 4 Mar 2020 10:36:21 +0800
Subject: [PATCH] drm/amd/powerplay: map mclk to fclk for COMBINATIONAL_BYPASS case

When hit COMBINATIONAL_BYPASS the mclk will be bypass and can export fclk frequency to user usage.

Quoted 8 lines
Quoted 4 lines
Signed-off-by Prike Liang <[email protected]>
Reviewed-by Evan Quan <[email protected]>
Signed-off-by Alex Deucher <[email protected]>
Cc [email protected]

Is it actually needed anywhere without 0b97bd6cde1d ("drm/amd/powerplay:
implement interface to retrieve clock freq for renoir")?

[Prike] Besides the read sensor interface for debugsfs of amdgpu_pm_info needed, the sysfs of pp_dpm_mclk also need the fix for mclk.

Quoted 4 lines

--
Thanks,
Sasha