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arm64: dts: sc7180: modify assigned clocks for sc7180 target

PATCH Superseded Krishna Manikandan 2 participants 2 messages Mar 16, 2020 – Mar 19, 2020

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Krishna Manikandan

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#0 lore raw

PATCH v2 1/1 arm64: dts: sc7180: modify assigned clocks for sc7180 target

Add DISP_CC_MDSS_ROT_CLK and DISP_CC_MDSS_AHB_CLK
in the assigned clocks list for sc7180 target.

Signed-off-by Krishna Manikandan <[email protected]>
---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/sc7180.dtsi +5 -1
index 998f101..e3b60f1 100644
@@ -1544,8 +1544,12 @@
 				clock-names = "iface", "rot", "lut", "core",
 					      "vsync";
 				assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
-						  <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+						  <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
+						  <&dispcc DISP_CC_MDSS_ROT_CLK>,
+						  <&dispcc DISP_CC_MDSS_AHB_CLK>;
 				assigned-clock-rates = <300000000>,
+						       <19200000>,
+						       <19200000>,
 						       <19200000>;
 
 				interrupt-parent = <&mdss>;
Signature · 1 line
1.9.1
#1 lore raw

Subject could be "sc7180: update DPU assigned clocks"

Quoting Krishna Manikandan (2020-03-16 04:02:42)

Quoted 2 lines

Add DISP_CC_MDSS_ROT_CLK and DISP_CC_MDSS_AHB_CLK
in the assigned clocks list for sc7180 target.

Why?

Quoted 2 lines
Signed-off-by Krishna Manikandan <[email protected]>

Does this need a Fixes: tag?

Quoted 22 lines
---
 arch/arm64/boot/dts/qcom/sc7180.dtsi | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/qcom/sc7180.dtsi +5 -1
index 998f101..e3b60f1 100644
@@ -1544,8 +1544,12 @@
                                clock-names = "iface", "rot", "lut", "core",
                                              "vsync";
                                assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
-                                                 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
+                                                 <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
+                                                 <&dispcc DISP_CC_MDSS_ROT_CLK>,
+                                                 <&dispcc DISP_CC_MDSS_AHB_CLK>;
                                assigned-clock-rates = <300000000>,
+                                                      <19200000>,
+                                                      <19200000>,
                                                       <19200000>;
 
                                interrupt-parent = <&mdss>;