clk: ls1b200: add clk driver for loongson 1b
Subsystems (2)
PATCH 1/1 clk: ls1b200: add clk driver for loongson 1b
add "pll" and "oscillator" node to devicetree.
Signed-off-by Du Huanpeng <[email protected]>
--- arch/mips/Kconfig | 9 ++ arch/mips/dts/loongson-ls1b.dts | 6 ++ arch/mips/dts/ls1b.dtsi | 9 ++ drivers/clk/Makefile | 1 + drivers/clk/loongson/Makefile | 2 + drivers/clk/loongson/clk-ls1b200.c | 154 +++++++++++++++++++++++++++++++ dts/include/dt-bindings/clock/ls1b-clk.h | 21 +++++ 7 files changed, 202 insertions(+) create mode 100644 drivers/clk/loongson/Makefile create mode 100644 drivers/clk/loongson/clk-ls1b200.c create mode 100644 dts/include/dt-bindings/clock/ls1b-clk.h
arch/mips/Kconfig +9 -0
@@ -118,6 +118,15 @@ config MACH_MIPS_BCM47XX config MACH_MIPS_LOONGSON bool "Loongson-based boards" + select SYS_HAS_CPU_MIPS32_R2 + select SYS_SUPPORTS_32BIT_KERNEL + select CSRC_R4K_LIB + select HAS_DEBUG_LL + select COMMON_CLK + select COMMON_CLK_OF_PROVIDER + select CLKDEV_LOOKUP + select OFTREE + select GPIOLIB config MACH_MIPS_XBURST bool "Ingenic XBurst-based boards"
arch/mips/dts/loongson-ls1b.dts +6 -0
@@ -6,6 +6,12 @@ model = "Loongson Tech LS1B Demo Board"; compatible = "loongson,ls1b"; + oscillator: oscillator { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <33000000>; + }; + memory@0 { device_type = "memory"; reg = <0x00000000 0x4000000>;
arch/mips/dts/ls1b.dtsi +9 -0
@@ -1,3 +1,5 @@ +#include <dt-bindings/clock/ls1b-clk.h> + / { #address-cells = <1>; #size-cells = <1>;
@@ -40,5 +42,12 @@ clock-frequency = <83000000>; status = "disabled"; }; + + pll: pll@1fe78030 { + compatible = "loongson,ls1b-pll"; + #clock-cells = <1>; + reg = <0x1fe78030 0x8>; + clocks = <&oscillator>; + }; }; };
drivers/clk/Makefile +1 -0
@@ -19,4 +19,5 @@ obj-$(CONFIG_ARCH_IMX) += imx/ obj-$(CONFIG_COMMON_CLK_AT91) += at91/ obj-$(CONFIG_ARCH_STM32MP) += clk-stm32mp1.o obj-$(CONFIG_MACH_VEXPRESS) += vexpress/ +obj-$(CONFIG_MACH_MIPS_LOONGSON)+= loongson/ obj-$(CONFIG_ARCH_LAYERSCAPE) += clk-qoric.o
drivers/clk/loongson/Makefile new file +2 -0
@@ -0,0 +1,2 @@ +obj-$(CONFIG_BOARD_LOONGSON_TECH_LS1B) += clk-ls1b200.o +
drivers/clk/loongson/clk-ls1b200.c new file +154 -0
154 lines not on this page · raw message
dts/include/dt-bindings/clock/ls1b-clk.h new file +21 -0
@@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* +* Copyright (C) 2020 Du Huanpeng <[email protected]> +*/ + +#ifndef __DT_BINDINGS_LS1B_CLK_H +#define __DT_BINDINGS_LS1B_CLK_H + +#define LS1B_CLK_PLL 0 +#define LS1B_CLK_CPU_DIV 1 +#define LS1B_CLK_CPU_MUX 2 +#define LS1B_CLK_DDR_DIV 3 +#define LS1B_CLK_DDR_MUX 4 +#define LS1B_CLK_APB_DIV 5 +#define LS1B_CLK_DC_DIV 6 +#define LS1B_CLK_DIV4 7 +#define LS1B_CLK_DC_MUX 8 + +#define LS1B_CLK_END 9 + +#endif /* __DT_BINDINGS_LS1B_CLK_H */
Signature · 7 lines
2.7.4 _______________________________________________ barebox mailing list [email protected] http://lists.infradead.org/mailman/listinfo/barebox
Quoted 3 lines · On Wed, 28 Oct 2020 19:49:52 +0800 Du Huanpeng <[email protected]> wrote:
add "pll" and "oscillator" node to devicetree.
Signed-off-by Du Huanpeng <[email protected]>
...
Quoted 7 lines
arch/mips/Kconfig +0
-0@@ -118,6 +118,15 @@ config MACH_MIPS_BCM47XX config MACH_MIPS_LOONGSON
arch/mips/Kconfig config MACH_MIPS_BCM47XX · line 129
Quoted 10 lines
arch/mips/Kconfig +9
-0bool "Loongson-based boards" + select SYS_HAS_CPU_MIPS32_R2 + select SYS_SUPPORTS_32BIT_KERNEL + select CSRC_R4K_LIB + select HAS_DEBUG_LL + select COMMON_CLK + select COMMON_CLK_OF_PROVIDER + select CLKDEV_LOOKUP + select OFTREE + select GPIOLIB
I suppose that arch/mips/ changes should go to a separate patch. E.g.:
* PATCH 001: clk: ls1b200: add clk driver for loongson 1b
* PATCH 002: MIPS: ls1b200: use clk driver
Quoted 67 lines
arch/mips/Kconfig +0
-0config MACH_MIPS_XBURST bool "Ingenic XBurst-based boards"arch/mips/dts/loongson-ls1b.dts +6
-0@@ -6,6 +6,12 @@ model = "Loongson Tech LS1B Demo Board"; compatible = "loongson,ls1b"; + oscillator: oscillator { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <33000000>; + }; + memory@0 { device_type = "memory"; reg = <0x00000000 0x4000000>;arch/mips/dts/ls1b.dtsi +9
-0@@ -1,3 +1,5 @@ +#include <dt-bindings/clock/ls1b-clk.h> + / { #address-cells = <1>; #size-cells = <1>;@@ -40,5 +42,12 @@ clock-frequency = <83000000>; status = "disabled"; }; + + pll: pll@1fe78030 { + compatible = "loongson,ls1b-pll"; + #clock-cells = <1>; + reg = <0x1fe78030 0x8>; + clocks = <&oscillator>; + }; }; };drivers/clk/Makefile +1
-0@@ -19,4 +19,5 @@ obj-$(CONFIG_ARCH_IMX) += imx/ obj-$(CONFIG_COMMON_CLK_AT91) += at91/ obj-$(CONFIG_ARCH_STM32MP) += clk-stm32mp1.o obj-$(CONFIG_MACH_VEXPRESS) += vexpress/ +obj-$(CONFIG_MACH_MIPS_LOONGSON)+= loongson/ obj-$(CONFIG_ARCH_LAYERSCAPE) += clk-qoric.odrivers/clk/loongson/Makefile new file +2
-0@@ -0,0 +1,2 @@ +obj-$(CONFIG_BOARD_LOONGSON_TECH_LS1B) += clk-ls1b200.o +drivers/clk/loongson/clk-ls1b200.c new file +0
-0
drivers/clk/loongson/clk-ls1b200.c line 6
Quoted 6 lines
drivers/clk/loongson/clk-ls1b200.c new file +6
-0@@ -0,0 +1,154 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* +* Copyright (C) 2014 Antony Pavlov <[email protected]> +* Copyright (C) 2020 Du Huanpeng <[email protected]> +* +* Based on the Linux ath79 clock code
Thanks for mentioning me, but I have not contributed to clk-ls1b200.c :)
Could you please remove my copyright and just write "Based on the ath79 clock code by Antony Pavlov...".
Signature · 7 lines
Best regards, Antony Pavlov _______________________________________________ barebox mailing list [email protected] http://lists.infradead.org/mailman/listinfo/barebox