add clk driver for loongson ls1b200
Subsystems (2)
cover add clk driver for loongson ls1b200
add clk driver and switch serials to clk privider from fixed clock.
Du Huanpeng (3):
MIPS: ls1b: enable clk driver framework support
clk: ls1b200: add clk driver for loongson 1b
MIPS: ls1b200: use clk driver
arch/mips/Kconfig | 3 + arch/mips/dts/loongson-ls1b.dts | 6 ++ arch/mips/dts/ls1b.dtsi | 17 +++- drivers/clk/Makefile | 1 + drivers/clk/loongson/Makefile | 2 + drivers/clk/loongson/clk-ls1b200.c | 151 +++++++++++++++++++++++++++++++ dts/include/dt-bindings/clock/ls1b-clk.h | 21 +++++ 7 files changed, 197 insertions(+), 4 deletions(-) create mode 100644 drivers/clk/loongson/Makefile create mode 100644 drivers/clk/loongson/clk-ls1b200.c create mode 100644 dts/include/dt-bindings/clock/ls1b-clk.h
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PATCH 1/3 MIPS: ls1b: enable clk driver framework support
enable it and so we can add clk driver.
Signed-off-by Du Huanpeng <[email protected]>
--- arch/mips/Kconfig | 2 ++ 1 file changed, 2 insertions(+)
arch/mips/Kconfig +2 -0
@@ -175,6 +175,8 @@ config CPU_LOONGSON1B bool "Loongson 1B" depends on SYS_HAS_CPU_LOONGSON1B select CPU_GS232 + select CLKDEV_LOOKUP + select COMMON_CLK help The Loongson 1B is a 32-bit SoC, which implements the MIPS32 release 2 instruction set.
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Sascha Hauer
AppliedRe: [PATCH 1/3] MIPS: ls1b: enable clk driver framework support
Quoted 6 lines · Du Huanpeng
enable it and so we can add clk driver.
Signed-off-by Du Huanpeng <[email protected]>--- arch/mips/Kconfig | 2 ++ 1 file changed, 2 insertions(+)
Applied, thanks
Sascha
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PATCH 2/3 clk: ls1b200: add clk driver for loongson 1b
In reply to Du Huanpengadd "pll" and "oscillator" node to devicetree.
Signed-off-by Du Huanpeng <[email protected]>
--- arch/mips/dts/loongson-ls1b.dts | 6 ++ arch/mips/dts/ls1b.dtsi | 9 ++ drivers/clk/Makefile | 1 + drivers/clk/loongson/Makefile | 2 + drivers/clk/loongson/clk-ls1b200.c | 151 +++++++++++++++++++++++++++++++ dts/include/dt-bindings/clock/ls1b-clk.h | 21 +++++ 6 files changed, 190 insertions(+) create mode 100644 drivers/clk/loongson/Makefile create mode 100644 drivers/clk/loongson/clk-ls1b200.c create mode 100644 dts/include/dt-bindings/clock/ls1b-clk.h
arch/mips/dts/loongson-ls1b.dts +6 -0
@@ -6,6 +6,12 @@ model = "Loongson Tech LS1B Demo Board"; compatible = "loongson,ls1b"; + oscillator: oscillator { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <33000000>; + }; + memory@0 { device_type = "memory"; reg = <0x00000000 0x4000000>;
arch/mips/dts/ls1b.dtsi +9 -0
@@ -1,3 +1,5 @@ +#include <dt-bindings/clock/ls1b-clk.h> + / { #address-cells = <1>; #size-cells = <1>;
@@ -40,5 +42,12 @@ clock-frequency = <83000000>; status = "disabled"; }; + + pll: pll@1fe78030 { + compatible = "loongson,ls1b-pll"; + #clock-cells = <1>; + reg = <0x1fe78030 0x8>; + clocks = <&oscillator>; + }; }; };
drivers/clk/Makefile +1 -0
@@ -19,4 +19,5 @@ obj-$(CONFIG_ARCH_IMX) += imx/ obj-$(CONFIG_COMMON_CLK_AT91) += at91/ obj-$(CONFIG_ARCH_STM32MP) += clk-stm32mp1.o obj-$(CONFIG_MACH_VEXPRESS) += vexpress/ +obj-$(CONFIG_MACH_MIPS_LOONGSON)+= loongson/ obj-$(CONFIG_ARCH_LAYERSCAPE) += clk-qoric.o
drivers/clk/loongson/Makefile new file +2 -0
@@ -0,0 +1,2 @@ +obj-$(CONFIG_BOARD_LOONGSON_TECH_LS1B) += clk-ls1b200.o +
drivers/clk/loongson/clk-ls1b200.c new file +151 -0
151 lines not on this page · raw message
dts/include/dt-bindings/clock/ls1b-clk.h new file +21 -0
@@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* +* Copyright (C) 2020 Du Huanpeng <[email protected]> +*/ + +#ifndef __DT_BINDINGS_LS1B_CLK_H +#define __DT_BINDINGS_LS1B_CLK_H + +#define LS1B_CLK_PLL 0 +#define LS1B_CLK_CPU_DIV 1 +#define LS1B_CLK_CPU_MUX 2 +#define LS1B_CLK_DDR_DIV 3 +#define LS1B_CLK_DDR_MUX 4 +#define LS1B_CLK_APB_DIV 5 +#define LS1B_CLK_DC_DIV 6 +#define LS1B_CLK_DIV4 7 +#define LS1B_CLK_DC_MUX 8 + +#define LS1B_CLK_END 9 + +#endif /* __DT_BINDINGS_LS1B_CLK_H */
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PATCH 3/3 MIPS: ls1b200: use clk driver
In reply to Du Huanpengswitch the clock source of serials to clk provider.
Signed-off-by Du Huanpeng <[email protected]>
--- arch/mips/Kconfig | 1 + arch/mips/dts/ls1b.dtsi | 8 ++++---- 2 files changed, 5 insertions(+), 4 deletions(-)
arch/mips/Kconfig +1 -0
@@ -177,6 +177,7 @@ config CPU_LOONGSON1B select CPU_GS232 select CLKDEV_LOOKUP select COMMON_CLK + select COMMON_CLK_OF_PROVIDER help The Loongson 1B is a 32-bit SoC, which implements the MIPS32 release 2 instruction set.
arch/mips/dts/ls1b.dtsi +4 -4
@@ -15,7 +15,7 @@ compatible = "ns16550a"; reg = <0x1fe40000 0x8>; reg-shift = <0>; - clock-frequency = <83000000>; + clocks = <&pll LS1B_CLK_APB_DIV>; status = "disabled"; };
@@ -23,7 +23,7 @@ compatible = "ns16550a"; reg = <0x1fe44000 0x8>; reg-shift = <0>; - clock-frequency = <83000000>; + clocks = <&pll LS1B_CLK_APB_DIV>; status = "disabled"; };
@@ -31,7 +31,7 @@ compatible = "ns16550a"; reg = <0x1fe48000 0x8>; reg-shift = <0>; - clock-frequency = <83000000>; + clocks = <&pll LS1B_CLK_APB_DIV>; status = "disabled"; };
@@ -39,7 +39,7 @@ compatible = "ns16550a"; reg = <0x1fe4c000 0x8>; reg-shift = <0>; - clock-frequency = <83000000>; + clocks = <&pll LS1B_CLK_APB_DIV>; status = "disabled"; };
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