Linux 5.4.79
Greg Kroah-Hartman
maintainerI'm announcing the release of the 5.4.79 kernel.
All users of the 5.4 kernel series must upgrade.
The updated 5.4.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git linux-5.4.y
and can be browsed at the normal kernel.org git web browser:
https://git.kernel.org/?p=linux/kernel/git/stable/linux-stable.git;a=summary
thanks,
greg k-h
------------
Documentation/admin-guide/kernel-parameters.txt | 7 Makefile | 2 arch/mips/pci/pci-xtalk-bridge.c | 2 arch/powerpc/include/asm/book3s/64/kup-radix.h | 29 +-- arch/powerpc/include/asm/exception-64s.h | 12 + arch/powerpc/include/asm/feature-fixups.h | 19 + arch/powerpc/include/asm/kup.h | 27 ++ arch/powerpc/include/asm/security_features.h | 7 arch/powerpc/include/asm/setup.h | 4 arch/powerpc/kernel/exceptions-64s.S | 88 ++++----- arch/powerpc/kernel/head_8xx.S | 14 - arch/powerpc/kernel/setup_64.c | 122 ++++++++++++ arch/powerpc/kernel/vmlinux.lds.S | 14 + arch/powerpc/lib/feature-fixups.c | 104 ++++++++++ arch/powerpc/platforms/powernv/setup.c | 17 + arch/powerpc/platforms/pseries/setup.c | 8 arch/x86/kvm/emulate.c | 8 drivers/acpi/evged.c | 2 drivers/input/keyboard/sunkbd.c | 41 +++- drivers/net/ethernet/lantiq_xrx200.c | 2 drivers/net/ethernet/mellanox/mlx5/core/cmd.c | 109 ++++++++++- drivers/net/ethernet/mellanox/mlx5/core/eq.c | 157 +++++++++------- drivers/net/ethernet/mellanox/mlx5/core/lib/eq.h | 2 include/linux/mlx5/driver.h | 6 net/can/proc.c | 6 net/mac80211/sta_info.c | 18 + tools/testing/selftests/powerpc/security/.gitignore | 1 tools/testing/selftests/powerpc/security/Makefile | 2 tools/testing/selftests/powerpc/security/entry_flush.c | 163 +++++++++++++++++ tools/testing/selftests/powerpc/security/rfi_flush.c | 35 +++ 30 files changed, 856 insertions(+), 172 deletions(-)
Christophe Leroy (1):
powerpc/8xx: Always fault when _PAGE_ACCESSED is not set
Daniel Axtens (1):
selftests/powerpc: entry flush test
David Edmondson (1):
KVM: x86: clflushopt should be treated as a no-op by emulation
Dmitry Torokhov (1):
Input: sunkbd - avoid use-after-free in teardown paths
Eran Ben Elisha (3):
net/mlx5: poll cmd EQ in case of command timeout net/mlx5: Fix a race when moving command interface to events mode net/mlx5: Add retry mechanism to the command entry index allocation
Greg Kroah-Hartman (1):
Linux 5.4.79
Hauke Mehrtens (1):
net: lantiq: Add locking for TX DMA channel
Johannes Berg (1):
mac80211: always wind down STA state
Michael Ellerman (1):
powerpc: Only include kup-radix.h for 64-bit Book3S
Nicholas Piggin (2):
powerpc/64s: flush L1D on kernel entry
powerpc/64s: flush L1D after user accesses
Nick Desaulniers (1):
ACPI: GED: fix -Wformat
Parav Pandit (1):
net/mlx5: Use async EQ setup cleanup helpers for multiple EQs
Russell Currey (1):
selftests/powerpc: rfi_flush: disable entry flush if present
Sudip Mukherjee (1):
MIPS: PCI: Fix MIPS build
Zhang Changzhong (1):
can: proc: can_remove_proc(): silence remove_proc_entry warning
Greg Kroah-Hartman
maintainerDocumentation/admin-guide/kernel-parameters.txt +7 -0
@@ -2667,6 +2667,8 @@ mds=off [X86] tsx_async_abort=off [X86] kvm.nx_huge_pages=off [X86] + no_entry_flush [PPC] + no_uaccess_flush [PPC] Exceptions: This does not have any effect on
@@ -2989,6 +2991,8 @@ noefi Disable EFI runtime services support. + no_entry_flush [PPC] Don't flush the L1-D cache when entering the kernel. + noexec [IA-64] noexec [X86]
@@ -3038,6 +3042,9 @@ nospec_store_bypass_disable [HW] Disable all mitigations for the Speculative Store Bypass vulnerability + no_uaccess_flush + [PPC] Don't flush the L1-D cache after accessing user data. + noxsave [BUGS=X86] Disables x86 extended register state save and restore using xsave. The kernel will fallback to enabling legacy floating-point and sse state.
Makefile +1 -1
@@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 VERSION = 5 PATCHLEVEL = 4 -SUBLEVEL = 78 +SUBLEVEL = 79 EXTRAVERSION = NAME = Kleptomaniac Octopus
arch/mips/pci/pci-xtalk-bridge.c +1 -1
@@ -284,7 +284,7 @@ static int bridge_set_affinity(struct irq_data *d, const struct cpumask *mask, ret =irq_chip_set_affinity_parent (d, mask, force);if (ret >=0 ) { cpu =cpumask_first_and (mask, cpu_online_mask); - data->nnasid =COMPACT_TO_NASID_NODEID (cpu_to_node (cpu)); + data->nasid =COMPACT_TO_NASID_NODEID (cpu_to_node (cpu));bridge_write (data->bc, b_int_addr[pin].addr, (((data->bc->intr_addr >>30 ) &0x30000 ) | bit | (data->nasid <<8 )));
arch/powerpc/include/asm/book3s/64/kup-radix.h +18 -11
@@ -11,13 +11,12 @@#ifdef __ASSEMBLY__ -.macro kuap_restore_amr gpr#ifdef CONFIG_PPC_KUAP +.macro kuap_restore_amr gpr BEGIN_MMU_FTR_SECTION_NESTED(67) ld \gpr, STACK_REGS_KUAP(r1) mtspr SPRN_AMR, \gpr END_MMU_FTR_SECTION_NESTED_IFSET(MMU_FTR_RADIX_KUAP, 67) -#endif .endm .macro kuap_check_amr gpr1, gpr2
@@ -31,6 +30,7 @@END_MMU_FTR_SECTION_NESTED_IFSET (MMU_FTR_RADIX_KUAP ,67 ) #endif .endm +#endif .macro kuap_save_amr_and_lock gpr1, gpr2, use_cr, msr_pr_cr #ifdef CONFIG_PPC_KUAP
@@ -54,6 +54,8 @@#else /* !__ASSEMBLY__ */ +DECLARE_STATIC_KEY_FALSE (uaccess_flush_key); +#ifdef CONFIG_PPC_KUAP #include <asm/reg.h>
@@ -77,6 +79,18 @@ static inline void set_kuap(unsigned long value)isync (); } +static inline bool +bad_kuap_fault (struct pt_regs *regs,unsigned long address,bool is_write) +{ +return WARN (mmu_has_feature (MMU_FTR_RADIX_KUAP ) && + (regs->kuap & (is_write ?AMR_KUAP_BLOCK_WRITE :AMR_KUAP_BLOCK_READ )), +"Bug: %s fault blocked by AMR!" , is_write ?"Write" :"Read" ); +} +#else /* CONFIG_PPC_KUAP */ +static inline void kuap_restore_amr (struct pt_regs *regs,unsigned long amr) { } +static inline void set_kuap (unsigned long value) { } +#endif /* !CONFIG_PPC_KUAP */ + static __always_inline void allow_user_access(void __user *to, const void __user *from,unsigned long size,unsigned long dir) {
@@ -94,17 +108,10 @@ static inline void prevent_user_access(void __user *to, const void __user *from, unsigned long size, unsigned long dir) {set_kuap (AMR_KUAP_BLOCKED ); +if (static_branch_unlikely (&uaccess_flush_key)) +do_uaccess_flush (); } -static inline bool -bad_kuap_fault (struct pt_regs *regs,unsigned long address,bool is_write) -{ -return WARN (mmu_has_feature (MMU_FTR_RADIX_KUAP ) && - (regs->kuap & (is_write ?AMR_KUAP_BLOCK_WRITE :AMR_KUAP_BLOCK_READ )), -"Bug: %s fault blocked by AMR!" , is_write ?"Write" :"Read" ); -} -#endif /* CONFIG_PPC_KUAP */ -#endif /* __ASSEMBLY__ */ #endif /* _ASM_POWERPC_BOOK3S_64_KUP_RADIX_H */
arch/powerpc/include/asm/exception-64s.h +11 -1
@@ -61,11 +61,18 @@nop ; \ nop +#define ENTRY_FLUSH_SLOT \ + ENTRY_FLUSH_FIXUP_SECTION; \ + nop; \ + nop; \ + nop; +/* * r10 must be free to use, r13 must be paca */ #define INTERRUPT_TO_KERNEL \ - STF_ENTRY_BARRIER_SLOT + STF_ENTRY_BARRIER_SLOT; \ + ENTRY_FLUSH_SLOT/* * Macros for annotating the expected destination of (h)rfid
@@ -127,6 +134,9 @@hrfid ; \ b hrfi_flush_fallback +#else /* __ASSEMBLY__ */ +/* Prototype for function defined in exceptions-64s.S */ +void do_uaccess_flush (void );#endif /* __ASSEMBLY__ */ #endif /* _ASM_POWERPC_EXCEPTION_H */
arch/powerpc/include/asm/feature-fixups.h +19 -0
@@ -205,6 +205,22 @@ label##3: \ FTR_ENTRY_OFFSET 955b-956b; \ .popsection; +#define UACCESS_FLUSH_FIXUP_SECTION \ +959: \ + .pushsection __uaccess_flush_fixup,"a"; \ + .align 2; \ +960: \ + FTR_ENTRY_OFFSET 959b-960b; \ + .popsection; + +#define ENTRY_FLUSH_FIXUP_SECTION \ +957: \ + .pushsection __entry_flush_fixup,"a"; \ + .align 2; \ +958: \ + FTR_ENTRY_OFFSET 957b-958b; \ + .popsection; +#define RFI_FLUSH_FIXUP_SECTION \ 951: \ .pushsection __rfi_flush_fixup,"a"; \
@@ -237,8 +253,11 @@ label##3: \#include <linux/types.h> extern long stf_barrier_fallback; +extern long entry_flush_fallback;extern long __start___stf_entry_barrier_fixup, __stop___stf_entry_barrier_fixup;extern long __start___stf_exit_barrier_fixup, __stop___stf_exit_barrier_fixup; +extern long __start___uaccess_flush_fixup, __stop___uaccess_flush_fixup; +extern long __start___entry_flush_fixup, __stop___entry_flush_fixup;extern long __start___rfi_flush_fixup, __stop___rfi_flush_fixup;extern long __start___barrier_nospec_fixup, __stop___barrier_nospec_fixup;extern long __start__btb_flush_fixup, __stop__btb_flush_fixup;
arch/powerpc/include/asm/kup.h +22 -5
@@ -6,7 +6,7 @@#define KUAP_WRITE 2#define KUAP_READ_WRITE (KUAP_READ | KUAP_WRITE) -#ifdef CONFIG_PPC64 +#ifdef CONFIG_PPC_BOOK3S_64 #include <asm/book3s/64/kup-radix.h> #endif #ifdef CONFIG_PPC_8xx
@@ -24,9 +24,15 @@ .macro kuap_restore sp, current, gpr1, gpr2, gpr3 .endm +.macro kuap_restore_amr gpr +.endm + .macro kuap_check current, gpr .endm +.macro kuap_check_amr gpr1, gpr2 +.endm + #endif #else /* !__ASSEMBLY__ */
@@ -45,15 +51,26 @@ static inline void setup_kuep(bool disabled) { }void setup_kuap (bool disabled);#else static inline void setup_kuap (bool disabled) { } -static inline void allow_user_access (void __user *to,const void __user *from, -unsigned long size,unsigned long dir) { } -static inline void prevent_user_access (void __user *to,const void __user *from, -unsigned long size,unsigned long dir) { } +static inline bool bad_kuap_fault (struct pt_regs *regs,unsigned long address,bool is_write) {return false; } + +static inline void kuap_check_amr (void ) { } + +/* +* book3s/64/kup-radix.h defines these functions for the !KUAP case to flush +* the L1D cache after user accesses. Only include the empty stubs for other +* platforms. +*/ +#ifndef CONFIG_PPC_BOOK3S_64 +static inline void allow_user_access (void __user *to,const void __user *from, +unsigned long size,unsigned long dir) { } +static inline void prevent_user_access (void __user *to,const void __user *from, +unsigned long size,unsigned long dir) { } +#endif /* CONFIG_PPC_BOOK3S_64 */ #endif /* CONFIG_PPC_KUAP */ static inline void allow_read_from_user (const void __user *from,unsigned long size)
arch/powerpc/include/asm/security_features.h +7 -0
@@ -84,12 +84,19 @@ static inline bool security_ftr_enabled(u64 feature)// Software required to flush link stack on context switch #define SEC_FTR_FLUSH_LINK_STACK 0x0000000000001000ull +// The L1-D cache should be flushed when entering the kernel +#define SEC_FTR_L1D_FLUSH_ENTRY 0x0000000000004000ull + +// The L1-D cache should be flushed after user accesses from the kernel +#define SEC_FTR_L1D_FLUSH_UACCESS 0x0000000000008000ull// Features enabled by default #define SEC_FTR_DEFAULT \ (SEC_FTR_L1D_FLUSH_HV | \ SEC_FTR_L1D_FLUSH_PR | \ SEC_FTR_BNDS_CHK_SPEC_BAR | \ + SEC_FTR_L1D_FLUSH_ENTRY | \ + SEC_FTR_L1D_FLUSH_UACCESS | \ SEC_FTR_FAVOUR_SECURITY)#endif /* _ASM_POWERPC_SECURITY_FEATURES_H */
arch/powerpc/include/asm/setup.h +4 -0
@@ -52,12 +52,16 @@ enum l1d_flush_type { };void setup_rfi_flush (enum l1d_flush_type ,bool enable); +void setup_entry_flush (bool enable); +void setup_uaccess_flush (bool enable);void do_rfi_flush_fixups (enum l1d_flush_type types);#ifdef CONFIG_PPC_BARRIER_NOSPEC void setup_barrier_nospec (void );#else static inline void setup_barrier_nospec (void ) { };#endif +void do_uaccess_flush_fixups (enum l1d_flush_type types); +void do_entry_flush_fixups (enum l1d_flush_type types);void do_barrier_nospec_fixups (bool enable);extern bool barrier_nospec_enabled;
arch/powerpc/kernel/exceptions-64s.S +46 -42
151 lines not on this page · raw message
arch/powerpc/kernel/head_8xx.S +2 -12
@@ -229,9 +229,7 @@ SystemCall: InstructionTLBMiss: mtspr SPRN_SPRG_SCRATCH0, r10 -#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_SWAP) mtspr SPRN_SPRG_SCRATCH1, r11 -#endif /* If we are faulting a kernel address, we have to use the * kernel page tables.
@@ -278,11 +276,9 @@ InstructionTLBMiss: #ifdef ITLB_MISS_KERNEL mtcr r11 #endif -#ifdef CONFIG_SWAP - rlwinm r11, r10, 32-5, _PAGE_PRESENT + rlwinm r11, r10, 32-7, _PAGE_PRESENT and r11, r11, r10 rlwimi r10, r11, 0, _PAGE_PRESENT -#endif /* The Linux PTE won't go exactly into the MMU TLB. * Software indicator bits 20 and 23 must be clear. * Software indicator bits 22, 24, 25, 26, and 27 must be
@@ -296,9 +292,7 @@ InstructionTLBMiss: /* Restore registers */ 0: mfspr r10, SPRN_SPRG_SCRATCH0 -#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_SWAP) mfspr r11, SPRN_SPRG_SCRATCH1 -#endif rfi patch_site 0b, patch__itlbmiss_exit_1
@@ -308,9 +302,7 @@ InstructionTLBMiss: addi r10, r10, 1 stw r10, (itlb_miss_counter - PAGE_OFFSET)@l(0) mfspr r10, SPRN_SPRG_SCRATCH0 -#if defined(ITLB_MISS_KERNEL) || defined(CONFIG_SWAP) mfspr r11, SPRN_SPRG_SCRATCH1 -#endif rfi #endif
@@ -394,11 +386,9 @@ DataStoreTLBMiss: * r11 = ((r10 & PRESENT) & ((r10 & ACCESSED) >> 5)); * r10 = (r10 & ~PRESENT) | r11; */ -#ifdef CONFIG_SWAP - rlwinm r11, r10, 32-5, _PAGE_PRESENT + rlwinm r11, r10, 32-7, _PAGE_PRESENT and r11, r11, r10 rlwimi r10, r11, 0, _PAGE_PRESENT -#endif /* The Linux PTE won't go exactly into the MMU TLB. * Software indicator bits 24, 25, 26, and 27 must be * set. All other Linux PTE bits control the behavior
arch/powerpc/kernel/setup_64.c +121 -1
159 lines not on this page · raw message
arch/powerpc/kernel/vmlinux.lds.S +14 -0
@@ -143,6 +143,20 @@ SECTIONS __stop___stf_entry_barrier_fixup = .; } + . = ALIGN(8); + __uaccess_flush_fixup : AT(ADDR(__uaccess_flush_fixup) - LOAD_OFFSET) { + __start___uaccess_flush_fixup = .; + *(__uaccess_flush_fixup) + __stop___uaccess_flush_fixup = .; + } + + . = ALIGN(8); + __entry_flush_fixup : AT(ADDR(__entry_flush_fixup) - LOAD_OFFSET) { + __start___entry_flush_fixup = .; + *(__entry_flush_fixup) + __stop___entry_flush_fixup = .; + } + . = ALIGN(8); __stf_exit_barrier_fixup : AT(ADDR(__stf_exit_barrier_fixup) - LOAD_OFFSET) { __start___stf_exit_barrier_fixup = .;
arch/powerpc/lib/feature-fixups.c +104 -0
110 lines not on this page · raw message
arch/powerpc/platforms/powernv/setup.c +17 -0
@@ -122,12 +122,29 @@ static void pnv_setup_rfi_flush(void) type =L1D_FLUSH_ORI ; } +/* +* If we are non-Power9 bare metal, we don't need to flush on kernel +* entry or after user access: they fix a P9 specific vulnerability. +*/ +if (!pvr_version_is (PVR_POWER9 )) { +security_ftr_clear (SEC_FTR_L1D_FLUSH_ENTRY ); +security_ftr_clear (SEC_FTR_L1D_FLUSH_UACCESS ); + } + enable =security_ftr_enabled (SEC_FTR_FAVOUR_SECURITY ) && \ (security_ftr_enabled (SEC_FTR_L1D_FLUSH_PR ) || \security_ftr_enabled (SEC_FTR_L1D_FLUSH_HV ));setup_rfi_flush (type, enable);setup_count_cache_flush (); + + enable =security_ftr_enabled (SEC_FTR_FAVOUR_SECURITY ) && +security_ftr_enabled (SEC_FTR_L1D_FLUSH_ENTRY ); +setup_entry_flush (enable); + + enable =security_ftr_enabled (SEC_FTR_FAVOUR_SECURITY ) && +security_ftr_enabled (SEC_FTR_L1D_FLUSH_UACCESS ); +setup_uaccess_flush (enable); }static void __init pnv_setup_arch (void )
arch/powerpc/platforms/pseries/setup.c +8 -0
@@ -561,6 +561,14 @@ void pseries_setup_rfi_flush(void)setup_rfi_flush (types, enable);setup_count_cache_flush (); + + enable =security_ftr_enabled (SEC_FTR_FAVOUR_SECURITY ) && +security_ftr_enabled (SEC_FTR_L1D_FLUSH_ENTRY ); +setup_entry_flush (enable); + + enable =security_ftr_enabled (SEC_FTR_FAVOUR_SECURITY ) && +security_ftr_enabled (SEC_FTR_L1D_FLUSH_UACCESS ); +setup_uaccess_flush (enable); }#ifdef CONFIG_PCI_IOV
arch/x86/kvm/emulate.c +7 -1
@@ -4050,6 +4050,12 @@ static int em_clflush(struct x86_emulate_ctxt *ctxt)return X86EMUL_CONTINUE ; } +static int em_clflushopt (struct x86_emulate_ctxt *ctxt) +{ +/* emulating clflushopt regardless of cpuid */ +return X86EMUL_CONTINUE ; +} +static int em_movsxd (struct x86_emulate_ctxt *ctxt) { ctxt->dst.val = (s32 ) ctxt->src.val;
@@ -4592,7 +4598,7 @@ static const struct opcode group11[] = { };static const struct gprefix pfx_0f_ae_7 = { -I (SrcMem | ByteOp, em_clflush),N ,N ,N , +I (SrcMem | ByteOp, em_clflush),I (SrcMem | ByteOp, em_clflushopt),N ,N , };static const struct group_dual group15 = { {
drivers/acpi/evged.c +1 -1
@@ -101,7 +101,7 @@ static acpi_status acpi_ged_request_interrupt(struct acpi_resource *ares,switch (gsi) { case 0 ... 255: -sprintf (ev_name,"_%c%02hhX" , +sprintf (ev_name,"_%c%02X" , trigger ==ACPI_EDGE_SENSITIVE ?'E' :'L' , gsi);if (ACPI_SUCCESS (acpi_get_handle (handle, ev_name, &evt_handle)))
drivers/input/keyboard/sunkbd.c +33 -8
67 lines not on this page · raw message
drivers/net/ethernet/lantiq_xrx200.c +2 -0
@@ -245,6 +245,7 @@ static int xrx200_tx_housekeeping(struct napi_struct *napi, int budget)int pkts =0 ;int bytes =0 ; +netif_tx_lock (net_dev);while (pkts < budget) {struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->tx_free];
@@ -268,6 +269,7 @@ static int xrx200_tx_housekeeping(struct napi_struct *napi, int budget) net_dev->stats.tx_bytes += bytes;netdev_completed_queue (ch->priv->net_dev, pkts, bytes); +netif_tx_unlock (net_dev);if (netif_queue_stopped (net_dev))netif_wake_queue (net_dev);
drivers/net/ethernet/mellanox/mlx5/core/cmd.c +96 -13
169 lines not on this page · raw message
drivers/net/ethernet/mellanox/mlx5/core/eq.c +91 -66
227 lines not on this page · raw message
drivers/net/ethernet/mellanox/mlx5/core/lib/eq.h +2 -0
@@ -38,6 +38,7 @@ struct mlx5_eq {struct mlx5_eq_async {struct mlx5_eq core;struct notifier_block irq_nb; +spinlock_t lock;/* To avoid irq EQ handle races with resiliency flows */ };struct mlx5_eq_comp {
@@ -82,6 +83,7 @@ void mlx5_cq_tasklet_cb(unsigned long data);struct cpumask *mlx5_eq_comp_cpumask (struct mlx5_core_dev *dev,int ix);u32 mlx5_eq_poll_irq_disabled (struct mlx5_eq_comp *eq); +void mlx5_cmd_eq_recover (struct mlx5_core_dev *dev);void mlx5_eq_synchronize_async_irq (struct mlx5_core_dev *dev);void mlx5_eq_synchronize_cmd_irq (struct mlx5_core_dev *dev);
include/linux/mlx5/driver.h +6 -0
@@ -299,6 +299,7 @@ struct mlx5_cmd {struct semaphore sem;struct semaphore pages_sem;int mode; +u16 allowed_opcode;struct mlx5_cmd_work_ent *ent_arr[MLX5_MAX_COMMANDS ];struct dma_pool *pool;struct mlx5_cmd_debug dbg;
@@ -890,10 +891,15 @@ mlx5_frag_buf_get_idx_last_contig_stride(struct mlx5_frag_buf_ctrl *fbc, u32 ix)return min_t (u32, last_frag_stride_idx - fbc->strides_offset, fbc->sz_m1); } +enum { +CMD_ALLOWED_OPCODE_ALL , +}; +int mlx5_cmd_init (struct mlx5_core_dev *dev);void mlx5_cmd_cleanup (struct mlx5_core_dev *dev);void mlx5_cmd_use_events (struct mlx5_core_dev *dev);void mlx5_cmd_use_polling (struct mlx5_core_dev *dev); +void mlx5_cmd_allowed_opcode (struct mlx5_core_dev *dev,u16 opcode);struct mlx5_async_ctx {struct mlx5_core_dev *dev;
net/can/proc.c +4 -2
@@ -471,6 +471,9 @@ void can_init_proc(struct net *net)*/ void can_remove_proc (struct net *net) { +if (!net->can.proc_dir) +return ; +if (net->can.pde_version)remove_proc_entry (CAN_PROC_VERSION , net->can.proc_dir);
@@ -498,6 +501,5 @@ void can_remove_proc(struct net *net)if (net->can.pde_rcvlist_sff)remove_proc_entry (CAN_PROC_RCVLIST_SFF , net->can.proc_dir); -if (net->can.proc_dir) -remove_proc_entry ("can" , net->proc_net); +remove_proc_entry ("can" , net->proc_net); }
net/mac80211/sta_info.c +18 -0
@@ -244,6 +244,24 @@ struct sta_info *sta_info_get_by_idx(struct ieee80211_sub_if_data *sdata,*/ void sta_info_free (struct ieee80211_local *local,struct sta_info *sta) { +/* +* If we had used sta_info_pre_move_state() then we might not +* have gone through the state transitions down again, so do +* it here now (and warn if it's inserted). +* +* This will clear state such as fast TX/RX that may have been +* allocated during state transitions. +*/ +while (sta->sta_state >IEEE80211_STA_NONE ) { +int ret; + +WARN_ON_ONCE (test_sta_flag (sta,WLAN_STA_INSERTED )); + + ret =sta_info_move_state (sta, sta->sta_state -1 ); +if (WARN_ONCE (ret,"sta_info_move_state() returned %d\n" , ret)) +break ; + } +if (sta->rate_ctrl)rate_control_free_sta (sta);
tools/testing/selftests/powerpc/security/.gitignore +1 -0
@@ -1 +1,2 @@ rfi_flush +entry_flush
tools/testing/selftests/powerpc/security/Makefile +1 -1
@@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ -TEST_GEN_PROGS := rfi_flush +TEST_GEN_PROGS := rfi_flush entry_flush top_srcdir = ../../../../.. CFLAGS += -I../../../../../usr/include
tools/testing/selftests/powerpc/security/entry_flush.c new file +163 -0
163 lines not on this page · raw message
tools/testing/selftests/powerpc/security/rfi_flush.c +29 -6
@@ -50,16 +50,30 @@ int rfi_flush_test(void)__u64 l1d_misses_total =0 ;unsigned long iterations =100000 , zero_size =24 *1024 ;unsigned long l1d_misses_expected; -int rfi_flush_org, rfi_flush; +int rfi_flush_orig, rfi_flush; +int have_entry_flush, entry_flush_orig;SKIP_IF (geteuid () !=0 ); -if (read_debugfs_file ("powerpc/rfi_flush" , &rfi_flush_org)) { +if (read_debugfs_file ("powerpc/rfi_flush" , &rfi_flush_orig) <0 ) {perror ("Unable to read powerpc/rfi_flush debugfs file" );SKIP_IF (1 ); } - rfi_flush = rfi_flush_org; +if (read_debugfs_file ("powerpc/entry_flush" , &entry_flush_orig) <0 ) { + have_entry_flush =0 ; + }else { + have_entry_flush =1 ; + +if (entry_flush_orig !=0 ) { +if (write_debugfs_file ("powerpc/entry_flush" ,0 ) <0 ) { +perror ("error writing to powerpc/entry_flush debugfs file" ); +return 1 ; + } + } + } + + rfi_flush = rfi_flush_orig; fd =perf_event_open_counter (PERF_TYPE_RAW ,/* L1d miss */ 0x400f0 ,-1 );FAIL_IF (fd <0 );
@@ -68,6 +82,7 @@ int rfi_flush_test(void)FAIL_IF (perf_event_enable (fd)); +// disable L1 prefetching set_dscr (1 ); iter = repetitions;
@@ -109,8 +124,8 @@ int rfi_flush_test(void) repetitions * l1d_misses_expected /2 , passes, repetitions); -if (rfi_flush == rfi_flush_org) { - rfi_flush = !rfi_flush_org; +if (rfi_flush == rfi_flush_orig) { + rfi_flush = !rfi_flush_orig;if (write_debugfs_file ("powerpc/rfi_flush" , rfi_flush) <0 ) {perror ("error writing to powerpc/rfi_flush debugfs file" );return 1 ;
@@ -126,11 +141,19 @@ int rfi_flush_test(void)set_dscr (0 ); -if (write_debugfs_file ("powerpc/rfi_flush" , rfi_flush_org) <0 ) { +if (write_debugfs_file ("powerpc/rfi_flush" , rfi_flush_orig) <0 ) {perror ("unable to restore original value of powerpc/rfi_flush debugfs file" );return 1 ; } +if (have_entry_flush) { +if (write_debugfs_file ("powerpc/entry_flush" , entry_flush_orig) <0 ) { +perror ("unable to restore original value of powerpc/entry_flush " +"debugfs file" ); +return 1 ; + } + } +return rc; }