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FAILED: patch "[PATCH] usb: dwc3: ulpi: Use VStsDone to detect PHY regs access" failed to apply to 4.4-stable tree

PATCH [email protected] 1 participant 1 message Jan 11, 2021

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The patch below does not apply to the 4.4-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

From ce722da66d3e9384aa2de9d33d584ee154e5e157 Mon Sep 17 00:00:00 2001
From: Serge Semin <[email protected]>
Date: Thu, 10 Dec 2020 11:50:06 +0300
Subject: [PATCH] usb: dwc3: ulpi: Use VStsDone to detect PHY regs access
completion

In accordance with [1] the DWC_usb3 core sets the GUSB2PHYACCn.VStsDone bit when the PHY vendor control access is done and clears it when the application initiates a new transaction. The doc doesn't say anything about the GUSB2PHYACCn.VStsBsy flag serving for the same purpose. Moreover we've discovered that the VStsBsy flag can be cleared before the VStsDone bit. So using the former as a signal of the PHY control registers completion might be dangerous. Let's have the VStsDone flag utilized instead then.

[1] Synopsys DesignWare Cores SuperSpeed USB 3.0 xHCI Host Controller

    Databook, 2.70a, December 2013, p.388
drivers/usb/dwc3/core.h +1 -0
index 2f95f08ca511..1b241f937d8f 100644
@@ -285,6 +285,7 @@
 
 /* Global USB2 PHY Vendor Control Register */
 #define DWC3_GUSB2PHYACC_NEWREGREQ	BIT(25)
+#define DWC3_GUSB2PHYACC_DONE		BIT(24)
 #define DWC3_GUSB2PHYACC_BUSY		BIT(23)
 #define DWC3_GUSB2PHYACC_WRITE		BIT(22)
 #define DWC3_GUSB2PHYACC_ADDR(n)	(n << 16)
drivers/usb/dwc3/ulpi.c +1 -1
index aa213c9815f6..3cc4f4970c05 100644
@@ -24,7 +24,7 @@ static int dwc3_ulpi_busyloop(struct dwc3 *dwc)
 
 	while (count--) {
 		reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0));
-		if (!(reg & DWC3_GUSB2PHYACC_BUSY))
+		if (reg & DWC3_GUSB2PHYACC_DONE)
 			return 0;
 		cpu_relax();
 	}