arm64: dts: qcom: sc7280: Add pcie clock support
Subsystems (4)
PATCH v2 1/1 arm64: dts: qcom: sc7280: Add pcie clock support
Add pcie clock phandle for sc7280 SoC and correct The pcie_1_pipe-clk clock name as same as binding.
fix: ab7772de8 ("arm64: dts: qcom: SC7280: Add rpmhcc clock controller node")
---
This change is depends on the below patch series.
https://lkml.org/lkml/2021/10/7/841
--- arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/qcom/sc7280.dtsi +3 -2
@@ -569,9 +569,10 @@ reg = <0 0x00100000 0 0x1f0000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>, - <0>, <0>, <0>, <0>, <0>, <0>; + <0>, <&pcie1_lane 0>, + <0>, <0>, <0>, <0>; clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk", - "pcie_0_pipe_clk", "pcie_1_pipe-clk", + "pcie_0_pipe_clk", "pcie_1_pipe_clk", "ufs_phy_rx_symbol_0_clk", "ufs_phy_rx_symbol_1_clk", "ufs_phy_tx_symbol_0_clk", "usb3_phy_wrapper_gcc_usb30_pipe_clk";
Signature · 2 lines
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
Quoting Prasad Malisetty (2021-10-14 11:06:24)
Quoted 4 lines
Add pcie clock phandle for sc7280 SoC and correct The pcie_1_pipe-clk clock name as same as binding.
fix:
ab7772de8("arm64: dts: qcom: SC7280: Add rpmhcc clock controller node")
This is wrong. Should be
controller node")
Quoted 6 lines
Signed-off-by Prasad Malisetty <[email protected]>Reported-by kernel test robot <[email protected]>---
This change is depends on the below patch series.
https://lkml.org/lkml/2021/10/7/841
Why doesn't that patch update this clock cell then?
Quoted 9 lines
--- arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)arch/arm64/boot/dts/qcom/sc7280.dtsi +0
-0
arch/arm64/boot/dts/qcom/sc7280.dtsi line 575
Quoted 9 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +3
-2@@ -569,9 +569,10 @@ reg = <0 0x00100000 0 0x1f0000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>, - <0>, <0>, <0>, <0>, <0>, <0>; + <0>, <&pcie1_lane 0>, + <0>, <0>, <0>, <0>; clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk", - "pcie_0_pipe_clk", "pcie_1_pipe-clk", + "pcie_0_pipe_clk", "pcie_1_pipe_clk",
This can be split from the patch to fix just the name in one patch and then add the pcie1_lane phandle in the next patch. That way new features aren't being mixed together with the string fix.
Quoted 3 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +0
-0"ufs_phy_rx_symbol_0_clk", "ufs_phy_rx_symbol_1_clk", "ufs_phy_tx_symbol_0_clk", "usb3_phy_wrapper_gcc_usb30_pipe_clk";
Quoting Stephen Boyd (2021-10-21 11:06:53)
Quoted 10 lines
Quoting Prasad Malisetty (2021-10-14 11:06:24)
Quoted 4 lines
Add pcie clock phandle for sc7280 SoC and correct The pcie_1_pipe-clk clock name as same as binding.
fix:
ab7772de8("arm64: dts: qcom: SC7280: Add rpmhcc clock controller node")This is wrong. Should be
Fixes ab7772de8612 ("arm64: dts: qcom: SC7280: Add rpmhcc clock controller node")
Quoted 8 lines
Quoted 6 lines
Signed-off-by Prasad Malisetty <[email protected]>Reported-by kernel test robot <[email protected]>---
This change is depends on the below patch series.
https://lkml.org/lkml/2021/10/7/841Why doesn't that patch update this clock cell then?
Looks like Bjorn already picked it up so that answers my question.
Quoted 15 lines
Quoted 15 lines
--- arch/arm64/boot/dts/qcom/sc7280.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)arch/arm64/boot/dts/qcom/sc7280.dtsi +1
-1@@ -569,9 +569,10 @@ reg = <0 0x00100000 0 0x1f0000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>, - <0>, <0>, <0>, <0>, <0>, <0>; + <0>, <&pcie1_lane 0>,
Quoted 9 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi line 575
Quoted 4 lines
arch/arm64/boot/dts/qcom/sc7280.dtsi +2
-1+ <0>, <0>, <0>, <0>; clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk", - "pcie_0_pipe_clk", "pcie_1_pipe-clk", + "pcie_0_pipe_clk", "pcie_1_pipe_clk",This can be split from the patch to fix just the name in one patch and then add the
pcie1_lanephandle in the next patch. That way new features aren't being mixed together with the string fix.
In addition, I see that Rob sent a patch[1] that fixes the interrupt-map in the pcie node. Can you send a similar patch for sc7280? It looks wrong. We need another two zeroes like on sdm845.dtsi. So please resend this series with three patches and the appropriate Fixes tags.