FAILED: patch "[PATCH] crypto: qat - rework the VF2PF interrupt handling logic" failed to apply to 5.17-stable tree
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[email protected]
maintainerThe patch below does not apply to the 5.17-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From c690c7f6312ce69b426af08ae1da2b9e48a0246f Mon Sep 17 00:00:00 2001
From: Marco Chiappero <[email protected]>
Date: Thu, 7 Apr 2022 17:54:51 +0100
Subject: [PATCH] crypto: qat - rework the VF2PF interrupt handling logic
Change the VF2PF interrupt handler in the PF ISR and the definition of the internal PFVF API to correct the current implementation, which can result in missed interrupts.
More specifically, current HW generations consider a write to the mask register, regardless of the value, as an acknowledge of any pending VF2PF interrupt. Therefore, if there is an interrupt between the source register read and the mask register write, such interrupt will not be delivered and silently acknowledged, resulting in a lost VF2PF message.
To work around the problem, rather than disabling specific interrupts, disable all the interrupts and re-enable only the ones that we are not serving (excluding the already disabled ones too). This will force any other pending interrupt to be triggered and be serviced by a subsequent ISR.
This new approach requires, however, changes to the interrupt related pfvf_ops functions. In particular, get_vf2pf_sources() has now been removed in favor of disable_pending_vf2pf_interrupts(), which not only retrieves and returns the pending (and enabled) sources, but also disables them.
As a consequence, introduce the adf_disable_pending_vf2pf_interrupts() utility in place of adf_disable_vf2pf_interrupts_irq(), which is no longer needed.
drivers/crypto/qat/qat_common/adf_accel_devices.h +1 -1
@@ -152,9 +152,9 @@ struct adf_pfvf_ops {int (*enable_comms)(struct adf_accel_dev *accel_dev);u32 (*get_pf2vf_offset)(u32 i);u32 (*get_vf2pf_offset)(u32 i); -u32 (*get_vf2pf_sources)(void__iomem *pmisc_addr);void (*enable_vf2pf_interrupts)(void __iomem *pmisc_addr,u32 vf_mask);void (*disable_vf2pf_interrupts)(void __iomem *pmisc_addr,u32 vf_mask); +u32 (*disable_pending_vf2pf_interrupts)(void__iomem *pmisc_addr);int (*send_msg)(struct adf_accel_dev *accel_dev,struct pfvf_message msg,u32 pfvf_offset,struct mutex *csr_lock); struct pfvf_message (*recv_msg)(struct adf_accel_dev *accel_dev,
drivers/crypto/qat/qat_common/adf_gen2_pfvf.c +40 -18
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drivers/crypto/qat/qat_common/adf_gen4_pfvf.c +33 -11
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drivers/crypto/qat/qat_common/adf_isr.c +7 -10
@@ -76,32 +76,29 @@ void adf_disable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, u32 vf_mask)spin_unlock_irqrestore (&accel_dev->pf.vf2pf_ints_lock, flags); } -static void adf_disable_vf2pf_interrupts_irq (struct adf_accel_dev *accel_dev, -u32 vf_mask) +static u32 adf_disable_pending_vf2pf_interrupts (struct adf_accel_dev *accel_dev) {void __iomem *pmisc_addr =adf_get_pmisc_base (accel_dev); +u32 pending;spin_lock (&accel_dev->pf.vf2pf_ints_lock); -GET_PFVF_OPS (accel_dev)->disable_vf2pf_interrupts (pmisc_addr, vf_mask); + pending =GET_PFVF_OPS (accel_dev)->disable_pending_vf2pf_interrupts (pmisc_addr);spin_unlock (&accel_dev->pf.vf2pf_ints_lock); + +return pending; }static bool adf_handle_vf2pf_int (struct adf_accel_dev *accel_dev) { -void __iomem *pmisc_addr =adf_get_pmisc_base (accel_dev);bool irq_handled = false;unsigned long vf_mask; -/* Get the interrupt sources triggered by VFs */ - vf_mask =GET_PFVF_OPS (accel_dev)->get_vf2pf_sources (pmisc_addr); - +/* Get the interrupt sources triggered by VFs, except for those already disabled */ + vf_mask =adf_disable_pending_vf2pf_interrupts (accel_dev);if (vf_mask) {struct adf_accel_vf_info *vf_info;int i; -/* Disable VF2PF interrupts for VFs with pending ints */ -adf_disable_vf2pf_interrupts_irq (accel_dev, vf_mask); -/* * Handle VF2PF interrupt unless the VF is malicious and * is attempting to flood the host OS with VF2PF interrupts.
drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c +51 -25
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