FAILED: patch "[PATCH] drm/amdgpu/display/mst: limit payload to be updated one by" failed to apply to 6.2-stable tree
[email protected]
maintainerThe patch below does not apply to the 6.2-stable tree.
If someone wants it applied there, or to any other stable or longterm tree, then please email the backport, including the original git commit id to <[email protected]>.
To reproduce the conflict and resubmit, you may use the following commands:
git fetch https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ linux-6.2.y
git checkout FETCH_HEAD
git cherry-pick -x ea38dd57b0a65a7d434a7d9528c7b0445a5ea3ed
# <resolve conflicts, build, test, etc.>
git commit -s
git send-email --to '<[email protected]>' --in-reply-to '[email protected]' --subject-prefix 'PATCH 6.2.y' HEAD^..
Possible dependencies:
ea38dd57b0a6 ("drm/amdgpu/display/mst: limit payload to be updated one by one")
thanks,
greg k-h
------------------ original commit in Linus's tree ------------------
From ea38dd57b0a65a7d434a7d9528c7b0445a5ea3ed Mon Sep 17 00:00:00 2001
From: Wayne Lin <[email protected]>
Date: Fri, 9 Dec 2022 19:05:33 +0800
Subject: [PATCH] drm/amdgpu/display/mst: limit payload to be updated one by
one
[Why]
amdgpu expects to update payload table for one stream one time by calling dm_helpers_dp_mst_write_payload_allocation_table(). Currently, it get modified to try to update HW payload table at once by referring mst_state.
[How]
This is just a quick workaround. Should find way to remove the temporary struct dc_dp_mst_stream_allocation_table later if set struct link_mst_stream_allocatio directly is possible.
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +39 -12
@@ -123,23 +123,50 @@ enum dc_edid_status dm_helpers_parse_edid_caps( }static void -fill_dc_mst_payload_table_from_drm (struct drm_dp_mst_topology_state *mst_state, -struct amdgpu_dm_connector *aconnector, +fill_dc_mst_payload_table_from_drm (struct dc_link *link, +bool enable, +struct drm_dp_mst_atomic_payload *target_payload,struct dc_dp_mst_stream_allocation_table *table) {struct dc_dp_mst_stream_allocation_table new_table = {0 };struct dc_dp_mst_stream_allocation *sa; -struct drm_dp_mst_atomic_payload *payload; +struct link_mst_stream_allocation_table copy_of_link_table = + link->mst_stream_alloc_table; -/* Fill payload info*/ -list_for_each_entry (payload, &mst_state->payloads, next) { -if (payload->delete) -continue ; +int i; +int current_hw_table_stream_cnt = copy_of_link_table.stream_count; +struct link_mst_stream_allocation *dc_alloc; + +/* TODO: refactor to set link->mst_stream_alloc_table directly if possible.*/ +if (enable) { + dc_alloc = + ©_of_link_table.stream_allocations[current_hw_table_stream_cnt]; + dc_alloc->vcp_id = target_payload->vcpi; + dc_alloc->slot_count = target_payload->time_slots; + }else { +for (i =0 ; i < copy_of_link_table.stream_count; i++) { + dc_alloc = + ©_of_link_table.stream_allocations[i]; + +if (dc_alloc->vcp_id == target_payload->vcpi) { + dc_alloc->vcp_id =0 ; + dc_alloc->slot_count =0 ; +break ; + } + } +ASSERT (i != copy_of_link_table.stream_count); + } - sa = &new_table.stream_allocations[new_table.stream_count]; - sa->slot_count = payload->time_slots; - sa->vcp_id = payload->vcpi; - new_table.stream_count++; +/* Fill payload info*/ +for (i =0 ; i <MAX_CONTROLLER_NUM ; i++) { + dc_alloc = + ©_of_link_table.stream_allocations[i]; +if (dc_alloc->vcp_id >0 && dc_alloc->slot_count >0 ) { + sa = &new_table.stream_allocations[new_table.stream_count]; + sa->slot_count = dc_alloc->slot_count; + sa->vcp_id = dc_alloc->vcp_id; + new_table.stream_count++; + } }/* Overwrite the old table */
@@ -188,7 +215,7 @@ bool dm_helpers_dp_mst_write_payload_allocation_table(* AUX message. The sequence is slot 1-63 allocated sequence for each * stream. AMD ASIC stream slot allocation should follow the same * sequence. copy DRM MST allocation to dc */ -fill_dc_mst_payload_table_from_drm (mst_state, aconnector, proposed_table); +fill_dc_mst_payload_table_from_drm (stream->link, enable, payload, proposed_table);return true; }