AMD: Enable WC+ memory type on family 10 processors
PATCH 1/1 AMD: Enable WC+ memory type on family 10 processors
# HG changeset patch
# User Boris Ostrovsky <[email protected]> # Date 1358429914 18000
# Node ID 1963e398ba0f5dd61818d92400c7b07a32f6da4b # Parent b6195e277da52129d5d79f29ccac0e7290643e37
AMD: Enable WC+ memory type on family 10 processors
In some cases BIOS may not enable WC+ memory type on family 10 processors, instead converting what would be WC+ memory to CD type. On guests using nested pages this could result in performance degradation. This patch enables WC+.
xen/arch/x86/cpu/amd.c +12 -0
@@ -495,6 +495,18 @@ static void __devinit init_amd(struct cpset_bit (X86_FEATURE_ARAT , c->x86_capability);/* +* On family 10h BIOS may not have properly enabled WC+ support, causing +* it to be converted to CD memtype. This may result in performance +* degradation for certain nested-paging guests. Prevent this conversion +* by enabling WC+ support through MSRC001_1024A[24] = 0 +*/ +if (c->x86 ==0x10 ) { +rdmsr_safe (0xc001102a , value); + value &= ~(1ULL <<24 ); +wrmsr_safe (0xc001102a , value); + } + +/* * Prior to Family 0x14, perf counters are not reset during warm reboot. * We have to reset them manually. */
Quoted 21 lines · Boris Ostrovsky
# HG changeset patch
# User Boris Ostrovsky <[email protected]> # Date 1358429914 18000
# Node ID1963e398ba0f5dd61818d92400c7b07a32f6da4b# Parentb6195e277da52129d5d79f29ccac0e7290643e37
AMD: Enable WC+ memory type on family 10 processorsIn some cases BIOS may not enable WC+ memory type on family 10 processors, instead converting what would be WC+ memory to CD type. On guests using nested pages this could result in performance degradation. This patch enables WC+.
Signed-off-by Boris Ostrovsky <[email protected]>diff -r
b6195e277da5-r1963e398ba0fxen/arch/x86/cpu/amd.cxen/arch/x86/cpu/amd.c +0
-0@@ -495,6 +495,18 @@ static void __devinit init_amd(struct cpset_bit (X86_FEATURE_ARAT , c->x86_capability);/*
xen/arch/x86/cpu/amd.c static void __devinit init_amd(struct cp · line 507
Quoted 10 lines
xen/arch/x86/cpu/amd.c +10
-0+* On family 10h BIOS may not have properly enabled WC+ support, causing +* it to be converted to CD memtype. This may result in performance +* degradation for certain nested-paging guests. Prevent this conversion +* by enabling WC+ support through MSRC001_1024A[24] = 0 +*/ +if (c->x86 ==0x10 ) { +rdmsr_safe (0xc001102a , value); + value &= ~(1ULL <<24 ); +wrmsr_safe (0xc001102a , value); + }
Purely on style rather than content:
If we know the family type and can be certain that the MSRs are good, then you should not be using the _safe variants.
If we don't know for certain that the MSRs are safe to use, then errors should be caught and at the very least use warn the user.
Secondly, can we name the MSRs rather than using magic values.
~Andrew
Quoted 11 lines
xen/arch/x86/cpu/amd.c +2
-0+ +/* * Prior to Family 0x14, perf counters are not reset during warm reboot. * We have to reset them manually. */ _______________________________________________
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Quoted 18 lines · Boris Ostrovsky
# HG changeset patch
# User Boris Ostrovsky <[email protected]> # Date 1358429914 18000
# Node ID1963e398ba0f5dd61818d92400c7b07a32f6da4b# Parentb6195e277da52129d5d79f29ccac0e7290643e37
AMD: Enable WC+ memory type on family 10 processorsIn some cases BIOS may not enable WC+ memory type on family 10 processors, instead converting what would be WC+ memory to CD type. On guests using nested pages this could result in performance degradation. This patch enables WC+.
Signed-off-by Boris Ostrovsky <[email protected]>diff -r
b6195e277da5-r1963e398ba0fxen/arch/x86/cpu/amd.c
xen/arch/x86/cpu/amd.c static void __devinit init_amd(struct cp · line 501
Quoted 7 lines
xen/arch/x86/cpu/amd.c +4
-0@@ -495,6 +495,18 @@ static void __devinit init_amd(struct cpset_bit (X86_FEATURE_ARAT , c->x86_capability);/* +* On family 10h BIOS may not have properly enabled WC+ support, causing +* it to be converted to CD memtype. This may result in performance +* degradation for certain nested-paging guests. Prevent this conversion +* by enabling WC+ support through MSRC001_1024A[24] = 0
Pedantic: The MSR number seems to have a surplus 4 in it...
--
Mats
Quoted 19 lines
xen/arch/x86/cpu/amd.c +8
-0+*/ +if (c->x86 ==0x10 ) { +rdmsr_safe (0xc001102a , value); + value &= ~(1ULL <<24 ); +wrmsr_safe (0xc001102a , value); + } + +/* * Prior to Family 0x14, perf counters are not reset during warm reboot. * We have to reset them manually. */ _______________________________________________
Xen-devel mailing list
[email protected]
http://lists.xen.org/xen-devel
Quoted 13 lines · Boris Ostrovsky
AMD: Enable WC+ memory type on family 10 processors
In some cases BIOS may not enable WC+ memory type on family 10 processors, instead converting what would be WC+ memory to CD type. On guests using nested pages this could result in performance degradation. This patch enables WC+.
Signed-off-by Boris Ostrovsky <[email protected]>diff -r
b6195e277da5-r1963e398ba0fxen/arch/x86/cpu/amd.c
xen/arch/x86/cpu/amd.c static void __devinit init_amd(struct cp · line 501
Quoted 7 lines
xen/arch/x86/cpu/amd.c +4
-0@@ -495,6 +495,18 @@ static void __devinit init_amd(struct cpset_bit (X86_FEATURE_ARAT , c->x86_capability);/* +* On family 10h BIOS may not have properly enabled WC+ support, causing +* it to be converted to CD memtype. This may result in performance +* degradation for certain nested-paging guests. Prevent this conversion +* by enabling WC+ support through MSRC001_1024A[24] = 0
This register in the comment doesn't seem to agree with the one used below.
xen/arch/x86/cpu/amd.c static void __devinit init_amd(struct cp · line 507
Quoted 6 lines
xen/arch/x86/cpu/amd.c +6
-0+*/ +if (c->x86 ==0x10 ) { +rdmsr_safe (0xc001102a , value); + value &= ~(1ULL <<24 ); +wrmsr_safe (0xc001102a , value); + }
David