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weird HAL2

DISCUSSION Ulf Carlsson 4 participants 6 messages Feb 2, 1999 MIPS

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Ulf Carlsson

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#0 lore raw
Quoted 6 lines · Thomas Bogendoerfer
Quoted 2 lines · Ulf Carlsson

Is it possible to download the BIOS and disassemble it to check how to do it correctly?

should be doable, but I guess disassembling the IRIX driver might be easier. I've hoped someone at SGI could help us out.

I think we should ask them kindly then:

Does anyone at SGI know how the HAL2 works?

We can't get it working correctly, it doesn't come back to normal state after the reset. Even if we write 0x0018 to isr, to enable the chip, it still shows 0x0000. It's certainly off because we can't write to the indirect registers in this state

If we don't reset the HAL2, leaving it the way it is when after playing the boot sound, we can't write to the indirect registers. The busy bit doesn't go off.

The only thing which works correctly is reading the version register.

- Ulf

#1 lore raw
Quoted 9 lines · Ulf Carlsson
Quoted 6 lines · Thomas Bogendoerfer
Quoted 2 lines · Ulf Carlsson

Is it possible to download the BIOS and disassemble it to check how to do it correctly?

should be doable, but I guess disassembling the IRIX driver might be easier. I've hoped someone at SGI could help us out.

Quoted 9 lines

I think we should ask them kindly then:

Does anyone at SGI know how the HAL2 works?

We can't get it working correctly, it doesn't come back to normal state after the reset. Even if we write 0x0018 to isr, to enable the chip, it still shows 0x0000. It's certainly off because we can't write to the indirect registers in this state

I don't know anything about the HAL2, but looking in hal2.h it says 0=reset, so from what I can see you write 0x0018 to it and then it should read 0x0000 when it is reset. Maybe this part is working ok for you and the problem is further along?

There are other people who would know this better though!

Cheers, Alistair

Quoted 6 lines

If we don't reset the HAL2, leaving it the way it is when after playing the boot sound, we can't write to the indirect registers. The busy bit doesn't go off.

The only thing which works correctly is reading the version register.

- Ulf

Signature · 6 lines
Alistair Lambie                                [email protected]
SGI Global Product Support            SGI Voicemail/VNET: 234-1455
Level 5, Cigna House,                                M/S: INZ-3780
PO Box 24 093,                                  Ph: +64-4-494 6325
40 Mercer St, Wellington,                      Fax: +64-4-494 6321
New Zealand                                 Mobile: +64-21-635 262
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#2 lore raw
Quoted 3 lines

I don't know anything about the HAL2, but looking in hal2.h it says 0=reset, so from what I can see you write 0x0018 to it and then it should read 0x0000 when it is reset.

The spec says:

Bit 3, Global reset R/W:
Assertion of hardware reset i.e. RESET_N, set this to zero. Software brings the HAL2 out of reset by setting this bit and may reset the HAL2 by clearing it. Please note: this bit must be set before any other internal register access occurs.
RESET = 0;
ACTIVE = 1;

Bit 4, Codec reset R/W:
Value reflected to CODEC_RESET_N pin. To reset external codecs and other external devices.
RESET = 0; ACTIVE = 1;

This is exactly what I'm trying to do by first writing 0x0000 to isr, waiting some us, and then writing 0x0018. Then the card should be active and isr should IMHO contain 0x0018.

Quoted 1 line

Maybe this part is working ok for you and the problem is further along?

Nope.

- Ulf

#3 lore raw
Quoted 3 lines

This is exactly what I'm trying to do by first writing 0x0000 to isr, waiting some us, and then writing 0x0018. Then the card should be active and isr should IMHO contain 0x0018.

Stupid question but does

write 0x0010
wait 10uS
write 0x0018

work ?

(ie do you have to bring them out of reset card, then codec ?

maintainer
#4 lore raw
Quoted 6 lines · Alan Cox

write 0x0010
wait 10uS
write 0x0018

work ?

not for me.

Thomas.

Signature · 3 lines
   This device has completely bogus header. Compaq scores again :-|
It's a host bridge, but it should be called ghost bridge instead ;^)
                                        [Martin `MJ' Mares on linux-kernel]
#5 lore raw
In reply to Ulf Carlsson
Quoted 5 lines · Ulf Carlsson
Quoted 4 lines

I don't know anything about the HAL2, but looking in hal2.h it says 0=reset, so from what I can see you write 0x0018 to it and then it should read 0x0000 when it is reset.

write 0x0
wait 50us
write 0x18

write to indirect data reg
write to indirect addr reg

spin until idirect status reg transaction status reg clears

.....

Quoted 24 lines

The spec says:

Bit 3, Global reset R/W:
Assertion of hardware reset i.e. RESET_N, set this to zero. Software brings the HAL2 out of reset by setting this bit and may reset the HAL2 by clearing it. Please note: this bit must be set before any other internal register access occurs.
RESET = 0;
ACTIVE = 1;

Bit 4, Codec reset R/W:
Value reflected to CODEC_RESET_N pin. To reset external codecs and other external devices.
RESET = 0; ACTIVE = 1;

This is exactly what I'm trying to do by first writing 0x0000 to isr, waiting some us, and then writing 0x0018. Then the card should be active and isr should IMHO contain 0x0018.

Quoted 1 line

Maybe this part is working ok for you and the problem is further along?

Nope.

- Ulf

Signature · 6 lines
Alistair Lambie                                [email protected]
SGI Global Product Support            SGI Voicemail/VNET: 234-1455
Level 5, Cigna House,                                M/S: INZ-3780
PO Box 24 093,                                  Ph: +64-4-494 6325
40 Mercer St, Wellington,                      Fax: +64-4-494 6321
New Zealand                                 Mobile: +64-21-635 262