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drm/amd/powerplay/hwmgr: Adjustments for eight function implementations

PATCH New SF Markus Elfring 1 participant 4 messages Feb 8, 2018

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#0 lore raw

cover drm/amd/powerplay/hwmgr: Adjustments for eight function implementations

From: Markus Elfring <[email protected]>
Date: Thu, 8 Feb 2018 21:37:42 +0100

Three update suggestions were taken into account
from static source code analysis.

Markus Elfring (3):
Delete an error message for a failed memory allocation in three functions Adjust layout for source code from five if statements
Delete an unnecessary return statement in three functions

 drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c     | 37 ++++++++++------------
 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c        | 35 +++++++++-----------
 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c   |  5 +--
 drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c     |  4 +--
 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c |  1 -
 5 files changed, 35 insertions(+), 47 deletions(-)
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#1 lore raw

PATCH 1/3 drm/amd/powerplay/hwmgr: Delete an error message for a failed memory allocation in three functions

From: Markus Elfring <[email protected]>
Date: Thu, 8 Feb 2018 20:32:39 +0100

Omit an extra message for a memory allocation failure in these functions.

This issue was detected by using the Coccinelle software.

---
 drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c | 4 +---
 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c    | 1 -
 drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c | 4 +---
 3 files changed, 2 insertions(+), 7 deletions(-)
drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c +1 -3
index b314d09d41af..c0699b884894 100644
@@ -286,10 +286,8 @@ static int cz_init_dynamic_state_adjustment_rule_settings(
 	struct phm_clock_voltage_dependency_table *table_clk_vlt =
 					kzalloc(table_size, GFP_KERNEL);
 
-	if (NULL == table_clk_vlt) {
-		pr_err("Can not allocate memory!\n");
+	if (!table_clk_vlt)
 		return -ENOMEM;
-	}
 
 	table_clk_vlt->count = 8;
 	table_clk_vlt->entries[0].clk = PP_DAL_POWERLEVEL_0;
drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c +0 -1
index 0229f774f7a9..ded33ed03f11 100644
@@ -815,7 +815,6 @@ int phm_initializa_dynamic_state_adjustment_rule_settings(struct pp_hwmgr *hwmgr
 	table_clk_vlt = kzalloc(table_size, GFP_KERNEL);
 
 	if (NULL == table_clk_vlt) {
-		pr_err("Can not allocate space for vddc_dep_on_dal_pwrl! \n");
 		return -ENOMEM;
 	} else {
 		table_clk_vlt->count = 4;
drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c +1 -3
index 569073e3a5a1..967b93e56113 100644
@@ -107,10 +107,8 @@ static int rv_init_dynamic_state_adjustment_rule_settings(
 	struct phm_clock_voltage_dependency_table *table_clk_vlt =
 					kzalloc(table_size, GFP_KERNEL);
 
-	if (NULL == table_clk_vlt) {
-		pr_err("Can not allocate memory!\n");
+	if (!table_clk_vlt)
 		return -ENOMEM;
-	}
 
 	table_clk_vlt->count = 8;
 	table_clk_vlt->entries[0].clk = PP_DAL_POWERLEVEL_0;
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#2 lore raw

PATCH 2/3 drm/amd/powerplay/hwmgr: Adjust layout for source code from five if statements

In reply to SF Markus Elfring

From: Markus Elfring <[email protected]>
Date: Thu, 8 Feb 2018 21:01:24 +0100

The script "checkpatch.pl" pointed information out like the following.

WARNING: Comparisons should place the constant on the right side of the test
WARNING: else is not generally useful after a break or return

Thus fix the affected source code places.

---
 drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c   | 33 +++++++++++-------------
 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c      | 31 +++++++++++-----------
 drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c |  5 ++--
 3 files changed, 33 insertions(+), 36 deletions(-)
drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c +15 -18
index c0699b884894..870c517f2057 100644
@@ -1772,37 +1772,34 @@ static int cz_read_sensor(struct pp_hwmgr *hwmgr, int idx,
 		return 0;
 	case AMDGPU_PP_SENSOR_UVD_VCLK:
 		if (!cz_hwmgr->uvd_power_gated) {
-			if (uvd_index >= CZ_MAX_HARDWARE_POWERLEVELS) {
+			if (uvd_index >= CZ_MAX_HARDWARE_POWERLEVELS)
 				return -EINVAL;
-			} else {
-				vclk = uvd_table->entries[uvd_index].vclk;
-				*((uint32_t *)value) = vclk;
-				return 0;
-			}
+
+			vclk = uvd_table->entries[uvd_index].vclk;
+			*((uint32_t *)value) = vclk;
+			return 0;
 		}
 		*((uint32_t *)value) = 0;
 		return 0;
 	case AMDGPU_PP_SENSOR_UVD_DCLK:
 		if (!cz_hwmgr->uvd_power_gated) {
-			if (uvd_index >= CZ_MAX_HARDWARE_POWERLEVELS) {
+			if (uvd_index >= CZ_MAX_HARDWARE_POWERLEVELS)
 				return -EINVAL;
-			} else {
-				dclk = uvd_table->entries[uvd_index].dclk;
-				*((uint32_t *)value) = dclk;
-				return 0;
-			}
+
+			dclk = uvd_table->entries[uvd_index].dclk;
+			*((uint32_t *)value) = dclk;
+			return 0;
 		}
 		*((uint32_t *)value) = 0;
 		return 0;
 	case AMDGPU_PP_SENSOR_VCE_ECCLK:
 		if (!cz_hwmgr->vce_power_gated) {
-			if (vce_index >= CZ_MAX_HARDWARE_POWERLEVELS) {
+			if (vce_index >= CZ_MAX_HARDWARE_POWERLEVELS)
 				return -EINVAL;
-			} else {
-				ecclk = vce_table->entries[vce_index].ecclk;
-				*((uint32_t *)value) = ecclk;
-				return 0;
-			}
+
+			ecclk = vce_table->entries[vce_index].ecclk;
+			*((uint32_t *)value) = ecclk;
+			return 0;
 		}
 		*((uint32_t *)value) = 0;
 		return 0;
drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c +15 -16
index ded33ed03f11..2681c9317d25 100644
@@ -813,24 +813,23 @@ int phm_initializa_dynamic_state_adjustment_rule_settings(struct pp_hwmgr *hwmgr
 	/* initialize vddc_dep_on_dal_pwrl table */
 	table_size = sizeof(uint32_t) + 4 * sizeof(struct phm_clock_voltage_dependency_record);
 	table_clk_vlt = kzalloc(table_size, GFP_KERNEL);
-
-	if (NULL == table_clk_vlt) {
+	if (!table_clk_vlt)
 		return -ENOMEM;
-	} else {
-		table_clk_vlt->count = 4;
-		table_clk_vlt->entries[0].clk = PP_DAL_POWERLEVEL_ULTRALOW;
-		table_clk_vlt->entries[0].v = 0;
-		table_clk_vlt->entries[1].clk = PP_DAL_POWERLEVEL_LOW;
-		table_clk_vlt->entries[1].v = 720;
-		table_clk_vlt->entries[2].clk = PP_DAL_POWERLEVEL_NOMINAL;
-		table_clk_vlt->entries[2].v = 810;
-		table_clk_vlt->entries[3].clk = PP_DAL_POWERLEVEL_PERFORMANCE;
-		table_clk_vlt->entries[3].v = 900;
-		if (pptable_info != NULL)
-			pptable_info->vddc_dep_on_dal_pwrl = table_clk_vlt;
-		hwmgr->dyn_state.vddc_dep_on_dal_pwrl = table_clk_vlt;
-	}
 
+	table_clk_vlt->count = 4;
+	table_clk_vlt->entries[0].clk = PP_DAL_POWERLEVEL_ULTRALOW;
+	table_clk_vlt->entries[0].v = 0;
+	table_clk_vlt->entries[1].clk = PP_DAL_POWERLEVEL_LOW;
+	table_clk_vlt->entries[1].v = 720;
+	table_clk_vlt->entries[2].clk = PP_DAL_POWERLEVEL_NOMINAL;
+	table_clk_vlt->entries[2].v = 810;
+	table_clk_vlt->entries[3].clk = PP_DAL_POWERLEVEL_PERFORMANCE;
+	table_clk_vlt->entries[3].v = 900;
+
+	if (pptable_info)
+		pptable_info->vddc_dep_on_dal_pwrl = table_clk_vlt;
+
+	hwmgr->dyn_state.vddc_dep_on_dal_pwrl = table_clk_vlt;
 	return 0;
 }
 
drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c +3 -2
index c6febbf0bf69..df8b3e67307e 100644
@@ -1031,8 +1031,9 @@ int atomctrl_calculate_voltage_evv_on_sclk(
 
 			*voltage = (uint16_t)fV_NL.partial.real;
 			break;
-		} else
-			fV_x = fAdd(fV_x, fStepSize);
+		}
+
+		fV_x = fAdd(fV_x, fStepSize);
 	}
 
 	return result;
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#3 lore raw

PATCH 3/3 drm/amd/powerplay/hwmgr: Delete an unnecessary return statement in three functions

In reply to SF Markus Elfring

From: Markus Elfring <[email protected]>
Date: Thu, 8 Feb 2018 21:10:58 +0100

The script "checkpatch.pl" pointed information out like the following.

WARNING: void function return statements are not generally useful

Thus remove such a statement in the affected functions.

---
 drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c        | 3 ---
 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 1 -
 2 files changed, 4 deletions(-)
drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c +0 -3
index 2681c9317d25..e07b32491092 100644
@@ -653,8 +653,6 @@ void phm_trim_voltage_table_to_fit_state_table(uint32_t max_vol_steps,
 		vol_table->entries[i] = vol_table->entries[i + diff];
 
 	vol_table->count = max_vol_steps;
-
-	return;
 }
 
 int phm_reset_single_dpm_table(void *table,
@@ -906,7 +904,6 @@ void hwmgr_init_default_caps(struct pp_hwmgr *hwmgr)
 
 	phm_cap_set(hwmgr->platform_descriptor.platformCaps,
 						PHM_PlatformCaps_FanSpeedInTableIsRPM);
-	return;
 }
 
 int hwmgr_set_user_specify_caps(struct pp_hwmgr *hwmgr)
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +0 -1
index 2d55dabc77d4..fcdb3563d860 100644
@@ -3618,7 +3618,6 @@ static uint32_t vega10_find_highest_dpm_level(
 static void vega10_apply_dal_minimum_voltage_request(
 		struct pp_hwmgr *hwmgr)
 {
-	return;
 }
 
 static int vega10_get_soc_index_for_max_uclk(struct pp_hwmgr *hwmgr)
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