Scalable Scheduling
Quoted 5 lines · Larry McVoy
Someobdy really ought to take the time to make a cache miss counter program that works like
/bin/time. So I could do$ cachemiss lat_ctx 2 10123 instruction, 22345 data, 50432 TLB flushes
Take a look at http://www.csd.uu.se/~mikpe/linux/perfctr/.
It's a patch to make the performance counters per-program, and make them easy to control.
There's an example program in there called perfex which does what you want, though the user interface isn't as simple as the above. You can do
perfex -e 0x00430046 lat_ctx 2
The last two digits of the -e value are the counter to be printed, which in this case (Athlon) is the data-TLB misses. That stuff is documented in
http://www.amd.com/products/cpg/athlon/techdocs/pdf/22007.pdf
page 164/180
It would be nice if the patch found it's way into the kernel.
If you have APIC support there is also infrastructure for profiling based on event-sampling instead of time sampling (sample every 100 cache misses instead of every 100us). (Sadly my old 0.25um Athlon has no APIC support).
Signature · 1 line
Erik Corry [email protected] Ceterum censeo, Microsoftem esse delendam!