add missing vectors to /proc/interrupts

diff -Nura 2.6.0-test3/arch/i386/kernel/apic.c proc.interrupts/arch/i386/kernel/apic.c
@@ -1077,6 +1077,7 @@
 	v = apic_read(APIC_ISR + ((SPURIOUS_APIC_VECTOR & ~0x1f) >> 1));
 	if (v & (1 << (SPURIOUS_APIC_VECTOR & 0x1f)))
 		ack_APIC_irq();
+	atomic_inc(&irq_spur_counts[smp_processor_id()]);
 
 	/* see sw-dev-man vol 3, chapter 7.4.13.5 */
 	printk(KERN_INFO "spurious APIC interrupt on CPU#%d, should never happen.\n",

@@ -1098,7 +1099,7 @@
 	apic_write(APIC_ESR, 0);
 	v1 = apic_read(APIC_ESR);
 	ack_APIC_irq();
-	atomic_inc(&irq_err_count);
+	atomic_inc(&irq_err_counts[smp_processor_id()]);
 
 	/* Here is what the APIC error bits mean:
 	   0: Send CS error

diff -Nura 2.6.0-test3/arch/i386/kernel/cpu/mcheck/p4.c proc.interrupts/arch/i386/kernel/cpu/mcheck/p4.c
@@ -59,11 +59,13 @@
 }
 
 /* Thermal interrupt handler for this CPU setup */
+
 static void (*vendor_thermal_interrupt)(struct pt_regs *regs) = unexpected_thermal_interrupt;
 
 asmlinkage void smp_thermal_interrupt(struct pt_regs regs)
 {
 	irq_enter();
+	atomic_inc(&irq_thermal_counts[smp_processor_id()]);
 	vendor_thermal_interrupt(&regs);
 	irq_exit();
 }

diff -Nura 2.6.0-test3/arch/i386/kernel/i8259.c proc.interrupts/arch/i386/kernel/i8259.c
@@ -228,7 +228,7 @@
 			printk("spurious 8259A interrupt: IRQ%d.\n", irq);
 			spurious_irq_mask |= irqmask;
 		}
-		atomic_inc(&irq_err_count);
+		atomic_inc(&irq_err_counts[smp_processor_id()]);
 		/*
 		 * Theoretically we do not have to handle this IRQ,
 		 * but in Linux this does not cause problems and is

diff -Nura 2.6.0-test3/arch/i386/kernel/io_apic.c proc.interrupts/arch/i386/kernel/io_apic.c
@@ -1859,7 +1859,8 @@
 #endif
 
 #ifdef APIC_MISMATCH_DEBUG
-		atomic_inc(&irq_mis_count);
+		/* accumulated per-cpu as this makes /proc/interrupts code simple */
+		atomic_inc(&irq_mis_counts[smp_processor_id()]);
 #endif
 		spin_lock(&ioapic_lock);
 		__mask_and_edge_IO_APIC_irq(irq);

90 lines not on this page · raw message

diff -Nura 2.6.0-test3/arch/i386/kernel/smp.c proc.interrupts/arch/i386/kernel/smp.c
@@ -304,12 +304,12 @@
  * 1) Flush the tlb entries if the cpu uses the mm that's being flushed.
  * 2) Leave the mm if we are in the lazy tlb mode.
  */
-
 asmlinkage void smp_invalidate_interrupt (void)
 {
 	unsigned long cpu;
 
 	cpu = get_cpu();
+	atomic_inc(&irq_tlb_counts[cpu]);
 
 	if (!test_bit(cpu, &flush_cpumask))
 		goto out;

@@ -562,6 +562,7 @@
 asmlinkage void smp_reschedule_interrupt(void)
 {
 	ack_APIC_irq();
+	atomic_inc(&irq_resched_counts[smp_processor_id()]);
 }
 
 asmlinkage void smp_call_function_interrupt(void)

@@ -571,6 +572,7 @@
 	int wait = call_data->wait;
 
 	ack_APIC_irq();
+	atomic_inc(&irq_call_counts[smp_processor_id()]);
 	/*
 	 * Notify initiating CPU that I've grabbed the data and am
 	 * about to execute the function

diff -Nura 2.6.0-test3/include/asm-i386/apic.h proc.interrupts/include/asm-i386/apic.h
@@ -6,6 +6,7 @@
 #include <asm/fixmap.h>
 #include <asm/apicdef.h>
 #include <asm/system.h>
+#include <asm/atomic.h>
 
 #define APIC_DEBUG 0
 

@@ -91,6 +92,9 @@
 extern int check_nmi_watchdog (void);
 extern void enable_NMI_through_LVT0 (void * dummy);
 
+extern atomic_t irq_spur_counts [NR_CPUS];
+extern atomic_t irq_thermal_counts [NR_CPUS];
+
 extern unsigned int nmi_watchdog;
 #define NMI_NONE	0
 #define NMI_IO_APIC	1

diff -Nura 2.6.0-test3/include/asm-i386/hw_irq.h proc.interrupts/include/asm-i386/hw_irq.h
@@ -61,8 +61,11 @@
 
 extern unsigned long io_apic_irqs;
 
-extern atomic_t irq_err_count;
-extern atomic_t irq_mis_count;
+extern atomic_t irq_err_counts [NR_CPUS];
+extern atomic_t irq_mis_counts [NR_CPUS];
+extern atomic_t irq_call_counts [NR_CPUS];
+extern atomic_t irq_resched_counts [NR_CPUS];
+extern atomic_t irq_tlb_counts [NR_CPUS];
 
 #define IO_APIC_IRQ(x) (((x) >= 16) || ((1<<(x)) & io_apic_irqs))