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mpc824x: set PCI latency timer to a sane value.

PATCH New Gleb Natapov 2 participants 2 messages Sep 7, 2004 – Jan 9, 2005

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#0 lore raw

PATCH 1/1 mpc824x: set PCI latency timer to a sane value.

It is 0 after reset.

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Gleb.
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Index: cpu/mpc824x/cpu_init.c
===================================================================
RCS file: /cvsroot/u-boot/u-boot/cpu/mpc824x/cpu_init.c,v retrieving revision 1.4

mpc824x/cpu_init.c +1 -1
diff -u -r1.4 cpu_init.c
@@ -90,7 +90,7 @@
 #endif
 
 	CONFIG_WRITE_BYTE(PCLSR, 0x8);	/* set PCI cache line size */
-
+	CONFIG_WRITE_BYTE (PLTR, 0x40); /* set PCI latency timer */
 	/*
 	* Note that although this bit is cleared after a hard reset, it
 	* must be explicitly set and then cleared by software during
#1 lore raw

PATCH 1/1 mpc824x: set PCI latency timer to a sane value.

Quoted 2 lines · In message <[email protected]> you wrote:

It is 0 after reset.

Added, thanks.

Best regards,

Wolfgang Denk

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Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
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