Revamp exception handling in the kernel

This works for me on 32-bit (c3k, latest cvs head) + patches. Passes my multi-kill-kernel and test-lws tests, along with a kernel build. It includes my changes for LWS.

I say it's good to checkin.

c.

Index: arch/parisc/kernel/asm-offsets.c
===================================================================
RCS file: /var/cvs/linux-2.6/arch/parisc/kernel/asm-offsets.c,v retrieving revision 1.10

diff -u -p -r1.10 asm-offsets.c
@@ -38,6 +38,7 @@
 #include <asm/ptrace.h>
 #include <asm/processor.h>
 #include <asm/pdc.h>
+#include <asm/uaccess.h>
 
 #define DEFINE(sym, val) \
 	asm volatile("\n->" #sym " %0 " #val : : "i" (val))

@@ -291,5 +292,8 @@ int main(void)
 	DEFINE(ASM_PT_INITIAL, PT_INITIAL);
 	DEFINE(ASM_PAGE_SIZE, PAGE_SIZE);
 	BLANK();
+	DEFINE(EXCDATA_IP, offsetof(struct exception_data, fault_ip));
+	DEFINE(EXCDATA_SPACE, offsetof(struct exception_data, fault_space));
+	DEFINE(EXCDATA_ADDR, offsetof(struct exception_data, fault_addr));
 	return 0;
 }

Index: arch/parisc/kernel/syscall.S
===================================================================
RCS file: /var/cvs/linux-2.6/arch/parisc/kernel/syscall.S,v retrieving revision 1.14

diff -u -p -r1.14 syscall.S
@@ -29,6 +29,19 @@
 #else
 	.level		1.1
 #endif
+
+#ifndef __LP64__
+	.macro fixup_branch,lbl
+	b	    \lbl
+	.endm
+#else
+	.macro fixup_branch,lbl
+	ldil	    L%\lbl, %r1
+	ldo	    R%\lbl(%r1), %r1
+	bv,n        %r0(%r1)
+	.endm
+#endif
+
 	.text
 
 	.import syscall_exit,code

@@ -575,10 +588,7 @@ cas_action:
 	/* Return to userspace, set no error */
 	b	lws_exit
 	copy	%r0, %r21
-	nop	/* Add some visual space in objdump */
-	nop
-	nop
-	nop
+
 3:		
 	/* Error occured on load or store */
 #ifdef CONFIG_SMP

@@ -596,15 +606,16 @@ cas_action:
 	nop
 
 	/* Two exception table entries, one for the load,
-	   the other for the store. Either return -EFAULT */
+	   the other for the store. Either return -EFAULT.
+	   Each of the entries must be relocated. */
 	.section __ex_table,"aw"
 #ifdef __LP64__
 	/* Pad the address calculation */
 	.word	0,(2b - linux_gateway_page)
-	.dword	(3b - 2b) 
+	.word	0,(3b - linux_gateway_page)
 #else
-	.word	2b - linux_gateway_page
-	.word	(3b - 2b) 
+	.word	(2b - linux_gateway_page)
+	.word	(3b - linux_gateway_page)
 #endif
 	.previous
 

@@ -612,10 +623,10 @@ cas_action:
 #ifdef __LP64__
 	/* Pad the address calculation */
 	.word	0,(1b - linux_gateway_page)
-	.dword	(3b - 1b) 
+	.word	0,(3b - linux_gateway_page)
 #else
-	.word	1b - linux_gateway_page
-	.word	(3b - 1b) 
+	.word	(1b - linux_gateway_page)
+	.word	(3b - linux_gateway_page)
 #endif
 	.previous
 

Index: arch/parisc/kernel/unaligned.c
===================================================================
RCS file: /var/cvs/linux-2.6/arch/parisc/kernel/unaligned.c,v retrieving revision 1.8

Index: arch/parisc/lib/Makefile
===================================================================
RCS file: /var/cvs/linux-2.6/arch/parisc/lib/Makefile,v retrieving revision 1.2

diff -u -p -r1.2 Makefile
@@ -2,6 +2,6 @@
 # Makefile for parisc-specific library files
 #
 
-lib-y	:= lusercopy.o bitops.o checksum.o io.o memset.o
+lib-y	:= lusercopy.o bitops.o checksum.o io.o memset.o fixup.o
 
 lib-$(CONFIG_SMP) += debuglocks.o

Index: arch/parisc/lib/lusercopy.S
===================================================================
RCS file: /var/cvs/linux-2.6/arch/parisc/lib/lusercopy.S,v retrieving revision 1.3

Index: arch/parisc/mm/fault.c
===================================================================
RCS file: /var/cvs/linux-2.6/arch/parisc/mm/fault.c,v retrieving revision 1.1

diff -u -p -r1.1 fault.c
@@ -36,6 +36,9 @@
 
 #define BITSSET		0x1c0	/* for identifying LDCW */
 
+
+DEFINE_PER_CPU(struct exception_data, exception_data);
+
 /*
  * parisc_acctyp(unsigned int inst) --
  *    Given a PA-RISC memory access instruction, determine if the

@@ -234,13 +237,16 @@ no_context:
 		fix = search_exception_tables(regs->iaoq[0]);
 
 		if (fix) {
+			struct exception_data *d;
+
+printk("applying fixup for 0x%lx, fixup at 0x%lx\n", regs->iaoq[0], fix->fixup & ~3);
 
-			if (fix->skip & 1) 
-				regs->gr[8] = -EFAULT;
-			if (fix->skip & 2)
-				regs->gr[9] = 0;
+			d = &__get_cpu_var(exception_data);
+			d->fault_ip = regs->iaoq[0];
+			d->fault_space = regs->isr;
+			d->fault_addr = regs->ior;
 
-			regs->iaoq[0] += ((fix->skip) & ~3);
+			regs->iaoq[0] = ((fix->fixup) & ~3);
 
 			/*
 			 * NOTE: In some cases the faulting instruction

Index: include/asm-parisc/uaccess.h
===================================================================
RCS file: /var/cvs/linux-2.6/include/asm-parisc/uaccess.h,v retrieving revision 1.15

_______________________________________________
parisc-linux mailing list
[email protected]
http://lists.parisc-linux.org/mailman/listinfo/parisc-linux

Yeah, you can't let this happen. The test is a bit rough on your box, I've always turnes OOM off and minimized the number of *other* running processes. The test (I think) has a tunable for memory to try capture before running the CAS. That particular part of the test is trying to see if CAS'ing on swapped pages is atomic or non-atomic by signaling the process during a write to a swapped page.

c.

_______________________________________________
parisc-linux mailing list
[email protected]
http://lists.parisc-linux.org/mailman/listinfo/parisc-linux