x86 candidate patches for review IV: more misc patches
Subsystems (13)
PATCH 4/26 i386: Remove unneeded externs in nmi.c
In reply to Andi KleenAll were already in some header
--- arch/i386/kernel/nmi.c | 3 --- 1 file changed, 3 deletions(-)
arch/i386/kernel/nmi.c +0 -3
@@ -75,9 +75,6 @@ static DEFINE_PER_CPU(struct nmi_watchdo/* local prototypes */ static int unknown_nmi_panic_callback (struct pt_regs *regs,int cpu); -extern void show_registers (struct pt_regs *regs); -extern int unknown_nmi_panic; -/* converts an msr to an appropriate reservation bit */ static inline unsigned int nmi_perfctr_msr_to_bit (unsigned int msr) {
cover x86 candidate patches for review IV: more misc patches
- New smp_ops interface to handle Xen and other non APIC subarchitectures cleanly
- Fix vmalloc_32() on 64bit systems
- Finally fix compat vDSO
- Initial per CPU cleanups. Now the in core kernel per cpu data doesn't have a upper limit anymore.
- Some AMD Family 10h support
- Many cleanups
Please review.
-Andi
PATCH 25/26 x86_64: x86-64 system crashes when no memory populating Node 0
From: James Puthukattukaran <[email protected]>
I have a 4 socket AMD Operton system. The 2.6.18 kernel I have crashes when there is no memory in node0.
AK: changed call to _nopanic
---
arch/x86_64/kernel/aperture.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)
arch/x86_64/kernel/aperture.c +2 -3
@@ -51,7 +51,6 @@ static void __init insert_aperture_resoustatic u32 __init allocate_aperture (void ) { -pg_data_t *nd0 =NODE_DATA (0 );u32 aper_size;void *p;
@@ -65,12 +64,12 @@ static u32 __init allocate_aperture(void* Unfortunately we cannot move it up because that would make the * IOMMU useless. */ - p =__alloc_bootmem_node (nd0, aper_size, aper_size,0 ); + p =__alloc_bootmem_nopanic (aper_size, aper_size,0 );if (!p ||__pa (p)+aper_size >0xffffffff ) {printk ("Cannot allocate aperture memory hole (%p,%uK)\n" , p, aper_size>>10 );if (p) -free_bootmem_node (nd0,__pa (p), aper_size); +free_bootmem (__pa (p), aper_size);return 0 ; } printk("Mapping aperture over %d KB of RAM @ %lx\n",
PATCH 21/26 x86: Clean up x86 control register and MSR macros (corrected)
In reply to Andi KleenFrom: "H. Peter Anvin" <[email protected]>
This patch is based on Rusty's recent cleanup of the EFLAGS-related macros; it extends the same kind of cleanup to control registers and MSRs.
It also unifies these between i386 and x86-64; at least with regards to MSRs, the two had definitely gotten out of sync.
--- include/asm-i386/Kbuild | 2 include/asm-i386/msr-index.h | 273 ++++++++++++++++++++++++++++++++++ include/asm-i386/msr.h | 237 ------------------------------ include/asm-i386/processor-flags.h | 65 ++++++++ include/asm-i386/processor.h | 35 ---- include/asm-x86_64/Kbuild | 3 include/asm-x86_64/msr-index.h | 1 include/asm-x86_64/msr.h | 274 ----------------------------------- include/asm-x86_64/processor-flags.h | 27 --- include/asm-x86_64/processor.h | 31 --- 10 files changed, 356 insertions(+), 592 deletions(-)
include/asm-i386/Kbuild +2 -0
@@ -3,8 +3,10 @@ include include/asm-generic/Kbuild.asm header-y += boot.h header-y += debugreg.h header-y += ldt.h +header-y += msr-index.h header-y += ptrace-abi.h header-y += ucontext.h +unifdef-y += msr.h unifdef-y += mtrr.h unifdef-y += vm86.h
include/asm-i386/msr-index.h new file +273 -0
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include/asm-i386/msr.h +7 -230
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include/asm-i386/processor-flags.h +65 -0
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include/asm-i386/processor.h +0 -35
@@ -143,21 +143,6 @@ static inline void native_cpuid(unsigned#define load_cr3 (pgdir) write_cr3(__pa(pgdir))/* -* Intel CPU features in CR4 -*/ -#define X86_CR4_VME 0x0001/* enable vm86 extensions */ -#define X86_CR4_PVI 0x0002/* virtual interrupts flag enable */ -#define X86_CR4_TSD 0x0004/* disable time stamp at ipl 3 */ -#define X86_CR4_DE 0x0008/* enable debugging extensions */ -#define X86_CR4_PSE 0x0010/* enable page size extensions */ -#define X86_CR4_PAE 0x0020/* enable physical address extensions */ -#define X86_CR4_MCE 0x0040/* Machine check enable */ -#define X86_CR4_PGE 0x0080/* enable global pages */ -#define X86_CR4_PCE 0x0100/* enable performance counters at ipl 3 */ -#define X86_CR4_OSFXSR 0x0200/* enable fast FPU save and restore */ -#define X86_CR4_OSXMMEXCPT 0x0400/* enable unmasked SSE exceptions */ - -/* * Save the cr4 feature set we're using (ie * Pentium 4MB enable and PPro Global page * enable), so that any CPU's that boot up
@@ -184,26 +169,6 @@ static inline void clear_in_cr4 (unsigne }/* -* NSC/Cyrix CPU configuration register indexes -*/ - -#define CX86_PCR0 0x20 -#define CX86_GCR 0xb8 -#define CX86_CCR0 0xc0 -#define CX86_CCR1 0xc1 -#define CX86_CCR2 0xc2 -#define CX86_CCR3 0xc3 -#define CX86_CCR4 0xe8 -#define CX86_CCR5 0xe9 -#define CX86_CCR6 0xea -#define CX86_CCR7 0xeb -#define CX86_PCR1 0xf0 -#define CX86_DIR0 0xfe -#define CX86_DIR1 0xff -#define CX86_ARR_BASE 0xc4 -#define CX86_RCR_BASE 0xdc - -/* * NSC/Cyrix CPU indexed register access macros */
include/asm-x86_64/Kbuild +2 -1
@@ -8,7 +8,7 @@ header-y += boot.h header-y += bootsetup.h header-y += debugreg.h header-y += ldt.h -header-y += msr.h +header-y += msr-index.h header-y += prctl.h header-y += ptrace-abi.h header-y += sigcontext32.h
@@ -16,6 +16,7 @@ header-y += ucontext.h header-y += vsyscall32.h unifdef-y += mce.h +unifdef-y += msr.h unifdef-y += mtrr.h unifdef-y += vsyscall.h unifdef-y += const.h
include/asm-x86_64/msr-index.h new file +1 -0
@@ -0,0 +1 @@ +#include <asm-i386/msr-index.h>
include/asm-x86_64/msr.h +5 -269
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include/asm-x86_64/processor-flags.h +1 -26
@@ -1,26 +1 @@ -#ifndef __ASM_X86_64_PROCESSOR_FLAGS_H -#define __ASM_X86_64_PROCESSOR_FLAGS_H -/* Various flags defined: can be included from assembler. */ - -/* -* EFLAGS bits -*/ -#define X86_EFLAGS_CF 0x00000001/* Carry Flag */ -#define X86_EFLAGS_PF 0x00000004/* Parity Flag */ -#define X86_EFLAGS_AF 0x00000010/* Auxillary carry Flag */ -#define X86_EFLAGS_ZF 0x00000040/* Zero Flag */ -#define X86_EFLAGS_SF 0x00000080/* Sign Flag */ -#define X86_EFLAGS_TF 0x00000100/* Trap Flag */ -#define X86_EFLAGS_IF 0x00000200/* Interrupt Flag */ -#define X86_EFLAGS_DF 0x00000400/* Direction Flag */ -#define X86_EFLAGS_OF 0x00000800/* Overflow Flag */ -#define X86_EFLAGS_IOPL 0x00003000/* IOPL mask */ -#define X86_EFLAGS_NT 0x00004000/* Nested Task */ -#define X86_EFLAGS_RF 0x00010000/* Resume Flag */ -#define X86_EFLAGS_VM 0x00020000/* Virtual Mode */ -#define X86_EFLAGS_AC 0x00040000/* Alignment Check */ -#define X86_EFLAGS_VIF 0x00080000/* Virtual Interrupt Flag */ -#define X86_EFLAGS_VIP 0x00100000/* Virtual Interrupt Pending */ -#define X86_EFLAGS_ID 0x00200000/* CPUID detection flag */ - -#endif /* __ASM_X86_64_PROCESSOR_FLAGS_H */ +#include <asm-i386/processor-flags.h>
include/asm-x86_64/processor.h +0 -31
@@ -104,21 +104,6 @@ extern unsigned int init_intel_cacheinfoextern unsigned short num_cache_leaves;/* -* Intel CPU features in CR4 -*/ -#define X86_CR4_VME 0x0001/* enable vm86 extensions */ -#define X86_CR4_PVI 0x0002/* virtual interrupts flag enable */ -#define X86_CR4_TSD 0x0004/* disable time stamp at ipl 3 */ -#define X86_CR4_DE 0x0008/* enable debugging extensions */ -#define X86_CR4_PSE 0x0010/* enable page size extensions */ -#define X86_CR4_PAE 0x0020/* enable physical address extensions */ -#define X86_CR4_MCE 0x0040/* Machine check enable */ -#define X86_CR4_PGE 0x0080/* enable global pages */ -#define X86_CR4_PCE 0x0100/* enable performance counters at ipl 3 */ -#define X86_CR4_OSFXSR 0x0200/* enable fast FPU save and restore */ -#define X86_CR4_OSXMMEXCPT 0x0400/* enable unmasked SSE exceptions */ - -/* * Save the cr4 feature set we're using (ie * Pentium 4MB enable and PPro Global page * enable), so that any CPU's that boot up
@@ -407,22 +392,6 @@ static inline void prefetchw(void *x)#define cpu_relax () rep_nop()/* -* NSC/Cyrix CPU configuration register indexes -*/ -#define CX86_CCR0 0xc0 -#define CX86_CCR1 0xc1 -#define CX86_CCR2 0xc2 -#define CX86_CCR3 0xc3 -#define CX86_CCR4 0xe8 -#define CX86_CCR5 0xe9 -#define CX86_CCR6 0xea -#define CX86_CCR7 0xeb -#define CX86_DIR0 0xfe -#define CX86_DIR1 0xff -#define CX86_ARR_BASE 0xc4 -#define CX86_RCR_BASE 0xdc - -/* * NSC/Cyrix CPU indexed register access macros */
PATCH 9/26 x86_64: Fix vmalloc_32 to really allocate <4GB on 64bit platforms
In reply to Andi KleenUgly ifdef, but should handle all 64bit platforms that have suitable zones. On some like Altix it's probably impossible without IOMMU use to get memory <4GB this way, but they have to live with that.
--- mm/vmalloc.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-)
mm/vmalloc.c +10 -2
@@ -577,6 +577,14 @@ void *vmalloc_exec(unsigned long size)return __vmalloc (size,GFP_KERNEL | __GFP_HIGHMEM,PAGE_KERNEL_EXEC ); } +#if defined(CONFIG_64BIT ) && defined(CONFIG_ZONE_DMA32 ) +#define GFP_VMALLOC32 GFP_DMA32 +#elif defined(CONFIG_64BIT ) && defined(CONFIG_ZONE_DMA ) +#define GFP_VMALLOC32 GFP_DMA +#else +#define GFP_VMALLOC32 GFP_KERNEL +#endif +/** * vmalloc_32 - allocate virtually contiguous memory (32bit addressable) * @size: allocation size
@@ -586,7 +594,7 @@ void *vmalloc_exec(unsigned long size)*/ void *vmalloc_32 (unsigned long size) { -return __vmalloc (size,GFP_KERNEL ,PAGE_KERNEL ); +return __vmalloc (size,GFP_VMALLOC32 ,PAGE_KERNEL ); }EXPORT_SYMBOL (vmalloc_32);
@@ -602,7 +610,7 @@ void *vmalloc_32_user(unsigned long sizestruct vm_struct *area;void *ret; - ret =__vmalloc (size,GFP_KERNEL | __GFP_ZERO,PAGE_KERNEL ); + ret =__vmalloc (size,GFP_VMALLOC32 | __GFP_ZERO,PAGE_KERNEL );if (ret) {write_lock (&vmlist_lock); area =__find_vm_area (ret);
PATCH 10/26 i386: Clean up asm-i386/bugs.h
In reply to Andi KleenFrom: Jeremy Fitzhardinge <[email protected]>
Most of asm-i386/bugs.h is code which should be in a C file, so put it there.
--- arch/i386/kernel/cpu/Makefile | 2 arch/i386/kernel/cpu/bugs.c | 191 ++++++++++++++++++++++++++++++++++++++++ include/asm-i386/alternative.h | 1 include/asm-i386/bugs.h | 194 ----------------------------------------- 4 files changed, 197 insertions(+), 191 deletions(-)
===================================================================
arch/i386/kernel/cpu/Makefile +1 -1
@@ -2,7 +2,7 @@ # Makefile for x86-compatible CPU details and quirks # -obj-y := common.o proc.o +obj-y := common.o proc.o bugs.o obj-y += amd.o obj-y += cyrix.o
arch/i386/kernel/cpu/bugs.c new file +191 -0
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include/asm-i386/alternative.h +1 -0
@@ -16,6 +16,7 @@ struct alt_instr {u8 pad; }; +extern void alternative_instructions (void );extern void apply_alternatives (struct alt_instr *start,struct alt_instr *end);struct module ;
include/asm-i386/bugs.h +4 -190
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PATCH 7/26 x86_64: Use X86_EFLAGS_IF in x86-64/irqflags.h.
In reply to Andi KleenAs per i386 patch: move X86_EFLAGS_IF et al out to a new header:processor-flags.h, so we can include it from irqflags.h and use it in raw_irqs_disabled_flags().
As a side-effect, we could now use these flags in .S files.
--- include/asm-x86_64/irqflags.h | 9 +++++---- include/asm-x86_64/processor-flags.h | 26 ++++++++++++++++++++++++++ include/asm-x86_64/processor.h | 22 +--------------------- 3 files changed, 32 insertions(+), 25 deletions(-)
include/asm-x86_64/irqflags.h +5 -4
@@ -9,6 +9,7 @@*/ #ifndef _ASM_IRQFLAGS_H#define _ASM_IRQFLAGS_H +#include <asm/processor-flags.h> #ifndef __ASSEMBLY__/*
@@ -53,19 +54,19 @@ static inline void raw_local_irq_disable {unsigned long flags =__raw_local_save_flags (); -raw_local_irq_restore ((flags & ~(1 <<9 )) | (1 <<18 )); +raw_local_irq_restore ((flags & ~X86_EFLAGS_IF ) |X86_EFLAGS_AC ); }static inline void raw_local_irq_enable (void ) {unsigned long flags =__raw_local_save_flags (); -raw_local_irq_restore ((flags | (1 <<9 )) & ~(1 <<18 )); +raw_local_irq_restore ((flags |X86_EFLAGS_IF ) & (~X86_EFLAGS_AC )); }static inline int raw_irqs_disabled_flags (unsigned long flags) { -return !(flags & (1 <<9 )) || (flags & (1 <<18 )); +return !(flags &X86_EFLAGS_IF ) || (flags &X86_EFLAGS_AC ); }#else /* CONFIG_X86_VSMP */
@@ -82,7 +83,7 @@ static inline void raw_local_irq_enable(static inline int raw_irqs_disabled_flags (unsigned long flags) { -return !(flags & (1 <<9 )); +return !(flags &X86_EFLAGS_IF ); }#endif
include/asm-x86_64/processor-flags.h new file +26 -0
@@ -0,0 +1,26 @@ +#ifndef __ASM_X86_64_PROCESSOR_FLAGS_H +#define __ASM_X86_64_PROCESSOR_FLAGS_H +/* Various flags defined: can be included from assembler. */ + +/* +* EFLAGS bits +*/ +#define X86_EFLAGS_CF 0x00000001/* Carry Flag */ +#define X86_EFLAGS_PF 0x00000004/* Parity Flag */ +#define X86_EFLAGS_AF 0x00000010/* Auxillary carry Flag */ +#define X86_EFLAGS_ZF 0x00000040/* Zero Flag */ +#define X86_EFLAGS_SF 0x00000080/* Sign Flag */ +#define X86_EFLAGS_TF 0x00000100/* Trap Flag */ +#define X86_EFLAGS_IF 0x00000200/* Interrupt Flag */ +#define X86_EFLAGS_DF 0x00000400/* Direction Flag */ +#define X86_EFLAGS_OF 0x00000800/* Overflow Flag */ +#define X86_EFLAGS_IOPL 0x00003000/* IOPL mask */ +#define X86_EFLAGS_NT 0x00004000/* Nested Task */ +#define X86_EFLAGS_RF 0x00010000/* Resume Flag */ +#define X86_EFLAGS_VM 0x00020000/* Virtual Mode */ +#define X86_EFLAGS_AC 0x00040000/* Alignment Check */ +#define X86_EFLAGS_VIF 0x00080000/* Virtual Interrupt Flag */ +#define X86_EFLAGS_VIP 0x00100000/* Virtual Interrupt Pending */ +#define X86_EFLAGS_ID 0x00200000/* CPUID detection flag */ + +#endif /* __ASM_X86_64_PROCESSOR_FLAGS_H */
include/asm-x86_64/processor.h +1 -21
@@ -20,6 +20,7 @@#include <asm/percpu.h> #include <linux/personality.h> #include <linux/cpumask.h> +#include <asm/processor-flags.h> #define TF_MASK 0x00000100#define IF_MASK 0x00000200
@@ -103,27 +104,6 @@ extern unsigned int init_intel_cacheinfoextern unsigned short num_cache_leaves;/* -* EFLAGS bits -*/ -#define X86_EFLAGS_CF 0x00000001/* Carry Flag */ -#define X86_EFLAGS_PF 0x00000004/* Parity Flag */ -#define X86_EFLAGS_AF 0x00000010/* Auxillary carry Flag */ -#define X86_EFLAGS_ZF 0x00000040/* Zero Flag */ -#define X86_EFLAGS_SF 0x00000080/* Sign Flag */ -#define X86_EFLAGS_TF 0x00000100/* Trap Flag */ -#define X86_EFLAGS_IF 0x00000200/* Interrupt Flag */ -#define X86_EFLAGS_DF 0x00000400/* Direction Flag */ -#define X86_EFLAGS_OF 0x00000800/* Overflow Flag */ -#define X86_EFLAGS_IOPL 0x00003000/* IOPL mask */ -#define X86_EFLAGS_NT 0x00004000/* Nested Task */ -#define X86_EFLAGS_RF 0x00010000/* Resume Flag */ -#define X86_EFLAGS_VM 0x00020000/* Virtual Mode */ -#define X86_EFLAGS_AC 0x00040000/* Alignment Check */ -#define X86_EFLAGS_VIF 0x00080000/* Virtual Interrupt Flag */ -#define X86_EFLAGS_VIP 0x00100000/* Virtual Interrupt Pending */ -#define X86_EFLAGS_ID 0x00200000/* CPUID detection flag */ - -/* * Intel CPU features in CR4 */ #define X86_CR4_VME 0x0001/* enable vm86 extensions */
PATCH 8/26 x86_64: fix arithmetic in comment
In reply to Andi KleenFrom: Avi Kivity <[email protected]>
The xmm space on x86_64 is 256 bytes.
--- include/asm-x86_64/processor.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
include/asm-x86_64/processor.h +1 -1
@@ -181,7 +181,7 @@ struct i387_fxsave_struct {u32 mxcsr;u32 mxcsr_mask;u32 st_space[32 ];/* 8*16 bytes for each FP-reg = 128 bytes */ -u32 xmm_space[64 ];/* 16*16 bytes for each XMM-reg = 128 bytes */ +u32 xmm_space[64 ];/* 16*16 bytes for each XMM-reg = 256 bytes */ u32 padding[24 ]; } __attribute__ ((aligned (16)));
PATCH 2/26 i386: Add machine_ops interface to abstract halting and rebooting
In reply to Andi KleenFrom: Jeremy Fitzhardinge <[email protected]>machine_ops is an interface for the machine_* functions defined in <linux/reboot.h>. This is intended to allow hypervisors to intercept the reboot process, but it could be used to implement other x86 subarchtecture reboots.
--- arch/i386/kernel/apm.c | 3 +-- arch/i386/kernel/reboot.c | 43 ++++++++++++++++++++++++++++++++++++++----- include/asm-i386/reboot.h | 20 ++++++++++++++++++++ 3 files changed, 59 insertions(+), 7 deletions(-)
===================================================================
arch/i386/kernel/apm.c +1 -2
@@ -233,11 +233,10 @@#include <asm/desc.h> #include <asm/i8253.h> #include <asm/paravirt.h> +#include <asm/reboot.h> #include "io_ports.h" -extern void machine_real_restart (unsigned char *,int ); -#if defined(CONFIG_APM_DISPLAY_BLANK ) && defined(CONFIG_VT )extern int (*console_blank_hook)(int );#endif
arch/i386/kernel/reboot.c +38 -5
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include/asm-i386/reboot.h new file +20 -0
@@ -0,0 +1,20 @@ +#ifndef _ASM_REBOOT_H +#define _ASM_REBOOT_H + +struct pt_regs ; + +struct machine_ops +{ +void (*restart)(char *cmd); +void (*halt)(void ); +void (*power_off)(void ); +void (*shutdown)(void ); +void (*crash_shutdown)(struct pt_regs *); +void (*emergency_restart)(void ); +}; + +extern struct machine_ops machine_ops; + +void machine_real_restart (unsigned char *code,int length); + +#endif /* _ASM_REBOOT_H */
PATCH 11/26 i386: clean up identify_cpu
In reply to Andi KleenFrom: Jeremy Fitzhardinge <[email protected]> identify_cpu() is used to identify both the boot CPU and secondary CPUs, but it performs some actions which only apply to the boot CPU. Those functions are therefore really __init functions, but because they're called by identify_cpu(), they must be marked __cpuinit.
This patch splits identify_cpu() into identify_boot_cpu() and identify_secondary_cpu(), and calls the appropriate init functions from each. Also, identify_boot_cpu() and all the functions it dominates are marked __init.
--- arch/i386/kernel/cpu/common.c | 21 ++++++++++++++------- arch/i386/kernel/smpboot.c | 2 +- arch/i386/kernel/sysenter.c | 2 +- include/asm-i386/processor.h | 3 ++- 4 files changed, 18 insertions(+), 10 deletions(-)
===================================================================
arch/i386/kernel/cpu/common.c +14 -7
@@ -394,7 +394,7 @@ __setup("serialnumber", x86_serial_nr_se/* * This does the hard work of actually picking apart the CPU stuff... */ -void __cpuinit identify_cpu (struct cpuinfo_x86 *c) +static void __cpuinit identify_cpu (struct cpuinfo_x86 *c) {int i;
@@ -505,15 +505,22 @@ void __cpuinit identify_cpu(struct cpuin/* Init Machine Check Exception if available. */ mcheck_init (c); +} -if (c == &boot_cpu_data) -sysenter_setup (); +void __init identify_boot_cpu (void ) +{ +identify_cpu (&boot_cpu_data); +sysenter_setup ();enable_sep_cpu (); +mtrr_bp_init (); +} -if (c == &boot_cpu_data) -mtrr_bp_init (); -else -mtrr_ap_init (); +void __cpuinit identify_secondary_cpu (struct cpuinfo_x86 *c) +{ +BUG_ON (c == &boot_cpu_data); +identify_cpu (c); +enable_sep_cpu (); +mtrr_ap_init (); }#ifdef CONFIG_X86_HT
arch/i386/kernel/smpboot.c +1 -1
@@ -155,7 +155,7 @@ static void __cpuinit smp_store_cpu_info *c = boot_cpu_data;if (id!=0 ) -identify_cpu (c); +identify_secondary_cpu (c);/* * Mask B, Pentium, but not Pentium MMX */
arch/i386/kernel/sysenter.c +1 -1
@@ -72,7 +72,7 @@ extern const char vsyscall_int80_start,extern const char vsyscall_sysenter_start, vsyscall_sysenter_end;static struct page *syscall_pages[1 ]; -int __cpuinit sysenter_setup (void ) +int __init sysenter_setup (void ) {void *syscall_page = (void *)get_zeroed_page (GFP_ATOMIC ); syscall_pages[0 ] =virt_to_page (syscall_page);
include/asm-i386/processor.h +2 -1
@@ -116,7 +116,8 @@ extern char ignore_fpu_irq;void __init cpu_detect (struct cpuinfo_x86 *c); -extern void identify_cpu (struct cpuinfo_x86 *); +extern void identify_boot_cpu (void ); +extern void identify_secondary_cpu (struct cpuinfo_x86 *);extern void print_cpu_info (struct cpuinfo_x86 *);extern unsigned int init_intel_cacheinfo (struct cpuinfo_x86 *c);extern unsigned short num_cache_leaves;
PATCH 14/26 x86_64: Clean up asm-x86_64/bugs.h
In reply to Andi KleenFrom: Jeremy Fitzhardinge <[email protected]>
Most of asm-x86_64/bugs.h is code which should be in a C file, so put it there.
--- arch/x86_64/kernel/Makefile | 3 ++- arch/x86_64/kernel/bugs.c | 28 ++++++++++++++++++++++++++++ include/asm-x86_64/alternative.h | 1 + include/asm-x86_64/bugs.h | 30 ++++-------------------------- 4 files changed, 35 insertions(+), 27 deletions(-)
===================================================================
arch/x86_64/kernel/Makefile +2 -1
@@ -8,7 +8,8 @@ obj-y := process.o signal.o entry.o trap ptrace.o time.o ioport.o ldt.o setup.o i8259.o sys_x86_64.o \ x8664_ksyms.o i387.o syscall.o vsyscall.o \ setup64.o bootflag.o e820.o reboot.o quirks.o i8237.o \ - pci-dma.o pci-nommu.o alternative.o hpet.o tsc.o sched-clock.o + pci-dma.o pci-nommu.o alternative.o hpet.o tsc.o sched-clock.o \ + bugs.o obj-$(CONFIG_STACKTRACE) += stacktrace.o obj-$(CONFIG_X86_MCE) += mce.o therm_throt.o
arch/x86_64/kernel/bugs.c new file +28 -0
@@ -0,0 +1,28 @@ +/* +* arch/x86_64/kernel/bugs.c +* +* Copyright (C) 1994 Linus Torvalds +* Copyright (C) 2000 SuSE +* +* This is included by init/main.c to check for architecture-dependent bugs. +* +* Needs: +* void check_bugs(void); +*/ + +#include <linux/kernel.h> +#include <asm/alternative.h> +#include <asm/processor.h> +#include <asm/i387.h> +#include <asm/msr.h> +#include <asm/pda.h> + +void __init check_bugs (void ) +{ +identify_cpu (&boot_cpu_data); +#if !defined(CONFIG_SMP ) +printk ("CPU: " ); +print_cpu_info (&boot_cpu_data); +#endif +alternative_instructions (); +}
include/asm-x86_64/alternative.h +1 -0
@@ -16,6 +16,7 @@ struct alt_instr {u8 pad[5 ]; }; +extern void alternative_instructions (void );extern void apply_alternatives (struct alt_instr *start,struct alt_instr *end);struct module ;
include/asm-x86_64/bugs.h +4 -26
@@ -1,28 +1,6 @@ -/* -* include/asm-x86_64/bugs.h -* -* Copyright (C) 1994 Linus Torvalds -* Copyright (C) 2000 SuSE -* -* This is included by init/main.c to check for architecture-dependent bugs. -* -* Needs: -* void check_bugs(void); -*/ +#ifndef _ASM_X86_64_BUGS_H +#define _ASM_X86_64_BUGS_H -#include <asm/processor.h> -#include <asm/i387.h> -#include <asm/msr.h> -#include <asm/pda.h> +void check_bugs (void ); -extern void alternative_instructions (void ); - -static void __init check_bugs (void ) -{ -identify_cpu (&boot_cpu_data); -#if !defined(CONFIG_SMP ) -printk ("CPU: " ); -print_cpu_info (&boot_cpu_data); -#endif -alternative_instructions (); -} +#endif /* _ASM_X86_64_BUGS_H */
PATCH 15/26 x86: Don't use MWAIT on AMD Family 10
In reply to Andi KleenIt doesn't put the CPU into deeper sleep states, so it's better to use the standard idle loop to save power. But allow to reenable it anyways for benchmarking.
I also removed the obsolete idle=halt on i386
--- Documentation/kernel-parameters.txt | 11 +++++++++-- arch/i386/kernel/cpu/amd.c | 5 +++++ arch/i386/kernel/process.c | 17 ++++++++--------- arch/x86_64/kernel/process.c | 12 +++++++----- arch/x86_64/kernel/setup.c | 6 ++++++ include/asm-i386/processor.h | 2 ++ include/asm-x86_64/proto.h | 2 ++ 7 files changed, 39 insertions(+), 16 deletions(-)
Documentation/kernel-parameters.txt +9 -2
@@ -673,8 +673,15 @@ and is between 256 and 4096 characters. idebus= [HW] (E)IDE subsystem - VLB/PCI bus speed See Documentation/ide.txt. - idle= [HW] - Format: idle=poll or idle=halt + idle= [X86] + Format: idle=poll or idle=mwait + Poll forces a polling idle loop that can slightly improves the performance + of waking up a idle CPU, but will use a lot of power and make the system + run hot. Not recommended. + idle=mwait. On systems which support MONITOR/MWAIT but the kernel chose + to not use it because it doesn't save as much power as a normal idle + loop use the MONITOR/MWAIT idle loop anyways. Performance should be the same + as idle=poll. ignore_loglevel [KNL] Ignore loglevel setting - this will print /all/
arch/i386/kernel/cpu/amd.c +5 -0
@@ -53,6 +53,8 @@ static __cpuinit int amd_apic_timer_brokreturn 0 ; } +int force_mwait__cpuinitdata ; +static void __cpuinit init_amd (struct cpuinfo_x86 *c) {u32 l, h;
@@ -275,6 +277,9 @@ static void __cpuinit init_amd(struct cpif (amd_apic_timer_broken ())set_bit (X86_FEATURE_LAPIC_TIMER_BROKEN , c->x86_capability); + +if (c->x86 ==0x10 && !force_mwait) +clear_bit (X86_FEATURE_MWAIT , c->x86_capability); }static unsigned int __cpuinit amd_size_cache (struct cpuinfo_x86 * c,unsigned int size)
arch/i386/kernel/process.c +8 -9
@@ -272,25 +272,24 @@ void __devinit select_idle_routine(const } } -static int __init idle_setup (char *str) +static int __init idle_setup (char *str) { -if (!strncmp (str,"poll" ,4 )) { +if (!strcmp (str,"poll" )) {printk ("using polling idle threads.\n" ); pm_idle = poll_idle;#ifdef CONFIG_X86_SMP if (smp_num_siblings >1 )printk ("WARNING: polling idle and HT enabled, performance may degrade.\n" );#endif - }else if (!strncmp (str,"halt" ,4 )) { -printk ("using halt in idle threads.\n" ); - pm_idle = default_idle; - } + }else if (!strcmp (str,"mwait" )) + force_mwait =1 ; +else +return -1 ; boot_option_idle_override =1 ; -return 1 ; +return 0 ; } - -__setup ("idle=" , idle_setup); +early_param ("idle" , idle_setup);void show_regs (struct pt_regs * regs) {
arch/x86_64/kernel/process.c +7 -5
@@ -288,16 +288,18 @@ void __cpuinit select_idle_routine(conststatic int __init idle_setup (char *str) { -if (!strncmp (str,"poll" ,4 )) { +if (!strcmp (str,"poll" )) {printk ("using polling idle threads.\n" ); pm_idle = poll_idle; - } + }else if (!strcmp (str,"mwait" )) + force_mwait =1 ; +else +return -1 ; boot_option_idle_override =1 ; -return 1 ; +return 0 ; } - -__setup ("idle=" , idle_setup); +early_param ("idle" , idle_setup);/* Prints also some state that isn't saved in the pt_regs */ void __show_regs (struct pt_regs * regs)
arch/x86_64/kernel/setup.c +6 -0
@@ -79,6 +79,8 @@ int bootloader_type;unsigned long saved_video_mode; +int force_mwait__cpuinitdata ; +/* * Early DMI memory */
@@ -604,6 +606,10 @@ static void __cpuinit init_amd(struct cp/* RDTSC can be speculated around */ clear_bit (X86_FEATURE_SYNC_RDTSC , &c->x86_capability); + +/* Family 10 doesn't support C states in MWAIT so don't use it */ +if (c->x86 ==0x10 && !force_mwait) +clear_bit (X86_FEATURE_MWAIT , &c->x86_capability); }static void __cpuinit detect_ht (struct cpuinfo_x86 *c)
include/asm-i386/processor.h +2 -0
@@ -779,4 +779,6 @@ extern int sysenter_setup(void);extern void cpu_set_gdt (int );extern void cpu_init (void ); +extern int force_mwait; +#endif /* __ASM_I386_PROCESSOR_H */
include/asm-x86_64/proto.h +2 -0
@@ -119,6 +119,8 @@ extern int gsi_irq_sharing(int gsi);extern void smp_local_timer_interrupt (void ); +extern int force_mwait; +long do_arch_prctl (struct task_struct *task,int code,unsigned long addr);void i8254_timer_resume (void );
PATCH 16/26 i386: Enable machine check for AMD Family 10
In reply to Andi KleenFrom: Joachim Deguara <[email protected]>
We don't check for any specific family because the code is generic to all systems supporting the Intel machine check architecture. Just check the CPUID bit instead
--- arch/i386/kernel/cpu/mcheck/mce.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
arch/i386/kernel/cpu/mcheck/mce.c +1 -1
@@ -38,7 +38,7 @@ void mcheck_init(struct cpuinfo_x86 *c)switch (c->x86_vendor) {case X86_VENDOR_AMD : -if (c->x86==6 || c->x86==15 ) +if (boot_cpu_has (X86_FEATURE_MCA ))amd_mcheck_init (c);break ;
PATCH 22/26 i386: Remove smp_alt_instructions
In reply to Andi KleenFrom: Jeremy Fitzhardinge <[email protected]>
The .smp_altinstructions section and its corresponding symbols are completely unused, so remove them.
Also, remove stray #ifdef __KENREL__ in asm-i386/alternative.h
--- arch/i386/kernel/alternative.c | 38 ++------------------------------------ arch/i386/kernel/vmlinux.lds.S | 11 ----------- include/asm-i386/alternative.h | 6 +----- 3 files changed, 3 insertions(+), 52 deletions(-)
===================================================================
arch/i386/kernel/alternative.c +2 -36
@@ -132,11 +132,8 @@ static void nop_out(void *insns, unsigne }extern struct alt_instr __alt_instructions[], __alt_instructions_end[]; -extern struct alt_instr __smp_alt_instructions[], __smp_alt_instructions_end[];extern u8 *__smp_locks[], *__smp_locks_end[]; -extern u8 __smp_alt_begin[], __smp_alt_end[]; -/* Replace instructions with better alternatives for this CPU type. This runs before SMP is initialized to avoid SMP problems with self modifying code. This implies that assymetric systems where
@@ -171,29 +168,6 @@ void apply_alternatives(struct alt_instr#ifdef CONFIG_SMP -static void alternatives_smp_save (struct alt_instr *start,struct alt_instr *end) -{ -struct alt_instr *a; - -DPRINTK ("%s: alt table %p-%p\n" , __FUNCTION__, start, end); -for (a = start; a < end; a++) { -memcpy (a->replacement + a->replacementlen, - a->instr, - a->instrlen); - } -} - -static void alternatives_smp_apply (struct alt_instr *start,struct alt_instr *end) -{ -struct alt_instr *a; - -for (a = start; a < end; a++) { -memcpy (a->instr, - a->replacement + a->replacementlen, - a->instrlen); - } -} -static void alternatives_smp_lock (u8 **start,u8 **end,u8 *text,u8 *text_end) {u8 **ptr;
@@ -319,8 +293,6 @@ void alternatives_smp_switch(int smp)printk (KERN_INFO "SMP alternatives: switching to SMP code\n" );clear_bit (X86_FEATURE_UP , boot_cpu_data.x86_capability);clear_bit (X86_FEATURE_UP , cpu_data[0 ].x86_capability); -alternatives_smp_apply (__smp_alt_instructions, - __smp_alt_instructions_end);list_for_each_entry (mod, &smp_alt_modules, next)alternatives_smp_lock (mod->locks, mod->locks_end, mod->text, mod->text_end);
@@ -328,8 +300,6 @@ void alternatives_smp_switch(int smp)printk (KERN_INFO "SMP alternatives: switching to UP code\n" );set_bit (X86_FEATURE_UP , boot_cpu_data.x86_capability);set_bit (X86_FEATURE_UP , cpu_data[0 ].x86_capability); -apply_alternatives (__smp_alt_instructions, - __smp_alt_instructions_end);list_for_each_entry (mod, &smp_alt_modules, next)alternatives_smp_unlock (mod->locks, mod->locks_end, mod->text, mod->text_end);
@@ -396,17 +366,13 @@ void __init alternative_instructions(voiprintk (KERN_INFO "SMP alternatives: switching to UP code\n" );set_bit (X86_FEATURE_UP , boot_cpu_data.x86_capability);set_bit (X86_FEATURE_UP , cpu_data[0 ].x86_capability); -apply_alternatives (__smp_alt_instructions, - __smp_alt_instructions_end);alternatives_smp_unlock (__smp_locks, __smp_locks_end, _text, _etext); }free_init_pages ("SMP alternatives" , -__pa_symbol (&__smp_alt_begin), -__pa_symbol (&__smp_alt_end)); +__pa_symbol (&__smp_locks), +__pa_symbol (&__smp_locks_end)); }else { -alternatives_smp_save (__smp_alt_instructions, - __smp_alt_instructions_end);alternatives_smp_module_add (NULL ,"core kernel" , __smp_locks, __smp_locks_end, _text, _etext);
arch/i386/kernel/vmlinux.lds.S +0 -11
@@ -117,22 +117,11 @@ SECTIONS /* might get freed after init */ . = ALIGN(4096); - .smp_altinstructions : AT(ADDR(.smp_altinstructions) - LOAD_OFFSET) { - __smp_alt_begin = .; - __smp_alt_instructions = .; - *(.smp_altinstructions) - __smp_alt_instructions_end = .; - } - . = ALIGN(4); .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) { __smp_locks = .; *(.smp_locks) __smp_locks_end = .; } - .smp_altinstr_replacement : AT(ADDR(.smp_altinstr_replacement) - LOAD_OFFSET) { - *(.smp_altinstr_replacement) - __smp_alt_end = .; - } /* will be freed after init * Following ALIGN() is required to make sure no other data falls on the * same page where __smp_alt_end is pointing as that page might be freed
include/asm-i386/alternative.h +1 -5
@@ -1,8 +1,6 @@#ifndef _I386_ALTERNATIVE_H#define _I386_ALTERNATIVE_H -#ifdef __KERNEL__ -#include <asm/types.h> #include <linux/stddef.h> #include <linux/types.h>
@@ -32,9 +30,7 @@ static inline void alternatives_smp_modu void *text, void *text_end) {}static inline void alternatives_smp_module_del (struct module *mod) {}static inline void alternatives_smp_switch (int smp) {} -#endif - -#endif +#endif /* CONFIG_SMP */ /* * Alternative instructions for different CPU types or capabilities.
PATCH 26/26 i386: i386 separate hardware-defined TSS from Linux additions
In reply to Andi KleenFrom: Rusty Russell <[email protected]>
Quoted 1 line · Andi Kleen
Please clean it up properly with two structs.
Not sure about this, now I've done it. Running it here.
If you like it, I can do x86-64 as well.
==
lguest defines its own TSS struct because the "struct tss_struct" contains linux-specific additions. Andi asked me to split the struct in processor.h.
Unfortunately it makes usage a little awkward.
--- arch/i386/kernel/asm-offsets.c | 2 +- arch/i386/kernel/doublefault.c | 31 +++++++++++++++++-------------- arch/i386/kernel/ioport.c | 2 +- arch/i386/kernel/process.c | 8 ++++---- arch/i386/kernel/sysenter.c | 6 +++--- arch/i386/kernel/traps.c | 4 ++-- arch/i386/kernel/vmi.c | 8 ++++---- include/asm-i386/processor.h | 24 ++++++++++++++++-------- 8 files changed, 48 insertions(+), 37 deletions(-)
include/asm-i386/processor.h +16 -8
@@ -291,7 +291,8 @@ typedef struct {struct thread_struct ; -struct tss_struct { +/* This is the TSS defined by the hardware. */ +struct i386_hw_tss {unsigned short back_link,__blh;unsigned long esp0;unsigned short ss0,__ss0h;
@@ -315,6 +316,11 @@ struct tss_struct {unsigned short gs, __gsh;unsigned short ldt, __ldth;unsigned short trace, io_bitmap_base; +} __attribute__((packed)); + +struct tss_struct { +struct i386_hw_tss x86_tss; +/* * The extra 1 is there because the CPU will access an * additional byte beyond the end of the IO permission
@@ -381,10 +387,12 @@ struct thread_struct {* be within the limit. */ #define INIT_TSS { \ - .esp0 = sizeof(init_stack) + (long)&init_stack, \ - .ss0 = __KERNEL_DS, \ - .ss1 = __KERNEL_CS, \ - .io_bitmap_base = INVALID_IO_BITMAP_OFFSET, \ + .x86_tss = { \ + .esp0 = sizeof(init_stack) + (long)&init_stack, \ + .ss0 = __KERNEL_DS, \ + .ss1 = __KERNEL_CS, \ + .io_bitmap_base = INVALID_IO_BITMAP_OFFSET, \ + }, \ .io_bitmap = { [ 0 ... IO_BITMAP_LONGS] = ~0 }, \ }
@@ -493,10 +501,10 @@ static inline void rep_nop(void)static inline void native_load_esp0 (struct tss_struct *tss,struct thread_struct *thread) { - tss->esp0 = thread->esp0; + tss->x86_tss.esp0 = thread->esp0;/* This can only happen when SEP is enabled, no need to test "SEP"arately */ -if (unlikely (tss->ss1 != thread->sysenter_cs)) { - tss->ss1 = thread->sysenter_cs; +if (unlikely (tss->x86_tss.ss1 != thread->sysenter_cs)) { + tss->x86_tss.ss1 = thread->sysenter_cs;wrmsr (MSR_IA32_SYSENTER_CS , thread->sysenter_cs,0 ); } }
arch/i386/kernel/asm-offsets.c +1 -1
@@ -93,7 +93,7 @@ void foo(void)OFFSET (pbe_next, pbe, next);/* Offset from the sysenter stack to tss.esp0 */ -DEFINE (TSS_sysenter_esp0, offsetof(struct tss_struct , esp0) - + DEFINE(TSS_sysenter_esp0, offsetof(struct tss_struct, x86_tss.esp0) -sizeof (struct tss_struct ));DEFINE (PAGE_SIZE_asm,PAGE_SIZE );
arch/i386/kernel/doublefault.c +17 -14
@@ -33,7 +33,7 @@ static void doublefault_fn(void)printk ("double fault, tss at %08lx\n" , tss);if (ptr_ok (tss)) { -struct tss_struct *t = (struct tss_struct *)tss; +struct i386_hw_tss *t = (struct i386_hw_tss *)tss;printk ("eip = %08lx, esp = %08lx\n" , t->eip, t->esp);
@@ -49,18 +49,21 @@ static void doublefault_fn(void) } struct tss_struct doublefault_tss __cacheline_aligned = { - .esp0 =STACK_START , - .ss0 = __KERNEL_DS, - .ldt =0 , - .io_bitmap_base =INVALID_IO_BITMAP_OFFSET , - - .eip = (unsigned long ) doublefault_fn, - .eflags =X86_EFLAGS_SF |0x2 ,/* 0x2 bit is always set */ - .esp =STACK_START , - .es = __USER_DS, - .cs = __KERNEL_CS, - .ss = __KERNEL_DS, - .ds = __USER_DS, + .x86_tss = { + .esp0 =STACK_START , + .ss0 = __KERNEL_DS, + .ldt =0 , + .io_bitmap_base =INVALID_IO_BITMAP_OFFSET , + + .eip = (unsigned long ) doublefault_fn, +/* 0x2 bit is always set */ + .eflags =X86_EFLAGS_SF |0x2 , + .esp =STACK_START , + .es = __USER_DS, + .cs = __KERNEL_CS, + .ss = __KERNEL_DS, + .ds = __USER_DS, - .__cr3 =__pa (swapper_pg_dir) + .__cr3 =__pa (swapper_pg_dir) + } };
arch/i386/kernel/ioport.c +1 -1
@@ -114,7 +114,7 @@ asmlinkage long sys_ioperm(unsigned long* Reset the owner so that a process switch will not set * tss->io_bitmap_base to IO_BITMAP_OFFSET. */ - tss->io_bitmap_base =INVALID_IO_BITMAP_OFFSET_LAZY ; + tss->x86_tss.io_bitmap_base =INVALID_IO_BITMAP_OFFSET_LAZY ; tss->io_bitmap_owner =NULL ;put_cpu ();
arch/i386/kernel/process.c +4 -4
@@ -375,7 +375,7 @@ void exit_thread(void) t->io_bitmap_max =0 ; tss->io_bitmap_owner =NULL ; tss->io_bitmap_max =0 ; - tss->io_bitmap_base =INVALID_IO_BITMAP_OFFSET ; + tss->x86_tss.io_bitmap_base =INVALID_IO_BITMAP_OFFSET ;put_cpu (); } }
@@ -554,7 +554,7 @@ static noinline void __switch_to_xtra(st* Disable the bitmap via an invalid offset. We still cache * the previous bitmap owner and the IO bitmap contents: */ - tss->io_bitmap_base =INVALID_IO_BITMAP_OFFSET ; + tss->x86_tss.io_bitmap_base =INVALID_IO_BITMAP_OFFSET ;return ; }
@@ -564,7 +564,7 @@ static noinline void __switch_to_xtra(st* matches the next task, we dont have to do anything but * to set a valid offset in the TSS: */ - tss->io_bitmap_base =IO_BITMAP_OFFSET ; + tss->x86_tss.io_bitmap_base =IO_BITMAP_OFFSET ;return ; }/*
@@ -576,7 +576,7 @@ static noinline void __switch_to_xtra(st* redundant copies when the currently switched task does not * perform any I/O during its timeslice. */ - tss->io_bitmap_base =INVALID_IO_BITMAP_OFFSET_LAZY ; + tss->x86_tss.io_bitmap_base =INVALID_IO_BITMAP_OFFSET_LAZY ; }/*
arch/i386/kernel/sysenter.c +3 -3
@@ -183,10 +183,10 @@ void enable_sep_cpu(void)return ; } - tss->ss1 = __KERNEL_CS; - tss->esp1 =sizeof (struct tss_struct ) + (unsigned long ) tss; + tss->x86_tss.ss1 = __KERNEL_CS; + tss->x86_tss.esp1 =sizeof (struct tss_struct ) + (unsigned long ) tss;wrmsr (MSR_IA32_SYSENTER_CS , __KERNEL_CS,0 ); -wrmsr (MSR_IA32_SYSENTER_ESP , tss->esp1,0 ); +wrmsr (MSR_IA32_SYSENTER_ESP , tss->x86_tss.esp1,0 );wrmsr (MSR_IA32_SYSENTER_EIP , (unsigned long ) sysenter_entry,0 );put_cpu (); }
arch/i386/kernel/traps.c +2 -2
@@ -596,7 +596,7 @@ fastcall void __kprobes do_general_prote* and we set the offset field correctly. Then we let the CPU to * restart the faulting instruction. */ -if (tss->io_bitmap_base ==INVALID_IO_BITMAP_OFFSET_LAZY && +if (tss->x86_tss.io_bitmap_base ==INVALID_IO_BITMAP_OFFSET_LAZY && thread->io_bitmap_ptr) {memcpy (tss->io_bitmap, thread->io_bitmap_ptr, thread->io_bitmap_max);
@@ -609,7 +609,7 @@ fastcall void __kprobes do_general_prote thread->io_bitmap_max,0xff , tss->io_bitmap_max - thread->io_bitmap_max); tss->io_bitmap_max = thread->io_bitmap_max; - tss->io_bitmap_base =IO_BITMAP_OFFSET ; + tss->x86_tss.io_bitmap_base =IO_BITMAP_OFFSET ; tss->io_bitmap_owner = thread;put_cpu ();return ;
arch/i386/kernel/vmi.c +4 -4
@@ -230,14 +230,14 @@ static void vmi_set_tr(void)static void vmi_load_esp0 (struct tss_struct *tss,struct thread_struct *thread) { - tss->esp0 = thread->esp0; + tss->x86_tss.esp0 = thread->esp0;/* This can only happen when SEP is enabled, no need to test "SEP"arately */ -if (unlikely (tss->ss1 != thread->sysenter_cs)) { - tss->ss1 = thread->sysenter_cs; +if (unlikely (tss->x86_tss.ss1 != thread->sysenter_cs)) { + tss->x86_tss.ss1 = thread->sysenter_cs;wrmsr (MSR_IA32_SYSENTER_CS , thread->sysenter_cs,0 ); } - vmi_ops.set_kernel_stack (__KERNEL_DS, tss->esp0); + vmi_ops.set_kernel_stack (__KERNEL_DS, tss->x86_tss.esp0); }static void vmi_flush_tlb_user (void )
PATCH 18/26 i386: Update smp_call_function* comments
In reply to Andi KleenFrom: Jeremy Fitzhardinge <[email protected]>
Update documentation for i386 smp_call_function* functions.
As reported by Randy Dunlap <[email protected]>
[ I've posted this before but it seems to have been lost along the way. ]
--- arch/i386/kernel/smp.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-)
===================================================================
arch/i386/kernel/smp.c +15 -10
@@ -554,8 +554,10 @@ static void __smp_call_function(void (*f* @info: An arbitrary pointer to pass to the function. * @wait: If true, wait (atomically) until function has completed on other CPUs. * -* Returns 0 on success, else a negative status code. Does not return until -* remote CPUs are nearly ready to execute <<func>> or are or have finished. +* Returns 0 on success, else a negative status code. +* +* If @wait is true, then returns once @func has returned; otherwise +* it returns just before the target cpu calls @func. * * You must not call this function with disabled interrupts or from a * hardware interrupt handler or from a bottom half handler.
@@ -617,11 +619,13 @@ int native_smp_call_function_mask(cpumas* smp_call_function(): Run a function on all other CPUs. * @func: The function to run. This must be fast and non-blocking. * @info: An arbitrary pointer to pass to the function. -* @nonatomic: currently unused. +* @nonatomic: Unused. * @wait: If true, wait (atomically) until function has completed on other CPUs. * -* Returns 0 on success, else a negative status code. Does not return until -* remote CPUs are nearly ready to execute <<func>> or are or have executed. +* Returns 0 on success, else a negative status code. +* +* If @wait is true, then returns once @func has returned; otherwise +* it returns just before the target cpu calls @func. * * You must not call this function with disabled interrupts or from a * hardware interrupt handler or from a bottom half handler.
@@ -633,17 +637,18 @@ int smp_call_function(void (*func) (void }EXPORT_SYMBOL (smp_call_function); -/* +/** * smp_call_function_single - Run a function on another CPU +* @cpu: The target CPU. Cannot be the calling CPU. * @func: The function to run. This must be fast and non-blocking. * @info: An arbitrary pointer to pass to the function. -* @nonatomic: Currently unused. +* @nonatomic: Unused. * @wait: If true, wait until function has completed on other CPUs. * -* Retrurns 0 on success, else a negative status code. +* Returns 0 on success, else a negative status code. * -* Does not return until the remote CPU is nearly ready to execute <func> -* or is or has executed. +* If @wait is true, then returns once @func has returned; otherwise +* it returns just before the target cpu calls @func. */ int smp_call_function_single (int cpu,void (*func) (void *info),void *info,int nonatomic,int wait)
PATCH 20/26 x86: Allow percpu variables to be page-aligned
In reply to Andi KleenFrom: Jeremy Fitzhardinge <[email protected]>
Let's allow page-alignment in general for per-cpu data (wanted by Xen, and Ingo suggested KVM as well).
Because larger alignments can use more room, we increase the max per-cpu memory to 64k rather than 32k: it's getting a little tight.
--- arch/alpha/kernel/vmlinux.lds.S | 2 +- arch/arm/kernel/vmlinux.lds.S | 2 +- arch/cris/arch-v32/vmlinux.lds.S | 1 + arch/frv/kernel/vmlinux.lds.S | 1 + arch/i386/kernel/vmlinux.lds.S | 2 +- arch/m32r/kernel/vmlinux.lds.S | 2 +- arch/mips/kernel/vmlinux.lds.S | 2 +- arch/parisc/kernel/vmlinux.lds.S | 2 +- arch/powerpc/kernel/setup_64.c | 4 ++-- arch/powerpc/kernel/vmlinux.lds.S | 6 +----- arch/ppc/kernel/vmlinux.lds.S | 2 +- arch/s390/kernel/vmlinux.lds.S | 2 +- arch/sh/kernel/vmlinux.lds.S | 2 +- arch/sh64/kernel/vmlinux.lds.S | 2 +- arch/sparc/kernel/vmlinux.lds.S | 2 +- arch/sparc64/kernel/smp.c | 6 +++--- arch/x86_64/kernel/setup64.c | 4 ++-- arch/x86_64/kernel/vmlinux.lds.S | 2 +- arch/xtensa/kernel/vmlinux.lds.S | 2 +- init/main.c | 8 ++------ kernel/module.c | 8 ++++---- 21 files changed, 29 insertions(+), 35 deletions(-)
===================================================================
arch/alpha/kernel/vmlinux.lds.S +1 -1
@@ -69,7 +69,7 @@ SECTIONS . = ALIGN(8); SECURITY_INIT - . = ALIGN(64); + . = ALIGN(8192); __per_cpu_start = .; .data.percpu : { *(.data.percpu) } __per_cpu_end = .;
arch/arm/kernel/vmlinux.lds.S +1 -1
@@ -59,7 +59,7 @@ SECTIONS usr/built-in.o(.init.ramfs) __initramfs_end = .; #endif - . = ALIGN(64); + . = ALIGN(4096); __per_cpu_start = .; *(.data.percpu) __per_cpu_end = .;
arch/cris/arch-v32/vmlinux.lds.S +1 -0
@@ -91,6 +91,7 @@ SECTIONS } SECURITY_INIT + . = ALIGN (8192); __per_cpu_start = .; .data.percpu : { *(.data.percpu) } __per_cpu_end = .;
arch/frv/kernel/vmlinux.lds.S +1 -0
@@ -57,6 +57,7 @@ SECTIONS __alt_instructions_end = .; .altinstr_replacement : { *(.altinstr_replacement) } + . = ALIGN(4096); __per_cpu_start = .; .data.percpu : { *(.data.percpu) } __per_cpu_end = .;
arch/i386/kernel/vmlinux.lds.S +1 -1
@@ -194,7 +194,7 @@ SECTIONS __initramfs_end = .; } #endif - . = ALIGN(L1_CACHE_BYTES); + . = ALIGN(4096); .data.percpu : AT(ADDR(.data.percpu) - LOAD_OFFSET) { __per_cpu_start = .; *(.data.percpu)
arch/m32r/kernel/vmlinux.lds.S +1 -1
@@ -110,7 +110,7 @@ SECTIONS __initramfs_end = .; #endif - . = ALIGN(32); + . = ALIGN(4096); __per_cpu_start = .; .data.percpu : { *(.data.percpu) } __per_cpu_end = .;
arch/mips/kernel/vmlinux.lds.S +1 -1
@@ -119,7 +119,7 @@ SECTIONS .init.ramfs : { *(.init.ramfs) } __initramfs_end = .; #endif - . = ALIGN(32); + . = ALIGN(_PAGE_SIZE); __per_cpu_start = .; .data.percpu : { *(.data.percpu) } __per_cpu_end = .;
arch/parisc/kernel/vmlinux.lds.S +1 -1
@@ -181,7 +181,7 @@ SECTIONS .init.ramfs : { *(.init.ramfs) } __initramfs_end = .; #endif - . = ALIGN(32); + . = ALIGN(ASM_PAGE_SIZE); __per_cpu_start = .; .data.percpu : { *(.data.percpu) } __per_cpu_end = .;
arch/powerpc/kernel/setup_64.c +2 -2
@@ -583,14 +583,14 @@ void __init setup_per_cpu_areas(void)char *ptr;/* Copy section for each CPU (we discard the original) */ - size =ALIGN (__per_cpu_end - __per_cpu_start,SMP_CACHE_BYTES ); + size =ALIGN (__per_cpu_end - __per_cpu_start,PAGE_SIZE );#ifdef CONFIG_MODULES if (size <PERCPU_ENOUGH_ROOM ) size =PERCPU_ENOUGH_ROOM ;#endif for_each_possible_cpu (i) { - ptr =alloc_bootmem_node (NODE_DATA (cpu_to_node (i)), size); + ptr =alloc_bootmem_pages_node (NODE_DATA (cpu_to_node (i)), size);if (!ptr)panic ("Cannot allocate cpu data for CPU %d\n" , i);
arch/powerpc/kernel/vmlinux.lds.S +1 -5
@@ -139,11 +139,7 @@ SECTIONS __initramfs_end = .; } #endif -#ifdef CONFIG_PPC32 - . = ALIGN(32); -#else - . = ALIGN(128); -#endif + . = ALIGN(PAGE_SIZE); .data.percpu : { __per_cpu_start = .; *(.data.percpu)
arch/ppc/kernel/vmlinux.lds.S +1 -1
@@ -130,7 +130,7 @@ SECTIONS __ftr_fixup : { *(__ftr_fixup) } __stop___ftr_fixup = .; - . = ALIGN(32); + . = ALIGN(4096); __per_cpu_start = .; .data.percpu : { *(.data.percpu) } __per_cpu_end = .;
arch/s390/kernel/vmlinux.lds.S +1 -1
@@ -107,7 +107,7 @@ SECTIONS . = ALIGN(2); __initramfs_end = .; #endif - . = ALIGN(256); + . = ALIGN(4096); __per_cpu_start = .; .data.percpu : { *(.data.percpu) } __per_cpu_end = .;
arch/sh/kernel/vmlinux.lds.S +1 -1
@@ -54,7 +54,7 @@ SECTIONS . = ALIGN(PAGE_SIZE); .data.page_aligned : { *(.data.page_aligned) } - . = ALIGN(L1_CACHE_BYTES); + . = ALIGN(PAGE_SIZE); __per_cpu_start = .; .data.percpu : { *(.data.percpu) } __per_cpu_end = .;
arch/sh64/kernel/vmlinux.lds.S +1 -1
@@ -85,7 +85,7 @@ SECTIONS . = ALIGN(PAGE_SIZE); .data.page_aligned : C_PHYS(.data.page_aligned) { *(.data.page_aligned) } - . = ALIGN(L1_CACHE_BYTES); + . = ALIGN(PAGE_SIZE); __per_cpu_start = .; .data.percpu : C_PHYS(.data.percpu) { *(.data.percpu) } __per_cpu_end = . ;
arch/sparc/kernel/vmlinux.lds.S +1 -1
@@ -65,7 +65,7 @@ SECTIONS __initramfs_end = .; #endif - . = ALIGN(32); + . = ALIGN(4096); __per_cpu_start = .; .data.percpu : { *(.data.percpu) } __per_cpu_end = .;
arch/sparc64/kernel/smp.c +3 -3
@@ -1343,11 +1343,11 @@ void __init setup_per_cpu_areas(void)/* Copy section for each CPU (we discard the original) */ goal =PERCPU_ENOUGH_ROOM ; - __per_cpu_shift =0 ; -for (size =1UL ; size < goal; size <<=1UL ) + __per_cpu_shift =PAGE_SHIFT ; +for (size =PAGE_SIZE ; size < goal; size <<=1UL ) __per_cpu_shift++; - ptr =alloc_bootmem (size *NR_CPUS ); + ptr =alloc_bootmem_pages (size *NR_CPUS ); __per_cpu_base = ptr - __per_cpu_start;
arch/x86_64/kernel/setup64.c +2 -2
@@ -103,9 +103,9 @@ void __init setup_per_cpu_areas(void)if (!NODE_DATA (cpu_to_node (i))) {printk ("cpu with no node %d, num_online_nodes %d\n" , i,num_online_nodes ()); - ptr =alloc_bootmem (size); + ptr =alloc_bootmem_pages (size); }else { - ptr =alloc_bootmem_node (NODE_DATA (cpu_to_node (i)), size); + ptr =alloc_bootmem_pages_node (NODE_DATA (cpu_to_node (i)), size); }if (!ptr)panic ("Cannot allocate cpu data for CPU %d\n" , i);
arch/x86_64/kernel/vmlinux.lds.S +1 -1
@@ -195,7 +195,7 @@ SECTIONS __initramfs_end = .; #endif - . = ALIGN(CONFIG_X86_L1_CACHE_BYTES); + . = ALIGN(4096); __per_cpu_start = .; .data.percpu : AT(ADDR(.data.percpu) - LOAD_OFFSET) { *(.data.percpu) } __per_cpu_end = .;
arch/xtensa/kernel/vmlinux.lds.S +1 -1
@@ -198,7 +198,7 @@ SECTIONS __ftr_fixup : { *(__ftr_fixup) } __stop___ftr_fixup = .; - . = ALIGN(32); + . = ALIGN(4096); __per_cpu_start = .; .data.percpu : { *(.data.percpu) } __per_cpu_end = .;
init/main.c +2 -6
@@ -369,12 +369,8 @@ static void __init setup_per_cpu_areas(vunsigned long nr_possible_cpus =num_possible_cpus ();/* Copy section for each CPU (we discard the original) */ - size =ALIGN (__per_cpu_end - __per_cpu_start,SMP_CACHE_BYTES ); -#ifdef CONFIG_MODULES -if (size <PERCPU_ENOUGH_ROOM ) - size =PERCPU_ENOUGH_ROOM ; -#endif - ptr =alloc_bootmem (size * nr_possible_cpus); + size =ALIGN (PERCPU_ENOUGH_ROOM ,PAGE_SIZE ); + ptr =alloc_bootmem_pages (size * nr_possible_cpus);for_each_possible_cpu (i) { __per_cpu_offset[i] = ptr - __per_cpu_start;
kernel/module.c +4 -4
@@ -346,10 +346,10 @@ static void *percpu_modalloc(unsigned lounsigned int i;void *ptr; -if (align >SMP_CACHE_BYTES ) { -printk (KERN_WARNING "%s: per-cpu alignment %li > %i\n" , - name, align,SMP_CACHE_BYTES ); - align =SMP_CACHE_BYTES ; +if (align >PAGE_SIZE ) { +printk (KERN_WARNING "%s: per-cpu alignment %li > %li\n" , + name, align,PAGE_SIZE ); + align =PAGE_SIZE ; } ptr = __per_cpu_start;
PATCH 17/26 i386: Use menuconfig objects - APM
In reply to Andi KleenFrom: Jan Engelhardt <[email protected]>
(I hope Andi is the right one to Cc, otherwise please add, thanks!)
Use menuconfigs instead of menus, so the whole menu can be disabled at once instead of going through all options.
--- arch/i386/Kconfig | 17 +++++------------ 1 file changed, 5 insertions(+), 12 deletions(-)
arch/i386/Kconfig +5 -12
@@ -915,12 +915,9 @@ source kernel/power/Kconfig source "drivers/acpi/Kconfig" -menu "APM (Advanced Power Management) BIOS Support" -depends on PM && !X86_VISWS - -config APM +menuconfig APM tristate "APM (Advanced Power Management) BIOS support" - depends on PM + depends on PM && !X86_VISWS ---help--- APM is a BIOS specification for saving power using several different techniques. This is mostly useful for battery powered laptops with
@@ -977,9 +974,10 @@ config APM To compile this driver as a module, choose M here: the module will be called apm. +if APM + config APM_IGNORE_USER_SUSPEND bool "Ignore USER SUSPEND" - depends on APM help This option will ignore USER SUSPEND requests. On machines with a compliant APM BIOS, you want to say N. However, on the NEC Versa M
@@ -987,7 +985,6 @@ config APM_IGNORE_USER_SUSPEND config APM_DO_ENABLE bool "Enable PM at boot time" - depends on APM ---help--- Enable APM features at boot time. From page 36 of the APM BIOS specification: "When disabled, the APM BIOS does not automatically
@@ -1005,7 +1002,6 @@ config APM_DO_ENABLE config APM_CPU_IDLE bool "Make CPU Idle calls when idle" - depends on APM help Enable calls to APM CPU Idle/CPU Busy inside the kernel's idle loop. On some machines, this can activate improved power savings, such as
@@ -1017,7 +1013,6 @@ config APM_CPU_IDLE config APM_DISPLAY_BLANK bool "Enable console blanking using APM" - depends on APM help Enable console blanking using the APM. Some laptops can use this to turn off the LCD backlight when the screen blanker of the Linux
@@ -1031,7 +1026,6 @@ config APM_DISPLAY_BLANK config APM_ALLOW_INTS bool "Allow interrupts during APM BIOS calls" - depends on APM help Normally we disable external interrupts while we are making calls to the APM BIOS as a measure to lessen the effects of a badly behaving
@@ -1042,13 +1036,12 @@ config APM_ALLOW_INTS config APM_REAL_MODE_POWER_OFF bool "Use real mode APM BIOS call to power off" - depends on APM help Use real mode APM BIOS calls to switch off the computer. This is a work-around for a number of buggy BIOSes. Switch this option on if your computer crashes instead of powering off properly. -endmenu +endif # APM source "arch/i386/kernel/cpu/cpufreq/Kconfig"
PATCH 19/26 i386: Enable bank 0 on non K7 Athlon
In reply to Andi KleenAs a bug workaround bank 0 on K7s is normally disabled, but no need to do that on other AMD CPUs.
--- arch/i386/kernel/cpu/mcheck/k7.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-)
arch/i386/kernel/cpu/mcheck/k7.c +7 -3
@@ -82,9 +82,13 @@ void amd_mcheck_init(struct cpuinfo_x86 nr_mce_banks = l &0xff ;/* Clear status for MC index 0 separately, we don't touch CTL, -* as some Athlons cause spurious MCEs when its enabled. */ -wrmsr (MSR_IA32_MC0_STATUS ,0x0 ,0x0 ); -for (i=1 ; i<nr_mce_banks; i++) { +* as some K7 Athlons cause spurious MCEs when its enabled. */ +if (boot_cpu_data.x86 ==6 ) { +wrmsr (MSR_IA32_MC0_STATUS ,0x0 ,0x0 ); + i =1 ; + }else + i =0 ; +for (; i<nr_mce_banks; i++) {wrmsr (MSR_IA32_MC0_CTL +4 *i,0xffffffff ,0xffffffff );wrmsr (MSR_IA32_MC0_STATUS +4 *i,0x0 ,0x0 ); }
PATCH 1/26 i386: Add smp_ops interface
In reply to Andi KleenFrom: Jeremy Fitzhardinge <[email protected]>
Subject: Add smp_ops interface
Add a smp_ops interface. This abstracts the API defined by <linux/smp.h> for use within arch/i386. The primary intent is that it be used by a paravirtualizing hypervisor to implement SMP, but it could also be used by non-APIC-using sub-architectures.
This is related to CONFIG_PARAVIRT, but is implemented unconditionally since it is simpler that way and not a highly performance-sensitive interface.
--- arch/i386/kernel/smp.c | 21 +++++++++++++---- arch/i386/kernel/smpboot.c | 8 +++--- include/asm-i386/smp.h | 53 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 73 insertions(+), 9 deletions(-)
===================================================================
arch/i386/kernel/smp.c +16 -5
@@ -483,7 +483,7 @@ void flush_tlb_all(void)* it goes straight through and wastes no time serializing * anything. Worst case is that we lose a reschedule ... */ -void smp_send_reschedule (int cpu) +void native_smp_send_reschedule (int cpu) {WARN_ON (cpu_is_offline (cpu));send_IPI_mask (cpumask_of_cpu (cpu),RESCHEDULE_VECTOR );
@@ -560,9 +560,9 @@ static void __smp_call_function(void (*f* You must not call this function with disabled interrupts or from a * hardware interrupt handler or from a bottom half handler. */ -int smp_call_function_mask (cpumask_t mask, -void (*func)(void *),void *info, -int wait) +int native_smp_call_function_mask (cpumask_t mask, +void (*func)(void *),void *info, +int wait) {struct call_data_struct data;cpumask_t allbutself;
@@ -681,7 +681,7 @@ static void stop_this_cpu (void * dummy)* this function calls the 'stop' function on all other CPUs in the system. */ -void smp_send_stop (void ) +void native_smp_send_stop (void ) {/* Don't deadlock on the call lock in panic */ int nolock = !spin_trylock (&call_lock);
@@ -757,3 +757,14 @@ int safe_smp_processor_id(void)return cpuid >=0 ? cpuid :0 ; } + +struct smp_ops smp_ops = { + .smp_prepare_boot_cpu = native_smp_prepare_boot_cpu, + .smp_prepare_cpus = native_smp_prepare_cpus, + .cpu_up = native_cpu_up, + .smp_cpus_done = native_smp_cpus_done, + + .smp_send_stop = native_smp_send_stop, + .smp_send_reschedule = native_smp_send_reschedule, + .smp_call_function_mask = native_smp_call_function_mask, +};
arch/i386/kernel/smpboot.c +4 -4
@@ -1171,7 +1171,7 @@ static void __init smp_boot_cpus(unsigne/* These are wrappers to interface to the new boot process. Someone who understands all this stuff should rewrite it properly. --RR 15/Jul/02 */ -void __init smp_prepare_cpus (unsigned int max_cpus) +void __init native_smp_prepare_cpus (unsigned int max_cpus) { smp_commenced_mask =cpumask_of_cpu (0 ); cpu_callin_map =cpumask_of_cpu (0 );
@@ -1191,7 +1191,7 @@ static inline void switch_to_new_gdt(voi asmvolatile ("mov %0, %%fs" : :"r" (__KERNEL_PDA) :"memory" ); } -void __init smp_prepare_boot_cpu (void ) +void __init native_smp_prepare_boot_cpu (void ) {unsigned int cpu =smp_processor_id ();
@@ -1292,7 +1292,7 @@ void __cpu_die(unsigned int cpu) }#endif /* CONFIG_HOTPLUG_CPU */ -int __cpuinit __cpu_up (unsigned int cpu) +int __cpuinit native_cpu_up (unsigned int cpu) {unsigned long flags;#ifdef CONFIG_HOTPLUG_CPU
@@ -1337,7 +1337,7 @@ int __cpuinit __cpu_up(unsigned int cpu)return 0 ; } -void __init smp_cpus_done (unsigned int max_cpus) +void __init native_smp_cpus_done (unsigned int max_cpus) {#ifdef CONFIG_X86_IO_APIC setup_ioapic_dest ();
include/asm-i386/smp.h +53 -0
59 lines not on this page · raw message
PATCH 24/26 x86_64: Fix x86_64 compilation with DEBUG_SIG on
In reply to Andi KleenFrom: Glauber de Oliveira Costa <[email protected]>
Setting the DEBUG_SIG flag breaks compilation due to a wrong struct access. Aditionally, it raises two warnings. This is one patch to fix them all.
Signature · 51 lines
Glauber de Oliveira Costa Red Hat Inc. "Free as in Freedom" commit ff9d841995b6055b74017306f30485c2b4a9ea70 Author: Glauber de Oliveira Costa <[email protected]> Date: Fri Mar 23 07:13:38 2007 -0300 [PATCH] Fix x86_64 compilation with DEBUG_SIG on Setting the DEBUG_SIG flag breaks compilation due to a wrong struct access. Aditionally, it raises two warnings. This is one patch to fix them all. Signed-off-by: Glauber de Oliveira Costa <[email protected]> --- arch/x86_64/kernel/signal.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) Index: linux/arch/x86_64/kernel/signal.c =================================================================== --- linux.orig/arch/x86_64/kernel/signal.c +++ linux/arch/x86_64/kernel/signal.c @@ -141,7 +141,7 @@ asmlinkage long sys_rt_sigreturn(struct goto badframe; #ifdef DEBUG_SIG - printk("%d sigreturn rip:%lx rsp:%lx frame:%p rax:%lx\n",current->pid,regs.rip,regs.rsp,frame,eax); + printk("%d sigreturn rip:%lx rsp:%lx frame:%p rax:%lx\n",current->pid,regs->rip,regs->rsp,frame,eax); #endif if (do_sigaltstack(&frame->uc.uc_stack, NULL, regs->rsp) == -EFAULT) @@ -301,7 +301,7 @@ static int setup_rt_frame(int sig, struc if (test_thread_flag(TIF_SINGLESTEP)) ptrace_notify(SIGTRAP); #ifdef DEBUG_SIG - printk("SIG deliver (%s:%d): sp=%p pc=%p ra=%p\n", + printk("SIG deliver (%s:%d): sp=%p pc=%lx ra=%p\n", current->comm, current->pid, frame, regs->rip, frame->pretcode); #endif @@ -463,7 +463,7 @@ void do_notify_resume(struct pt_regs *regs, void *unused, __u32 thread_info_flags) { #ifdef DEBUG_SIG - printk("do_notify_resume flags:%x rip:%lx rsp:%lx caller:%lx pending:%lx\n", + printk("do_notify_resume flags:%x rip:%lx rsp:%lx caller:%p pending:%x\n", thread_info_flags, regs->rip, regs->rsp, __builtin_return_address(0),signal_pending(current)); #endif
PATCH 23/26 i386: Allow boot-time disable of SMP altinstructions
In reply to Andi KleenFrom: Jeremy Fitzhardinge <[email protected]>
Add "noreplace-smp" to disable SMP instruction replacement.
--- Documentation/kernel-parameters.txt | 6 ++++++ arch/i386/kernel/alternative.c | 23 +++++++++++++++++++---- 2 files changed, 25 insertions(+), 4 deletions(-)
===================================================================
Documentation/kernel-parameters.txt +6 -0
@@ -1142,6 +1142,9 @@ and is between 256 and 4096 characters. nomce [IA-32] Machine Check Exception + noreplace-smp [IA-32,SMP] Don't replace SMP instructions + with UP alternatives + noresidual [PPC] Don't use residual data on PReP machines. noresume [SWSUSP] Disables resume and restores original swap
@@ -1547,6 +1550,9 @@ and is between 256 and 4096 characters. smart2= [HW] Format: <io1>[,<io2>[,...,<io8>]] + smp-alt-once [IA-32,SMP] On a hotplug CPU system, only + attempt to substitute SMP alternatives once at boot. + snd-ad1816a= [HW,ALSA] snd-ad1848= [HW,ALSA]
arch/i386/kernel/alternative.c +19 -4
@@ -5,6 +5,7 @@#include <asm/alternative.h> #include <asm/sections.h> +static int noreplace_smp =0 ;static int smp_alt_once =0 ;static int debug_alternative =0 ;
@@ -13,15 +14,23 @@ static int __init bootonly(char *str) smp_alt_once =1 ;return 1 ; } +__setup ("smp-alt-boot" , bootonly); +static int __init debug_alt (char *str) { debug_alternative =1 ;return 1 ; } - -__setup ("smp-alt-boot" , bootonly);__setup ("debug-alternative" , debug_alt); +static int __init setup_noreplace_smp (char *str) +{ + noreplace_smp =1 ; +return 1 ; +} +__setup ("noreplace-smp" , setup_noreplace_smp); + + #define DPRINTK(fmt, args...) if (debug_alternative) \ printk(KERN_DEBUG fmt, args)
@@ -185,6 +194,9 @@ static void alternatives_smp_unlock(u8 * {u8 **ptr; +if (noreplace_smp) +return ; +for (ptr = start; ptr < end; ptr++) {if (*ptr < text)continue ;
@@ -219,6 +231,9 @@ void alternatives_smp_module_add(structstruct smp_alt_module *smp;unsigned long flags; +if (noreplace_smp) +return ; +if (smp_alt_once) {if (boot_cpu_has (X86_FEATURE_UP )) alternatives_smp_unlock(locks, locks_end,
@@ -253,7 +268,7 @@ void alternatives_smp_module_del(structstruct smp_alt_module *item;unsigned long flags; -if (smp_alt_once) +if (smp_alt_once || noreplace_smp)return ;spin_lock_irqsave (&smp_alt, flags);
@@ -284,7 +299,7 @@ void alternatives_smp_switch(int smp)return ;#endif -if (smp_alt_once) +if (noreplace_smp || smp_alt_once)return ;BUG_ON (!smp && (num_online_cpus () >1 ));
PATCH 6/26 x86: fix amd64-agp aperture validation
In reply to Andi KleenFrom: "Jan Beulich" <[email protected]>
Under CONFIG_DISCONTIGMEM, assuming that a !pfn_valid() implies all subsequent pfn-s are also invalid is wrong. Thus replace this by explicitly checking against the E820 map.
AK: make e820 on x86-64 not initdata
--- arch/i386/kernel/e820.c | 20 ++++++++++++++++++++ arch/x86_64/kernel/e820.c | 5 +++-- drivers/char/agp/amd64-agp.c | 13 ++++--------- include/asm-i386/e820.h | 1 + 4 files changed, 28 insertions(+), 11 deletions(-)
arch/i386/kernel/e820.c +20 -0
@@ -825,6 +825,26 @@ void __init limit_regions(unsigned longprint_memory_map ("limit_regions endfunc" ); } +/* +* This function checks if any part of the range <start,end> is mapped +* with type. +*/ +int +e820_any_mapped (u64 start,u64 end,unsigned type) +{ +int i; +for (i =0 ; i < e820.nr_map; i++) { +const struct e820entry *ei = &e820.map[i]; +if (type && ei->type != type) +continue ; +if (ei->addr >= end || ei->addr + ei->size <= start) +continue ; +return 1 ; + } +return 0 ; +} +EXPORT_SYMBOL_GPL (e820_any_mapped); +/* * This function checks if the entire range <start,end> is mapped with type. *
arch/x86_64/kernel/e820.c +3 -2
@@ -25,7 +25,7 @@#include <asm/bootsetup.h> #include <asm/sections.h> -struct e820map e820__initdata ; +struct e820map e820;/* * PFN of last memory page.
@@ -98,7 +98,7 @@ static inline int bad_addr(unsigned long* This function checks if any part of the range <start,end> is mapped * with type. */ -int __meminit +int e820_any_mapped (unsigned long start,unsigned long end,unsigned type) {int i;
@@ -112,6 +112,7 @@ e820_any_mapped(unsigned long start, uns }return 0 ; } +EXPORT_SYMBOL_GPL (e820_any_mapped);/* * This function checks if the entire range <start,end> is mapped with type.
drivers/char/agp/amd64-agp.c +4 -9
@@ -14,6 +14,7 @@#include <linux/agp_backend.h> #include <linux/mmzone.h> #include <asm/page.h> /* PAGE_SIZE */ +#include <asm/e820.h> #include <asm/k8.h> #include "agp.h"
@@ -259,7 +260,6 @@ static const struct agp_bridge_driver am/* Some basic sanity checks for the aperture. */ static int __devinit aperture_valid (u64 aper,u32 size) { -u32 pfn, c;if (aper ==0 ) { printk(KERN_ERR PFX "No aperture\n");return 0 ;
@@ -272,14 +272,9 @@ static int __devinit aperture_valid(u64 printk(KERN_ERR PFX "Aperture out of bounds\n");return 0 ; } - pfn = aper >>PAGE_SHIFT ; -for (c =0 ; c < size/PAGE_SIZE ; c++) { -if (!pfn_valid (pfn + c)) -break ; -if (!PageReserved (pfn_to_page (pfn + c))) { - printk(KERN_ERR PFX "Aperture pointing to RAM\n"); -return 0 ; - } +if (e820_any_mapped (aper, aper + size,E820_RAM )) { + printk(KERN_ERR PFX "Aperture pointing to RAM\n"); +return 0 ; }/* Request the Aperture. This catches cases when someone else
include/asm-i386/e820.h +1 -0
@@ -38,6 +38,7 @@ extern struct e820map e820;extern int e820_all_mapped (unsigned long start,unsigned long end,unsigned type); +extern int e820_any_mapped (u64 start,u64 end,unsigned type);extern void find_max_pfn (void );extern void register_bootmem_low_pages (unsigned long max_low_pfn);extern void e820_register_memory (void );
Re: [PATCH] [19/26] i386: Enable bank 0 on non K7 Athlon
In reply to Andi KleenQuoted 7 lines · Andi Kleen
As a bug workaround bank 0 on K7s is normally disabled, but no need to do that on other AMD CPUs.
Signed-off-by Andi Kleen <[email protected]>
ACK, looks good to me.
thanks,
Dave
Signature · 1 line
http://www.codemonkey.org.uk
Re: [PATCH] [9/26] x86_64: Fix vmalloc_32 to really allocate <4GB on 64bit platforms
In reply to Andi KleenQuoted 16 lines · Andi Kleen
Ugly ifdef, but should handle all 64bit platforms that have suitable zones. On some like Altix it's probably impossible without IOMMU use to get memory <4GB this way, but they have to live with that.
Signed-off-by Andi Kleen <[email protected]>--- mm/vmalloc.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-)Index:
linux/mm/vmalloc.c
===================================================================mm/vmalloc.c +0
-0@@ -577,6 +577,14 @@ void *vmalloc_exec(unsigned long size)return __vmalloc (size,GFP_KERNEL | __GFP_HIGHMEM,PAGE_KERNEL_EXEC );
mm/vmalloc.c void *vmalloc_exec(unsigned long size) · line 587
Quoted 10 lines
mm/vmalloc.c +8
-0} +#if defined(CONFIG_64BIT ) && defined(CONFIG_ZONE_DMA32 ) +#define GFP_VMALLOC32 GFP_DMA32 +#elif defined(CONFIG_64BIT ) && defined(CONFIG_ZONE_DMA ) +#define GFP_VMALLOC32 GFP_DMA +#else +#define GFP_VMALLOC32 GFP_KERNEL +#endif +
Isn't the following shorter:
mm/vmalloc.c +9 -0
@@ -577,6 +577,15 @@ void *vmalloc_exec(unsigned long size)return __vmalloc (size,GFP_KERNEL | __GFP_HIGHMEM,PAGE_KERNEL_EXEC ); } +#if defined(CONFIG_64BIT ) +#if defined(CONFIG_ZONE_DMA32 ) +#define GFP_VMALLOC32 GFP_DMA32 +#elif defined(CONFIG_ZONE_DMA ) +#define GFP_VMALLOC32 GFP_DMA +#else +#define GFP_VMALLOC32 GFP_KERNEL +#endif +/** * vmalloc_32 - allocate virtually contiguous memory (32bit addressable) * @size: allocation size
Signature · 2 lines
Regards/Gruß,
Boris.Re: [PATCH] [9/26] x86_64: Fix vmalloc_32 to really allocate <4GB on 64bit platforms
Sorry, I meant this one:
mm/vmalloc.c +10 -0
@@ -577,6 +577,16 @@ void *vmalloc_exec(unsigned long size)return __vmalloc (size,GFP_KERNEL | __GFP_HIGHMEM,PAGE_KERNEL_EXEC ); } +#if defined(CONFIG_64BIT ) +#if defined(CONFIG_ZONE_DMA32 ) +#define GFP_VMALLOC32 GFP_DMA32 +#elif defined(CONFIG_ZONE_DMA ) +#define GFP_VMALLOC32 GFP_DMA +#endif +#else +#define GFP_VMALLOC32 GFP_KERNEL +#endif +/** * vmalloc_32 - allocate virtually contiguous memory (32bit addressable) * @size: allocation size
Signature · 2 lines
Regards/Gruß,
Boris.Re: [PATCH] [9/26] x86_64: Fix vmalloc_32 to really allocate <4GB on 64bit platforms
In reply to Borislav PetkovQuoted 2 lines
Isn't the following shorter:
Perhaps, but this is not a contest to write the shortest code. I think mine is more clearer.
-Andi