IDE updates (part 2)
PATCH 1/1 IDE updates (part 2)
Hi,
highlights of this update:
* Rework of IDE PMAC host driver: bugfixes, removal of the code duplicated from the IDE core and conversion to use the generic DMA tuning code path (the rework cuts ide-pmac.c by ~200 LOC).
Thanks to Ben Herrenschmidt for help with it.
* Move setting device transfer mode from host drivers to the core code, this makes IDE host drivers very similar to libata one's w.r.t. PIO/DMA tuning and cuts another ~200 LOC from IDE code.
* Backport cable fix from libata (original fix by Jeff & Tejun) and remove no longer needed CONFIG_IDEDMA_IVB config option.
* More host driver fixes.
Please pull from:
master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6.git/
to receive the following updates:
drivers/ide/Kconfig | 16 -- drivers/ide/arm/icside.c | 45 +----- drivers/ide/cris/ide-cris.c | 8 +- drivers/ide/ide-acpi.c | 1 - drivers/ide/ide-dma.c | 28 ++-- drivers/ide/ide-io.c | 10 +- drivers/ide/ide-iops.c | 133 +++++---------- drivers/ide/ide-lib.c | 78 +++++++-- drivers/ide/ide-probe.c | 7 +- drivers/ide/ide.c | 2 +- drivers/ide/legacy/ide_platform.c | 2 +- drivers/ide/mips/au1xxx-ide.c | 28 +--- drivers/ide/pci/aec62xx.c | 12 +- drivers/ide/pci/alim15x3.c | 58 +++----- drivers/ide/pci/amd74xx.c | 26 +-- drivers/ide/pci/atiixp.c | 33 ++--- drivers/ide/pci/cmd64x.c | 9 +- drivers/ide/pci/cs5520.c | 32 ++--- drivers/ide/pci/cs5530.c | 50 +----- drivers/ide/pci/cs5535.c | 38 ++--- drivers/ide/pci/hpt34x.c | 9 +- drivers/ide/pci/hpt366.c | 18 +-- drivers/ide/pci/it8213.c | 34 ++--- drivers/ide/pci/it821x.c | 90 ++++------- drivers/ide/pci/jmicron.c | 15 +- drivers/ide/pci/pdc202xx_new.c | 24 ++-- drivers/ide/pci/pdc202xx_old.c | 9 +- drivers/ide/pci/piix.c | 46 ++---- drivers/ide/pci/sc1200.c | 54 ++---- drivers/ide/pci/scc_pata.c | 28 ++-- drivers/ide/pci/serverworks.c | 14 +-- drivers/ide/pci/sgiioc4.c | 24 ++-- drivers/ide/pci/siimage.c | 29 ++-- drivers/ide/pci/sis5513.c | 16 +-- drivers/ide/pci/sl82c105.c | 23 +-- drivers/ide/pci/slc90e66.c | 18 +-- drivers/ide/pci/tc86c001.c | 9 +- drivers/ide/pci/triflex.c | 10 +- drivers/ide/pci/via82cxxx.c | 29 ++--- drivers/ide/ppc/pmac.c | 323 ++++++------------------------------- include/linux/ide.h | 35 ++-- 41 files changed, 484 insertions(+), 989 deletions(-)
Adrian Bunk (1):
ide: unexport ide_acpi_set_state
Bartlomiej Zolnierkiewicz (25):
ide_platform: set hwif->chipset
ide-pmac: don't check kauai_lookup_timing() return value
ide-pmac: pmac_ide_tune_chipset() fixes
ide-pmac: fix set_timings_mdma()
ide-pmac: remove control register messing from pmac_ide_dma_check()
ide-pmac: remove pmac_ide_{m,u}dma_enable() (take 2)
ide: add __ide_wait_stat() helper
ide-pmac: remove extra good status wait from pmac_ide_do_setfeature()
ide-pmac: use __ide_wait_stat()
ide-pmac: remove nIEN clearing from pmac_ide_do_setfeature()
ide-pmac: remove pmac_ide_do_setfeature() (take 2)
ide-pmac: use ide_tune_dma() (take 2)
icside: use ide_tune_dma()
au1xxx: fix au1xxx_set_pio_mode()
amd74xx/via82cxxx: check ide_config_drive_speed() return value
cs5535: check ide_config_drive_speed() return value
pdc202xx_new: check ide_config_drive_speed() return value
ide: move ide_config_drive_speed() calls to upper layers (take 2)
ide: change master/slave IDENTIFY order
ide: remove CONFIG_IDEDMA_IVB config option
cs5535: add missing ->dma_base check
sgiioc4: add missing ->dma_base check
cs5520: fix ->dma_base equal zero handling
sc1200: fix ->dma_base equal zero handling
alim15x3: remove redundant m5229_revision check
Benjamin Herrenschmidt (1):
ide-pmac: fix PIO setup and enable autotune
drivers/ide/Kconfig +0 -16
@@ -1074,22 +1074,6 @@ endif config BLK_DEV_IDEDMA def_bool BLK_DEV_IDEDMA_PCI || BLK_DEV_IDEDMA_PMAC || BLK_DEV_IDEDMA_ICS || BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA -config IDEDMA_IVB - bool "IGNORE word93 Validation BITS" - depends on BLK_DEV_IDEDMA_PCI || BLK_DEV_IDEDMA_PMAC || BLK_DEV_IDEDMA_ICS - ---help--- - There are unclear terms in ATA-4 and ATA-5 standards how certain - hardware (an 80c ribbon) should be detected. Different interpretations - of the standards have been released in hardware. This causes problems: - for example, a host with Ultra Mode 4 (or higher) will not run - in that mode with an 80c ribbon. - - If you are experiencing compatibility or performance problems, you - MAY try to answer Y here. However, it does not necessarily solve - any of your problems, it could even cause more of them. - - It is normally safe to answer Y; however, the default is N. - endif config BLK_DEV_HD_ONLY
drivers/ide/arm/icside.c +6 -39
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drivers/ide/cris/ide-cris.c +2 -6
@@ -716,11 +716,9 @@ static void cris_set_pio_mode(ide_drive_t *drive, const u8 pio) }cris_ide_set_speed (TYPE_PIO , setup, strobe, hold); - - (void )ide_config_drive_speed (drive,XFER_PIO_0 + pio); } -static int speed_cris_ide (ide_drive_t *drive,const u8 speed) +static void cris_set_dma_mode (ide_drive_t *drive,const u8 speed) {int cyc =0 , dvs =0 , strobe =0 , hold =0 ;
@@ -759,8 +757,6 @@ static int speed_cris_ide(ide_drive_t *drive, const u8 speed)cris_ide_set_speed (TYPE_UDMA , cyc, dvs,0 ); else cris_ide_set_speed(TYPE_DMA, 0, strobe, hold); - -return ide_config_drive_speed (drive, speed); }void __init
@@ -791,7 +787,7 @@ init_e100_ide (void) hwif->mmio =1 ; hwif->chipset = ide_etrax100; hwif->set_pio_mode = &cris_set_pio_mode; - hwif->speedproc = &speed_cris_ide; + hwif->set_dma_mode = &cris_set_dma_mode; hwif->ata_input_data = &cris_ide_input_data; hwif->ata_output_data = &cris_ide_output_data; hwif->atapi_input_bytes = &cris_atapi_input_bytes;
drivers/ide/ide-acpi.c +0 -1
@@ -649,7 +649,6 @@ void ide_acpi_set_state(ide_hwif_t *hwif, int on)if (!on)acpi_bus_set_power (hwif->acpidata->obj_handle,ACPI_STATE_D3 ); } -EXPORT_SYMBOL_GPL (ide_acpi_set_state);/** * ide_acpi_init - initialize the ACPI link for an IDE interface
drivers/ide/ide-dma.c +18 -10
@@ -169,6 +169,11 @@ ide_startstop_t ide_dma_intr (ide_drive_t *drive)EXPORT_SYMBOL_GPL (ide_dma_intr); +static int ide_dma_good_drive (ide_drive_t *drive) +{ +return ide_in_drive_list (drive->id, drive_whitelist); +} +#ifdef CONFIG_BLK_DEV_IDEDMA_PCI /** * ide_build_sglist - map IDE scatter gather for DMA I/O
@@ -357,7 +362,7 @@ static int config_drive_for_dma (ide_drive_t *drive)return 0 ;/* Consult the list of known "good" drives */ -if (__ide_dma_good_drive (drive)) +if (ide_dma_good_drive (drive))return 0 ; }
@@ -639,14 +644,6 @@ int __ide_dma_bad_drive (ide_drive_t *drive)EXPORT_SYMBOL (__ide_dma_bad_drive); -int __ide_dma_good_drive (ide_drive_t *drive) -{ -struct hd_driveid *id = drive->id; -return ide_in_drive_list (id, drive_whitelist); -} - -EXPORT_SYMBOL (__ide_dma_good_drive); -static const u8 xfer_mode_bases[] = {XFER_UDMA_0 ,XFER_MW_DMA_0 ,
@@ -746,6 +743,14 @@ u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode) } } +if (hwif->chipset == ide_acorn && mode ==0 ) { +/* +* is this correct? +*/ +if (ide_dma_good_drive (drive) && drive->id->eide_dma_time <150 ) + mode =XFER_MW_DMA_1 ; + } +printk (KERN_DEBUG "%s: selected mode 0x%x\n" , drive->name, mode);return min (mode, req_mode);
@@ -769,7 +774,10 @@ int ide_tune_dma(ide_drive_t *drive)if (!speed)return 0 ; -if (drive->hwif->speedproc (drive, speed)) +if (drive->hwif->host_flags &IDE_HFLAG_NO_SET_MODE ) +return 0 ; + +if (ide_set_dma_mode (drive, speed))return 0 ;return 1 ;
drivers/ide/ide-io.c +9 -1
@@ -836,9 +836,17 @@ static ide_startstop_t do_special (ide_drive_t *drive)if (set_pio_mode_abuse (drive->hwif, req_pio)) {if (hwif->set_pio_mode) hwif->set_pio_mode (drive, req_pio); - }else + }else { +int keep_dma = drive->using_dma; +ide_set_pio (drive, req_pio); +if (hwif->host_flags &IDE_HFLAG_SET_PIO_MODE_KEEP_DMA ) { +if (keep_dma) + hwif->ide_dma_on (drive); + } + } +return ide_stopped; }else {if (drive->media == ide_disk)
drivers/ide/ide-iops.c +44 -89
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drivers/ide/ide-lib.c +61 -17
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drivers/ide/ide-probe.c +3 -4
@@ -719,9 +719,9 @@ EXPORT_SYMBOL_GPL(ide_undecoded_slave);*/ static void probe_hwif (ide_hwif_t *hwif,void (*fixup)(ide_hwif_t *hwif)) { -unsigned int unit;unsigned long flags;unsigned int irqd; +int unit;if (hwif->noprobe)return ;
@@ -777,10 +777,9 @@ static void probe_hwif(ide_hwif_t *hwif, void (*fixup)(ide_hwif_t *hwif))printk (KERN_DEBUG "%s: Wait for ready failed before probe !\n" , hwif->name);/* -* Second drive should only exist if first drive was found, -* but a lot of cdrom drives are configured as single slaves. +* Need to probe slave device first to make it release PDIAG-. */ -for (unit =0 ; unit <MAX_DRIVES ; ++unit) { +for (unit =MAX_DRIVES -1 ; unit >=0 ; unit--) {ide_drive_t *drive = &hwif->drives[unit]; drive->dn = (hwif->channel ?2 :0 ) + unit; (void )probe_for_drive (drive);
drivers/ide/ide.c +1 -1
@@ -397,7 +397,7 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif)#endif hwif->set_pio_mode = tmp_hwif->set_pio_mode; - hwif->speedproc = tmp_hwif->speedproc; + hwif->set_dma_mode = tmp_hwif->set_dma_mode; hwif->mdma_filter = tmp_hwif->mdma_filter; hwif->udma_filter = tmp_hwif->udma_filter; hwif->selectproc = tmp_hwif->selectproc;
drivers/ide/legacy/ide_platform.c +1 -1
@@ -65,7 +65,7 @@ found: hwif->hw.irq = hwif->irq = irq; hwif->hw.dma =NO_DMA ; - hwif->hw.chipset = ide_generic; + hwif->chipset = hwif->hw.chipset = ide_generic;if (mmio) { hwif->mmio =1 ;
drivers/ide/mips/au1xxx-ide.c +6 -22
@@ -101,12 +101,7 @@ void auide_outsw(unsigned long port, void *addr, u32 count)static void au1xxx_set_pio_mode (ide_drive_t *drive,const u8 pio) { -int mem_sttime; -int mem_stcfg; -u8 speed; - - mem_sttime =0 ; - mem_stcfg =au_readl (MEM_STCFG2 ); +int mem_sttime =0 , mem_stcfg =au_readl (MEM_STCFG2 );/* set pio mode! */ switch (pio) {
@@ -164,18 +159,11 @@ static void au1xxx_set_pio_mode(ide_drive_t *drive, const u8 pio)au_writel (mem_sttime,MEM_STTIME2 );au_writel (mem_stcfg,MEM_STCFG2 ); - - speed = pio +XFER_PIO_0 ; -ide_config_drive_speed (drive, speed); } -static int auide_tune_chipset (ide_drive_t *drive,const u8 speed) +static void auide_set_dma_mode (ide_drive_t *drive,const u8 speed) { -int mem_sttime; -int mem_stcfg; - - mem_sttime =0 ; - mem_stcfg =au_readl (MEM_STCFG2 ); +int mem_sttime =0 , mem_stcfg =au_readl (MEM_STCFG2 );switch (speed) {#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
@@ -211,16 +199,11 @@ static int auide_tune_chipset(ide_drive_t *drive, const u8 speed)break ;#endif default : -return 1 ; +return ; } -if (ide_config_drive_speed (drive, speed)) -return 1 ; -au_writel (mem_sttime,MEM_STTIME2 );au_writel (mem_stcfg,MEM_STCFG2 ); - -return 0 ; }/*
@@ -682,6 +665,7 @@ static int au_ide_probe(struct device *dev)#endif hwif->pio_mask =ATA_PIO4 ; + hwif->host_flags =IDE_HFLAG_POST_SET_MODE ; hwif->noprobe =0 ; hwif->drives[0 ].unmask =1 ;
@@ -702,7 +686,7 @@ static int au_ide_probe(struct device *dev)#endif hwif->set_pio_mode = &au1xxx_set_pio_mode; - hwif->speedproc = &auide_tune_chipset; + hwif->set_dma_mode = &auide_set_dma_mode;#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA hwif->dma_off_quietly = &auide_dma_off_quietly;
drivers/ide/pci/aec62xx.c +5 -7
@@ -87,7 +87,7 @@ static u8 pci_bus_clock_list_ultra (u8 speed, struct chipset_bus_clock_list_entrreturn chipset_table->ultra_settings; } -static int aec6210_tune_chipset (ide_drive_t *drive,const u8 speed) +static void aec6210_set_mode (ide_drive_t *drive,const u8 speed) {ide_hwif_t *hwif =HWIF (drive);struct pci_dev *dev = hwif->pci_dev;
@@ -111,10 +111,9 @@ static int aec6210_tune_chipset(ide_drive_t *drive, const u8 speed) tmp2 = ((ultra_conf << (2 *drive->dn)) | (tmp1 & ~(3 << (2 *drive->dn))));pci_write_config_byte (dev,0x54 , tmp2);local_irq_restore (flags); -return (ide_config_drive_speed (drive, speed)); } -static int aec6260_tune_chipset (ide_drive_t *drive,const u8 speed) +static void aec6260_set_mode (ide_drive_t *drive,const u8 speed) {ide_hwif_t *hwif =HWIF (drive);struct pci_dev *dev = hwif->pci_dev;
@@ -135,12 +134,11 @@ static int aec6260_tune_chipset(ide_drive_t *drive, const u8 speed) tmp2 = ((ultra_conf << (4 *unit)) | (tmp1 & ~(7 << (4 *unit))));pci_write_config_byte (dev, (0x44 |hwif->channel), tmp2);local_irq_restore (flags); -return (ide_config_drive_speed (drive, speed)); }static void aec_set_pio_mode (ide_drive_t *drive,const u8 pio) { - (void )HWIF (drive)->speedproc (drive, pio +XFER_PIO_0 ); + drive->hwif->set_dma_mode (drive, pio +XFER_PIO_0 ); }static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive)
@@ -205,9 +203,9 @@ static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)if (dev->device ==PCI_DEVICE_ID_ARTOP_ATP850UF ) {if (hwif->mate) hwif->mate->serialized = hwif->serialized =1 ; - hwif->speedproc = &aec6210_tune_chipset; + hwif->set_dma_mode = &aec6210_set_mode; }else - hwif->speedproc = &aec6260_tune_chipset; + hwif->set_dma_mode = &aec6260_set_mode;if (!hwif->dma_base) { hwif->drives[0 ].autotune = hwif->drives[1 ].autotune =1 ;
drivers/ide/pci/alim15x3.c +21 -37
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drivers/ide/pci/amd74xx.c +9 -17
@@ -1,5 +1,5 @@/* -* Version 2.22 +* Version 2.23 * * AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s/CK804/MCP04 * IDE driver for Linux.
@@ -229,20 +229,16 @@ static void amd_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timi }/* -* amd_set_drive() computes timing values configures the drive and -* the chipset to a desired transfer mode. It also can be called -* by upper layers. +* amd_set_drive() computes timing values and configures the chipset +* to a desired transfer mode. It also can be called by upper layers. */ -static int amd_set_drive (ide_drive_t *drive,const u8 speed) +static void amd_set_drive (ide_drive_t *drive,const u8 speed) {ide_drive_t *peer =HWIF (drive)->drives + (~drive->dn &1 );struct ide_timing t, p;int T ,UT ; -if (speed !=XFER_PIO_SLOW ) -ide_config_drive_speed (drive, speed); -T =1000000000 / amd_clock;UT = (amd_config->udma_mask ==ATA_UDMA2 ) ?T : (T /2 );
@@ -257,12 +253,6 @@ static int amd_set_drive(ide_drive_t *drive, const u8 speed)if (speed ==XFER_UDMA_6 && amd_clock <=33333 ) t.udma =15 ;amd_set_speed (HWIF (drive)->pci_dev, drive->dn, &t); - -if (!drive->init_speed) - drive->init_speed = speed; - drive->current_speed = speed; - -return 0 ; }/*
@@ -399,7 +389,7 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) hwif->autodma =0 ; hwif->set_pio_mode = &amd_set_pio_mode; - hwif->speedproc = &amd_set_drive; + hwif->set_dma_mode = &amd_set_drive;for (i =0 ; i <2 ; i++) { hwif->drives[i].io_32bit =1 ;
@@ -441,7 +431,8 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \ .bootable = ON_BOARD, \ .host_flags =IDE_HFLAG_PIO_NO_BLACKLIST \ - | IDE_HFLAG_PIO_NO_DOWNGRADE, \ + |IDE_HFLAG_PIO_NO_DOWNGRADE \ + | IDE_HFLAG_POST_SET_MODE, \ .pio_mask = ATA_PIO5, \ }
@@ -454,7 +445,8 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif) .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \ .bootable = ON_BOARD, \ .host_flags =IDE_HFLAG_PIO_NO_BLACKLIST \ - | IDE_HFLAG_PIO_NO_DOWNGRADE, \ + |IDE_HFLAG_PIO_NO_DOWNGRADE \ + | IDE_HFLAG_POST_SET_MODE, \ .pio_mask = ATA_PIO5, \ }
drivers/ide/pci/atiixp.c +12 -21
@@ -122,14 +122,14 @@ static void atiixp_dma_host_off(ide_drive_t *drive) }/** -* atiixp_tune_pio - tune a drive attached to a ATIIXP -* @drive: drive to tune -* @pio: desired PIO mode +* atiixp_set_pio_mode - set host controller for PIO mode +* @drive: drive +* @pio: PIO mode number * * Set the interface PIO mode. */ -static void atiixp_tune_pio (ide_drive_t *drive,u8 pio) +static void atiixp_set_pio_mode (ide_drive_t *drive,const u8 pio) {struct pci_dev *dev = drive->hwif->pci_dev;unsigned long flags;
@@ -153,23 +153,16 @@ static void atiixp_tune_pio(ide_drive_t *drive, u8 pio)spin_unlock_irqrestore (&atiixp_lock, flags); } -static void atiixp_set_pio_mode (ide_drive_t *drive,const u8 pio) -{ -atiixp_tune_pio (drive, pio); - (void )ide_config_drive_speed (drive,XFER_PIO_0 + pio); -} -/** -* atiixp_tune_chipset - tune a ATIIXP interface -* @drive: IDE drive to tune -* @speed: speed to configure +* atiixp_set_dma_mode - set host controller for DMA mode +* @drive: drive +* @speed: DMA mode * -* Set a ATIIXP interface channel to the desired speeds. This involves -* requires the right timing data into the ATIIXP configuration space -* then setting the drive parameters appropriately +* Set a ATIIXP host controller to the desired DMA mode. This involves +* programming the right timing data into the PCI configuration space. */ -static int atiixp_speedproc (ide_drive_t *drive,const u8 speed) +static void atiixp_set_dma_mode (ide_drive_t *drive,const u8 speed) {struct pci_dev *dev = drive->hwif->pci_dev;unsigned long flags;
@@ -204,9 +197,7 @@ static int atiixp_speedproc(ide_drive_t *drive, const u8 speed)else pio = speed -XFER_PIO_0 ; -atiixp_tune_pio (drive, pio); - -return ide_config_drive_speed (drive, speed); +atiixp_set_pio_mode (drive, pio); }/**
@@ -249,7 +240,7 @@ static void __devinit init_hwif_atiixp(ide_hwif_t *hwif) hwif->autodma =0 ; hwif->set_pio_mode = &atiixp_set_pio_mode; - hwif->speedproc = &atiixp_speedproc; + hwif->set_dma_mode = &atiixp_set_dma_mode; hwif->drives[0 ].autotune =1 ; hwif->drives[1 ].autotune =1 ;
drivers/ide/pci/cmd64x.c +3 -6
@@ -280,10 +280,9 @@ static void cmd64x_set_pio_mode(ide_drive_t *drive, const u8 pio)return ;cmd64x_tune_pio (drive, pio); - (void )ide_config_drive_speed (drive,XFER_PIO_0 + pio); } -static int cmd64x_tune_chipset (ide_drive_t *drive,const u8 speed) +static void cmd64x_set_dma_mode (ide_drive_t *drive,const u8 speed) {ide_hwif_t *hwif =HWIF (drive);struct pci_dev *dev = hwif->pci_dev;
@@ -324,13 +323,11 @@ static int cmd64x_tune_chipset(ide_drive_t *drive, const u8 speed)program_cycle_times (drive,480 ,215 );break ;default : -return 1 ; +return ; }if (speed >=XFER_SW_DMA_0 ) (void )pci_write_config_byte (dev, pciU, regU); - -return ide_config_drive_speed (drive, speed); }static int cmd64x_config_drive_for_dma (ide_drive_t *drive)
@@ -524,7 +521,7 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)pci_read_config_byte (dev,PCI_REVISION_ID , &rev); hwif->set_pio_mode = &cmd64x_set_pio_mode; - hwif->speedproc = &cmd64x_tune_chipset; + hwif->set_dma_mode = &cmd64x_set_dma_mode; hwif->drives[0 ].autotune = hwif->drives[1 ].autotune =1 ;
drivers/ide/pci/cs5520.c +11 -21
@@ -96,22 +96,13 @@ static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio) reg =inb (hwif->dma_base +0x02 +8 *controller); reg |=1 <<((drive->dn&1 )+5 );outb (reg, hwif->dma_base +0x02 +8 *controller); - - (void )ide_config_drive_speed (drive,XFER_PIO_0 + pio); } -static int cs5520_tune_chipset (ide_drive_t *drive,const u8 speed) +static void cs5520_set_dma_mode (ide_drive_t *drive,const u8 speed) {printk (KERN_ERR "cs55x0: bad ide timing.\n" );cs5520_set_pio_mode (drive,0 ); - -/* -* FIXME: this is incorrect to return zero here but -* since all users of ide_set_xfer_rate() ignore -* the return value it is not a problem currently -*/ -return 0 ; }static int cs5520_config_drive_xfer_rate (ide_drive_t *drive)
@@ -150,26 +141,25 @@ static int cs5520_dma_on(ide_drive_t *drive)static void __devinit init_hwif_cs5520 (ide_hwif_t *hwif) { hwif->set_pio_mode = &cs5520_set_pio_mode; - hwif->speedproc = &cs5520_tune_chipset; - hwif->ide_dma_check = &cs5520_config_drive_xfer_rate; - hwif->ide_dma_on = &cs5520_dma_on; + hwif->set_dma_mode = &cs5520_set_dma_mode; -if (!noautodma) - hwif->autodma =1 ; - -if (!hwif->dma_base) - { - hwif->drives[0 ].autotune =1 ; - hwif->drives[1 ].autotune =1 ; +if (hwif->dma_base ==0 ) { + hwif->drives[1 ].autotune = hwif->drives[0 ].autotune =1 ;return ; } + hwif->ide_dma_check = &cs5520_config_drive_xfer_rate; + hwif->ide_dma_on = &cs5520_dma_on; +/* ATAPI is harder so leave it for now */ hwif->atapi_dma =0 ; hwif->ultra_mask =0 ; hwif->swdma_mask =0 ; hwif->mwdma_mask =0 ; - + +if (!noautodma) + hwif->autodma =1 ; + hwif->drives[0 ].autodma = hwif->autodma; hwif->drives[1 ].autodma = hwif->autodma; }
drivers/ide/pci/cs5530.c +9 -41
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drivers/ide/pci/cs5535.c +17 -21
@@ -131,24 +131,21 @@ static void cs5535_set_speed(ide_drive_t *drive, const u8 speed) } } -/**** -* cs5535_set_drive - Configure the drive to the new speed -* @drive: Drive to set up -* @speed: desired speed +/** +* cs5535_set_dma_mode - set host controller for DMA mode +* @drive: drive +* @speed: DMA mode * -* cs5535_set_drive() configures the drive and the chipset to a -* new speed. It also can be called by upper layers. +* Programs the chipset for DMA mode. */ -static int cs5535_set_drive (ide_drive_t *drive,u8 speed) + +static void cs5535_set_dma_mode (ide_drive_t *drive,const u8 speed) { -ide_config_drive_speed (drive, speed);cs5535_set_speed (drive, speed); - -return 0 ; }/** -* cs5535_set_pio_mode - PIO setup +* cs5535_set_pio_mode - set host controller for PIO mode * @drive: drive * @pio: PIO mode number *
@@ -157,7 +154,6 @@ static int cs5535_set_drive(ide_drive_t *drive, u8 speed)static void cs5535_set_pio_mode (ide_drive_t *drive,const u8 pio) { -ide_config_drive_speed (drive,XFER_PIO_0 + pio);cs5535_set_speed (drive,XFER_PIO_0 + pio); }
@@ -194,12 +190,16 @@ static u8 __devinit cs5535_cable_detect(struct pci_dev *dev)*/ static void __devinit init_hwif_cs5535 (ide_hwif_t *hwif) { -int i; - hwif->autodma =0 ; hwif->set_pio_mode = &cs5535_set_pio_mode; - hwif->speedproc = &cs5535_set_drive; + hwif->set_dma_mode = &cs5535_set_dma_mode; + + hwif->drives[1 ].autotune = hwif->drives[0 ].autotune =1 ; + +if (hwif->dma_base ==0 ) +return ; + hwif->ide_dma_check = &cs5535_dma_check; hwif->atapi_dma =1 ;
@@ -211,11 +211,7 @@ static void __devinit init_hwif_cs5535(ide_hwif_t *hwif)if (!noautodma) hwif->autodma =1 ; -/* just setting autotune and not worrying about bios timings */ -for (i =0 ; i <2 ; i++) { - hwif->drives[i].autotune =1 ; - hwif->drives[i].autodma = hwif->autodma; - } + hwif->drives[1 ].autodma = hwif->drives[0 ].autodma = hwif->autodma; }static ide_pci_device_t cs5535_chipset__devinitdata = {
@@ -223,7 +219,7 @@ static ide_pci_device_t cs5535_chipset __devinitdata = { .init_hwif = init_hwif_cs5535, .autodma = AUTODMA, .bootable = ON_BOARD, - .host_flags = IDE_HFLAG_SINGLE, + .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE, .pio_mask = ATA_PIO4, };
drivers/ide/pci/hpt34x.c +4 -5
@@ -43,7 +43,7 @@#define HPT343_DEBUG_DRIVE_INFO 0 -static int hpt34x_tune_chipset (ide_drive_t *drive,const u8 speed) +static void hpt34x_set_mode (ide_drive_t *drive,const u8 speed) {struct pci_dev *dev =HWIF (drive)->pci_dev;u32 reg1=0 , tmp1 =0 , reg2 =0 , tmp2 =0 ;
@@ -73,13 +73,11 @@ static int hpt34x_tune_chipset(ide_drive_t *drive, const u8 speed) drive->dn, reg1, tmp1, reg2, tmp2, hi_speed, lo_speed);#endif /* HPT343_DEBUG_DRIVE_INFO */ - -return (ide_config_drive_speed (drive, speed)); }static void hpt34x_set_pio_mode (ide_drive_t *drive,const u8 pio) { - (void )hpt34x_tune_chipset (drive, (XFER_PIO_0 + pio)); +hpt34x_set_mode (drive,XFER_PIO_0 + pio); }static int hpt34x_config_drive_xfer_rate (ide_drive_t *drive)
@@ -145,7 +143,8 @@ static void __devinit init_hwif_hpt34x(ide_hwif_t *hwif) hwif->autodma =0 ; hwif->set_pio_mode = &hpt34x_set_pio_mode; - hwif->speedproc = &hpt34x_tune_chipset; + hwif->set_dma_mode = &hpt34x_set_mode; + hwif->drives[0 ].autotune =1 ; hwif->drives[1 ].autotune =1 ;
drivers/ide/pci/hpt366.c +7 -11
@@ -600,7 +600,7 @@ static u32 get_speed_setting(u8 speed, struct hpt_info *info)return (*info->settings)[i]; } -static int hpt36x_tune_chipset (ide_drive_t *drive,const u8 speed) +static void hpt36x_set_mode (ide_drive_t *drive,const u8 speed) {ide_hwif_t *hwif =HWIF (drive);struct pci_dev *dev = hwif->pci_dev;
@@ -623,11 +623,9 @@ static int hpt36x_tune_chipset(ide_drive_t *drive, const u8 speed) new_itr &= ~0xc0000000 ;pci_write_config_dword (dev, itr_addr, new_itr); - -return ide_config_drive_speed (drive, speed); } -static int hpt37x_tune_chipset (ide_drive_t *drive,const u8 speed) +static void hpt37x_set_mode (ide_drive_t *drive,const u8 speed) {ide_hwif_t *hwif =HWIF (drive);struct pci_dev *dev = hwif->pci_dev;
@@ -647,24 +645,22 @@ static int hpt37x_tune_chipset(ide_drive_t *drive, const u8 speed)if (speed <XFER_MW_DMA_0 ) new_itr &= ~0x80000000 ;/* Disable on-chip PIO FIFO/buffer */ pci_write_config_dword (dev, itr_addr, new_itr); - -return ide_config_drive_speed (drive, speed); } -static int hpt3xx_tune_chipset (ide_drive_t *drive,u8 speed) +static void hpt3xx_set_mode (ide_drive_t *drive,const u8 speed) {ide_hwif_t *hwif =HWIF (drive);struct hpt_info *info =pci_get_drvdata (hwif->pci_dev);if (info->chip_type >=HPT370 ) -return hpt37x_tune_chipset (drive, speed); +hpt37x_set_mode (drive, speed);else /* hpt368: hpt_minimum_revision(dev, 2) */ -return hpt36x_tune_chipset (drive, speed); +hpt36x_set_mode (drive, speed); }static void hpt3xx_set_pio_mode (ide_drive_t *drive,const u8 pio) { - (void )hpt3xx_tune_chipset (drive,XFER_PIO_0 + pio); +hpt3xx_set_mode (drive,XFER_PIO_0 + pio); }static int hpt3xx_quirkproc (ide_drive_t *drive)
@@ -1257,7 +1253,7 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) hwif->select_data = hwif->channel ?0x54 :0x50 ; hwif->set_pio_mode = &hpt3xx_set_pio_mode; - hwif->speedproc = &hpt3xx_tune_chipset; + hwif->set_dma_mode = &hpt3xx_set_mode; hwif->quirkproc = &hpt3xx_quirkproc; hwif->intrproc = &hpt3xx_intrproc; hwif->maskproc = &hpt3xx_maskproc;
drivers/ide/pci/it8213.c +13 -21
@@ -48,15 +48,15 @@ static u8 it8213_dma_2_pio (u8 xfer_rate) { } } -/* -* it8213_tune_pio - tune a drive -* @drive: drive to tune -* @pio: desired PIO mode +/** +* it8213_set_pio_mode - set host controller for PIO mode +* @drive: drive +* @pio: PIO mode number * * Set the interface PIO mode. */ -static void it8213_tune_pio (ide_drive_t *drive,const u8 pio) +static void it8213_set_pio_mode (ide_drive_t *drive,const u8 pio) {ide_hwif_t *hwif =HWIF (drive);struct pci_dev *dev = hwif->pci_dev;
@@ -105,21 +105,15 @@ static void it8213_tune_pio(ide_drive_t *drive, const u8 pio)spin_unlock_irqrestore (&tune_lock, flags); } -static void it8213_set_pio_mode (ide_drive_t *drive,const u8 pio) -{ -it8213_tune_pio (drive, pio); -ide_config_drive_speed (drive,XFER_PIO_0 + pio); -} -/** -* it8213_tune_chipset - set controller timings -* @drive: Drive to set up -* @speed: speed we want to achieve +* it8213_set_dma_mode - set host controller for DMA mode +* @drive: drive +* @speed: DMA mode * -* Tune the ITE chipset for the desired mode. +* Tune the ITE chipset for the DMA mode. */ -static int it8213_tune_chipset (ide_drive_t *drive,const u8 speed) +static void it8213_set_dma_mode (ide_drive_t *drive,const u8 speed) {ide_hwif_t *hwif =HWIF (drive);struct pci_dev *dev = hwif->pci_dev;
@@ -152,7 +146,7 @@ static int it8213_tune_chipset(ide_drive_t *drive, const u8 speed)case XFER_SW_DMA_2 :break ;default : -return -1 ; +return ; }if (speed >=XFER_UDMA_0 ) {
@@ -182,9 +176,7 @@ static int it8213_tune_chipset(ide_drive_t *drive, const u8 speed)pci_write_config_byte (dev,0x55 , (u8 ) reg55 & ~w_flag); } -it8213_tune_pio (drive,it8213_dma_2_pio (speed)); - -return ide_config_drive_speed (drive, speed); +it8213_set_pio_mode (drive,it8213_dma_2_pio (speed)); }/**
@@ -220,7 +212,7 @@ static void __devinit init_hwif_it8213(ide_hwif_t *hwif) {u8 reg42h =0 ; - hwif->speedproc = &it8213_tune_chipset; + hwif->set_dma_mode = &it8213_set_dma_mode; hwif->set_pio_mode = &it8213_set_pio_mode; hwif->autodma =0 ;
drivers/ide/pci/it821x.c +29 -61
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drivers/ide/pci/jmicron.c +6 -9
@@ -85,21 +85,18 @@ static u8 __devinit ata66_jmicron(ide_hwif_t *hwif)static void jmicron_set_pio_mode (ide_drive_t *drive,const u8 pio) { -ide_config_drive_speed (drive,XFER_PIO_0 + pio); }/** -* jmicron_tune_chipset - set controller timings -* @drive: Drive to set up -* @speed: speed we want to achieve +* jmicron_set_dma_mode - set host controller for DMA mode +* @drive: drive +* @mode: DMA mode * -* As the JMicron snoops for timings all we actually need to do is -* set the transfer mode on the device. +* As the JMicron snoops for timings we don't need to do anything here. */ -static int jmicron_tune_chipset (ide_drive_t *drive,const u8 speed) +static void jmicron_set_dma_mode (ide_drive_t *drive,const u8 mode) { -return ide_config_drive_speed (drive, speed); }/**
@@ -129,8 +126,8 @@ static int jmicron_config_drive_for_dma (ide_drive_t *drive)static void __devinit init_hwif_jmicron (ide_hwif_t *hwif) { - hwif->speedproc = &jmicron_tune_chipset; hwif->set_pio_mode = &jmicron_set_pio_mode; + hwif->set_dma_mode = &jmicron_set_dma_mode; hwif->drives[0 ].autotune =1 ; hwif->drives[1 ].autotune =1 ;
drivers/ide/pci/pdc202xx_new.c +13 -11
@@ -146,19 +146,16 @@ static struct udma_timing { { 0x1a, 0x01, 0xcb }, /* UDMA mode 6 */ }; -static int pdcnew_tune_chipset (ide_drive_t *drive,const u8 speed) +static void pdcnew_set_mode (ide_drive_t *drive,const u8 speed) {ide_hwif_t *hwif =HWIF (drive);u8 adj = (drive->dn &1 ) ?0x08 :0x00 ; -int err;/* -* Issue SETFEATURES_XFER to the drive first. PDC202xx hardware will +* IDE core issues SETFEATURES_XFER to the drive first (thanks to +* IDE_HFLAG_POST_SET_MODE in ->host_flags). PDC202xx hardware will * automatically set the timing registers based on 100 MHz PLL output. -*/ - err =ide_config_drive_speed (drive, speed); - -/* +* * As we set up the PLL to output 133 MHz for UltraDMA/133 capable * chips, we must override the default register settings... */
@@ -211,13 +208,11 @@ static int pdcnew_tune_chipset(ide_drive_t *drive, const u8 speed)set_indexed_reg (hwif,0x10 + adj, tmp &0x7f ); } - -return err; }static void pdcnew_set_pio_mode (ide_drive_t *drive,const u8 pio) { - (void )pdcnew_tune_chipset (drive,XFER_PIO_0 + pio); +pdcnew_set_mode (drive,XFER_PIO_0 + pio); }static u8 pdcnew_cable_detect (ide_hwif_t *hwif)
@@ -490,9 +485,9 @@ static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif) hwif->autodma =0 ; hwif->set_pio_mode = &pdcnew_set_pio_mode; + hwif->set_dma_mode = &pdcnew_set_mode; hwif->quirkproc = &pdcnew_quirkproc; - hwif->speedproc = &pdcnew_tune_chipset; hwif->resetproc = &pdcnew_reset; hwif->err_stops_fifo =1 ;
@@ -583,6 +578,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = { .bootable = OFF_BOARD, .pio_mask = ATA_PIO4, .udma_mask = 0x3f, /* udma0-5 */ + .host_flags = IDE_HFLAG_POST_SET_MODE, },{ /* 1 */ .name = "PDC20269", .init_setup = init_setup_pdcnew,
@@ -592,6 +588,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = { .bootable = OFF_BOARD, .pio_mask = ATA_PIO4, .udma_mask = 0x7f, /* udma0-6*/ + .host_flags = IDE_HFLAG_POST_SET_MODE, },{ /* 2 */ .name = "PDC20270", .init_setup = init_setup_pdc20270,
@@ -601,6 +598,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = { .bootable = OFF_BOARD, .pio_mask = ATA_PIO4, .udma_mask = 0x3f, /* udma0-5 */ + .host_flags = IDE_HFLAG_POST_SET_MODE, },{ /* 3 */ .name = "PDC20271", .init_setup = init_setup_pdcnew,
@@ -610,6 +608,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = { .bootable = OFF_BOARD, .pio_mask = ATA_PIO4, .udma_mask = 0x7f, /* udma0-6*/ + .host_flags = IDE_HFLAG_POST_SET_MODE, },{ /* 4 */ .name = "PDC20275", .init_setup = init_setup_pdcnew,
@@ -619,6 +618,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = { .bootable = OFF_BOARD, .pio_mask = ATA_PIO4, .udma_mask = 0x7f, /* udma0-6*/ + .host_flags = IDE_HFLAG_POST_SET_MODE, },{ /* 5 */ .name = "PDC20276", .init_setup = init_setup_pdc20276,
@@ -628,6 +628,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = { .bootable = OFF_BOARD, .pio_mask = ATA_PIO4, .udma_mask = 0x7f, /* udma0-6*/ + .host_flags = IDE_HFLAG_POST_SET_MODE, },{ /* 6 */ .name = "PDC20277", .init_setup = init_setup_pdcnew,
@@ -637,6 +638,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = { .bootable = OFF_BOARD, .pio_mask = ATA_PIO4, .udma_mask = 0x7f, /* udma0-6*/ + .host_flags = IDE_HFLAG_POST_SET_MODE, } };
drivers/ide/pci/pdc202xx_old.c +3 -6
@@ -63,7 +63,7 @@ static const char *pdc_quirk_drives[] = {static void pdc_old_disable_66MHz_clock (ide_hwif_t *); -static int pdc202xx_tune_chipset (ide_drive_t *drive,const u8 speed) +static void pdc202xx_set_mode (ide_drive_t *drive,const u8 speed) {ide_hwif_t *hwif =HWIF (drive);struct pci_dev *dev = hwif->pci_dev;
@@ -138,13 +138,11 @@ static int pdc202xx_tune_chipset(ide_drive_t *drive, const u8 speed)pci_read_config_dword (dev, drive_pci, &drive_conf);printk ("0x%08x\n" , drive_conf);#endif - -return ide_config_drive_speed (drive, speed); }static void pdc202xx_set_pio_mode (ide_drive_t *drive,const u8 pio) { -pdc202xx_tune_chipset (drive,XFER_PIO_0 + pio); +pdc202xx_set_mode (drive,XFER_PIO_0 + pio); }static u8 pdc202xx_old_cable_detect (ide_hwif_t *hwif)
@@ -330,14 +328,13 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif) hwif->autodma =0 ; hwif->set_pio_mode = &pdc202xx_set_pio_mode; + hwif->set_dma_mode = &pdc202xx_set_mode; hwif->quirkproc = &pdc202xx_quirkproc;if (hwif->pci_dev->device !=PCI_DEVICE_ID_PROMISE_20246 ) hwif->resetproc = &pdc202xx_reset; - hwif->speedproc = &pdc202xx_tune_chipset; - hwif->err_stops_fifo =1 ; hwif->drives[0 ].autotune = hwif->drives[1 ].autotune =1 ;
drivers/ide/pci/piix.c +15 -31
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drivers/ide/pci/sc1200.c +18 -36
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drivers/ide/pci/scc_pata.c +10 -18
@@ -190,15 +190,15 @@ scc_ide_outsl(unsigned long port, void *addr, u32 count) }/** -* scc_tune_pio - tune a drive PIO mode -* @drive: drive to tune -* @mode_wanted: the target operating mode +* scc_set_pio_mode - set host controller for PIO mode +* @drive: drive +* @pio: PIO mode number * * Load the timing settings for this device mode into the * controller. */ -static void scc_tune_pio (ide_drive_t *drive,const u8 pio) +static void scc_set_pio_mode (ide_drive_t *drive,const u8 pio) {ide_hwif_t *hwif =HWIF (drive);struct scc_ports *ports =ide_get_hwifdata (hwif);
@@ -221,22 +221,16 @@ static void scc_tune_pio(ide_drive_t *drive, const u8 pio)out_be32 ((void __iomem *)pioct_port, reg); } -static void scc_set_pio_mode (ide_drive_t *drive,const u8 pio) -{ -scc_tune_pio (drive, pio); -ide_config_drive_speed (drive,XFER_PIO_0 + pio); -} -/** -* scc_tune_chipset - tune a drive DMA mode -* @drive: Drive to set up -* @speed: speed we want to achieve +* scc_set_dma_mode - set host controller for DMA mode +* @drive: drive +* @speed: DMA mode * * Load the timing settings for this device mode into the * controller. */ -static int scc_tune_chipset (ide_drive_t *drive,const u8 speed) +static void scc_set_dma_mode (ide_drive_t *drive,const u8 speed) {ide_hwif_t *hwif =HWIF (drive);struct scc_ports *ports =ide_get_hwifdata (hwif);
@@ -271,7 +265,7 @@ static int scc_tune_chipset(ide_drive_t *drive, const u8 speed) idx = speed -XFER_UDMA_0 ;break ;default : -return 1 ; +return ; } jcactsel = JCACTSELtbl[offset][idx];
@@ -287,8 +281,6 @@ static int scc_tune_chipset(ide_drive_t *drive, const u8 speed) } reg = JCTSStbl[offset][idx] <<16 | JCENVTtbl[offset][idx];out_be32 ((void __iomem *)udenvt_port, reg); - -return ide_config_drive_speed (drive, speed); }/**
@@ -708,8 +700,8 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif) hwif->dma_setup = scc_dma_setup; hwif->ide_dma_end = scc_ide_dma_end; - hwif->speedproc = scc_tune_chipset; hwif->set_pio_mode = scc_set_pio_mode; + hwif->set_dma_mode = scc_set_dma_mode; hwif->ide_dma_check = scc_config_drive_for_dma; hwif->ide_dma_test_irq = scc_dma_test_irq; hwif->udma_filter = scc_udma_filter;
drivers/ide/pci/serverworks.c +3 -11
@@ -124,7 +124,7 @@ static u8 svwks_csb_check (struct pci_dev *dev)return 0 ; } -static void svwks_tune_pio (ide_drive_t *drive,const u8 pio) +static void svwks_set_pio_mode (ide_drive_t *drive,const u8 pio) {static const u8 pio_modes[] = {0x5d ,0x47 ,0x34 ,0x22 ,0x20 };static const u8 drive_pci[] = {0x41 ,0x40 ,0x43 ,0x42 };
@@ -145,7 +145,7 @@ static void svwks_tune_pio(ide_drive_t *drive, const u8 pio) } } -static int svwks_tune_chipset (ide_drive_t *drive,const u8 speed) +static void svwks_set_dma_mode (ide_drive_t *drive,const u8 speed) {static const u8 udma_modes[] = {0x00 ,0x01 ,0x02 ,0x03 ,0x04 ,0x05 };static const u8 dma_modes[] = {0x77 ,0x21 ,0x20 };
@@ -193,14 +193,6 @@ static int svwks_tune_chipset(ide_drive_t *drive, const u8 speed)pci_write_config_byte (dev, drive_pci2[drive->dn], dma_timing);pci_write_config_byte (dev, (0x56 |hwif->channel), ultra_timing);pci_write_config_byte (dev,0x54 , ultra_enable); - -return (ide_config_drive_speed (drive, speed)); -} - -static void svwks_set_pio_mode (ide_drive_t *drive,const u8 pio) -{ -svwks_tune_pio (drive, pio); - (void )ide_config_drive_speed (drive,XFER_PIO_0 + pio); }static int svwks_config_drive_xfer_rate (ide_drive_t *drive)
@@ -384,7 +376,7 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif) hwif->irq = hwif->channel ?15 :14 ; hwif->set_pio_mode = &svwks_set_pio_mode; - hwif->speedproc = &svwks_tune_chipset; + hwif->set_dma_mode = &svwks_set_dma_mode; hwif->udma_filter = &svwks_udma_filter; hwif->atapi_dma =1 ;
drivers/ide/pci/sgiioc4.c +12 -12
@@ -291,12 +291,8 @@ static void sgiioc4_dma_off_quietly(ide_drive_t *drive) drive->hwif->dma_host_off (drive); } -static int sgiioc4_speedproc (ide_drive_t *drive,const u8 speed) +static void sgiioc4_set_dma_mode (ide_drive_t *drive,const u8 speed) { -if (speed !=XFER_MW_DMA_2 ) -return 1 ; - -return ide_config_drive_speed (drive, speed); }static int sgiioc4_ide_dma_check (ide_drive_t *drive)
@@ -591,11 +587,9 @@ static void __devinit ide_init_sgiioc4(ide_hwif_t * hwif) { hwif->mmio =1 ; - hwif->atapi_dma =1 ; - hwif->mwdma_mask =0x04 ; hwif->pio_mask =0x00 ; hwif->set_pio_mode =NULL ;/* Sets timing for PIO mode */ - hwif->speedproc = &sgiioc4_speedproc; + hwif->set_dma_mode = &sgiioc4_set_dma_mode; hwif->selectproc =NULL ;/* Use the default routine to select drive */ hwif->reset_poll =NULL ;/* No HBA specific reset_poll needed */ hwif->pre_reset =NULL ;/* No HBA specific pre_set needed */
@@ -606,6 +600,14 @@ ide_init_sgiioc4(ide_hwif_t * hwif) hwif->quirkproc =NULL ; hwif->busproc =NULL ; + hwif->INB = &sgiioc4_INB; + +if (hwif->dma_base ==0 ) +return ; + + hwif->atapi_dma =1 ; + hwif->mwdma_mask =0x04 ; + hwif->dma_setup = &sgiioc4_ide_dma_setup; hwif->dma_start = &sgiioc4_ide_dma_start; hwif->ide_dma_end = &sgiioc4_ide_dma_end;
@@ -617,8 +619,6 @@ ide_init_sgiioc4(ide_hwif_t * hwif) hwif->dma_host_off = &sgiioc4_dma_host_off; hwif->dma_lost_irq = &sgiioc4_dma_lost_irq; hwif->dma_timeout = &ide_dma_timeout; - - hwif->INB = &sgiioc4_INB; } static int __devinit
@@ -688,8 +688,6 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev)/* Initializing chipset IRQ Registers */ writel (0x03 , (void __iomem *)(irqport +IOC4_INTR_SET *4 )); -ide_init_sgiioc4 (hwif); - hwif->autodma =0 ;if (dma_base &&ide_dma_sgiioc4 (hwif, dma_base) ==0 ) {
@@ -699,6 +697,8 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev)printk (KERN_INFO "%s: %s Bus-Master DMA disabled\n" , hwif->name,DRV_NAME ); +ide_init_sgiioc4 (hwif); +if (probe_hwif_init (hwif))return -EIO ;
drivers/ide/pci/siimage.c +11 -18
@@ -165,16 +165,16 @@ out: }/** -* sil_tune_pio - tune a drive -* @drive: drive to tune -* @pio: the desired PIO mode +* sil_set_pio_mode - set host controller for PIO mode +* @drive: drive +* @pio: PIO mode number * * Load the timing settings for this device mode into the * controller. If we are in PIO mode 3 or 4 turn on IORDY * monitoring (bit 9). The TF timing is bits 31:16 */ -static void sil_tune_pio (ide_drive_t *drive,u8 pio) +static void sil_set_pio_mode (ide_drive_t *drive,u8 pio) {const u16 tf_speed[] = {0x328a ,0x2283 ,0x1281 ,0x10c3 ,0x10c1 };const u16 data_speed[] = {0x328a ,0x2283 ,0x1104 ,0x10c3 ,0x10c1 };
@@ -234,21 +234,15 @@ static void sil_tune_pio(ide_drive_t *drive, u8 pio) } } -static void sil_set_pio_mode (ide_drive_t *drive,const u8 pio) -{ -sil_tune_pio (drive, pio); - (void )ide_config_drive_speed (drive,XFER_PIO_0 + pio); -} -/** -* siimage_tune_chipset - set controller timings -* @drive: Drive to set up -* @speed: speed we want to achieve +* sil_set_dma_mode - set host controller for DMA mode +* @drive: drive +* @speed: DMA mode * -* Tune the SII chipset for the desired mode. +* Tune the SiI chipset for the desired DMA mode. */ -static int siimage_tune_chipset (ide_drive_t *drive,const u8 speed) +static void sil_set_dma_mode (ide_drive_t *drive,const u8 speed) {u8 ultra6[] = {0x0F ,0x0B ,0x07 ,0x05 ,0x03 ,0x02 ,0x01 };u8 ultra5[] = {0x0C ,0x07 ,0x05 ,0x04 ,0x02 ,0x01 };
@@ -303,7 +297,7 @@ static int siimage_tune_chipset(ide_drive_t *drive, const u8 speed) mode |= ((unit) ?0x30 :0x03 );break ;default : -return 1 ; +return ; }if (hwif->mmio) {
@@ -315,7 +309,6 @@ static int siimage_tune_chipset(ide_drive_t *drive, const u8 speed)pci_write_config_word (hwif->pci_dev, ma, multi);pci_write_config_word (hwif->pci_dev, ua, ultra); } -return (ide_config_drive_speed (drive, speed)); }/**
@@ -904,8 +897,8 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif) hwif->autodma =0 ; hwif->resetproc = &siimage_reset; - hwif->speedproc = &siimage_tune_chipset; hwif->set_pio_mode = &sil_set_pio_mode; + hwif->set_dma_mode = &sil_set_dma_mode; hwif->reset_poll = &siimage_reset_poll; hwif->pre_reset = &siimage_pre_reset; hwif->udma_filter = &sil_udma_filter;
drivers/ide/pci/sis5513.c +4 -12
@@ -451,7 +451,7 @@ static void config_drive_art_rwp (ide_drive_t *drive) }/* Set per-drive active and recovery time */ -static void config_art_rwp_pio (ide_drive_t *drive,u8 pio) +static void sis_set_pio_mode (ide_drive_t *drive,const u8 pio) {ide_hwif_t *hwif =HWIF (drive);struct pci_dev *dev = hwif->pci_dev;
@@ -519,20 +519,14 @@ static void config_art_rwp_pio (ide_drive_t *drive, u8 pio) } } -static void sis_set_pio_mode (ide_drive_t *drive,const u8 pio) -{ -config_art_rwp_pio (drive, pio); - (void )ide_config_drive_speed (drive,XFER_PIO_0 + pio); -} - -static int sis5513_tune_chipset (ide_drive_t *drive,const u8 speed) +static void sis_set_dma_mode (ide_drive_t *drive,const u8 speed) {ide_hwif_t *hwif =HWIF (drive);struct pci_dev *dev = hwif->pci_dev;u32 regdw;u8 drive_pci, reg; -/* See config_art_rwp_pio for drive pci config registers */ +/* See sis_set_pio_mode() for drive PCI config registers */ drive_pci =0x40 ;if (chipset_family >=ATA_133 ) {u32 reg54h;
@@ -600,8 +594,6 @@ static int sis5513_tune_chipset(ide_drive_t *drive, const u8 speed)BUG ();break ; } - -return ide_config_drive_speed (drive, speed); }static int sis5513_config_xfer_rate (ide_drive_t *drive)
@@ -841,7 +833,7 @@ static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif) hwif->irq = hwif->channel ?15 :14 ; hwif->set_pio_mode = &sis_set_pio_mode; - hwif->speedproc = &sis5513_tune_chipset; + hwif->set_dma_mode = &sis_set_dma_mode;if (chipset_family >=ATA_133 ) hwif->udma_filter = sis5513_ata133_udma_filter;
drivers/ide/pci/sl82c105.c +5 -18
@@ -75,7 +75,7 @@ static unsigned int get_pio_timings(ide_drive_t *drive, u8 pio)/* * Configure the chipset for PIO mode. */ -static void sl82c105_tune_pio (ide_drive_t *drive,const u8 pio) +static void sl82c105_set_pio_mode (ide_drive_t *drive,const u8 pio) {struct pci_dev *dev =HWIF (drive)->pci_dev;int reg =0x44 + drive->dn *4 ;
@@ -105,9 +105,9 @@ static void sl82c105_tune_pio(ide_drive_t *drive, const u8 pio) }/* -* Configure the drive and chipset for a new transfer speed. +* Configure the chipset for DMA mode. */ -static int sl82c105_tune_chipset (ide_drive_t *drive,const u8 speed) +static void sl82c105_set_dma_mode (ide_drive_t *drive,const u8 speed) {static u16 mwdma_timings[] = {0x0707 ,0x0201 ,0x0200 };u16 drv_ctrl;
@@ -140,10 +140,8 @@ static int sl82c105_tune_chipset(ide_drive_t *drive, const u8 speed) }break ;default : -return -1 ; +return ; } - -return ide_config_drive_speed (drive, speed); }/*
@@ -306,17 +304,6 @@ static void sl82c105_resetproc(ide_drive_t *drive)pci_read_config_dword (dev,0x40 , &val);pci_set_drvdata (dev, (void *)val); } - -/* -* We only deal with PIO mode here - DMA mode 'using_dma' is not -* initialised at the point that this function is called. -*/ -static void sl82c105_set_pio_mode (ide_drive_t *drive,const u8 pio) -{ -sl82c105_tune_pio (drive, pio); - - (void )ide_config_drive_speed (drive,XFER_PIO_0 + pio); -}/* * Return the revision of the Winbond bridge
@@ -383,7 +370,7 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)DBG (("init_hwif_sl82c105(hwif: ide%d)\n" , hwif->index)); hwif->set_pio_mode = &sl82c105_set_pio_mode; - hwif->speedproc = &sl82c105_tune_chipset; + hwif->set_dma_mode = &sl82c105_set_dma_mode; hwif->selectproc = &sl82c105_selectproc; hwif->resetproc = &sl82c105_resetproc;
drivers/ide/pci/slc90e66.c +5 -13
@@ -42,7 +42,7 @@ static u8 slc90e66_dma_2_pio (u8 xfer_rate) { } } -static void slc90e66_tune_pio (ide_drive_t *drive,u8 pio) +static void slc90e66_set_pio_mode (ide_drive_t *drive,const u8 pio) {ide_hwif_t *hwif =HWIF (drive);struct pci_dev *dev = hwif->pci_dev;
@@ -95,13 +95,7 @@ static void slc90e66_tune_pio (ide_drive_t *drive, u8 pio)spin_unlock_irqrestore (&ide_lock, flags); } -static void slc90e66_set_pio_mode (ide_drive_t *drive,const u8 pio) -{ -slc90e66_tune_pio (drive, pio); - (void )ide_config_drive_speed (drive,XFER_PIO_0 + pio); -} - -static int slc90e66_tune_chipset (ide_drive_t *drive,const u8 speed) +static void slc90e66_set_dma_mode (ide_drive_t *drive,const u8 speed) {ide_hwif_t *hwif =HWIF (drive);struct pci_dev *dev = hwif->pci_dev;
@@ -125,7 +119,7 @@ static int slc90e66_tune_chipset(ide_drive_t *drive, const u8 speed)case XFER_MW_DMA_2 :case XFER_MW_DMA_1 :case XFER_SW_DMA_2 :break ; -default :return -1 ; +default :return ; }if (speed >=XFER_UDMA_0 ) {
@@ -144,9 +138,7 @@ static int slc90e66_tune_chipset(ide_drive_t *drive, const u8 speed)pci_write_config_word (dev,0x4a , reg4a & ~a_speed); } -slc90e66_tune_pio (drive,slc90e66_dma_2_pio (speed)); - -return ide_config_drive_speed (drive, speed); +slc90e66_set_pio_mode (drive,slc90e66_dma_2_pio (speed)); }static int slc90e66_config_drive_xfer_rate (ide_drive_t *drive)
@@ -172,8 +164,8 @@ static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif)if (!hwif->irq) hwif->irq = hwif->channel ?15 :14 ; - hwif->speedproc = &slc90e66_tune_chipset; hwif->set_pio_mode = &slc90e66_set_pio_mode; + hwif->set_dma_mode = &slc90e66_set_dma_mode;pci_read_config_byte (hwif->pci_dev,0x47 , ®47);
drivers/ide/pci/tc86c001.c +4 -5
@@ -13,7 +13,7 @@#include <linux/pci.h> #include <linux/ide.h> -static int tc86c001_tune_chipset (ide_drive_t *drive,const u8 speed) +static void tc86c001_set_mode (ide_drive_t *drive,const u8 speed) {ide_hwif_t *hwif =HWIF (drive);unsigned long scr_port = hwif->config_data + (drive->dn ?0x02 :0x00 );
@@ -39,13 +39,11 @@ static int tc86c001_tune_chipset(ide_drive_t *drive, const u8 speed) scr &= (speed <XFER_MW_DMA_0 ) ?0xf8ff :0xff0f ; scr |= mode;outw (scr, scr_port); - -return ide_config_drive_speed (drive, speed); }static void tc86c001_set_pio_mode (ide_drive_t *drive,const u8 pio) { - (void )tc86c001_tune_chipset (drive,XFER_PIO_0 + pio); +tc86c001_set_mode (drive,XFER_PIO_0 + pio); }/*
@@ -193,7 +191,8 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif) hwif->config_data = sc_base; hwif->set_pio_mode = &tc86c001_set_pio_mode; - hwif->speedproc = &tc86c001_tune_chipset; + hwif->set_dma_mode = &tc86c001_set_mode; + hwif->busproc = &tc86c001_busproc; hwif->drives[0 ].autotune = hwif->drives[1 ].autotune =1 ;
drivers/ide/pci/triflex.c +4 -6
@@ -40,7 +40,7 @@#include <linux/ide.h> #include <linux/init.h> -static int triflex_tune_chipset (ide_drive_t *drive,const u8 speed) +static void triflex_set_mode (ide_drive_t *drive,const u8 speed) {ide_hwif_t *hwif =HWIF (drive);struct pci_dev *dev = hwif->pci_dev;
@@ -82,20 +82,18 @@ static int triflex_tune_chipset(ide_drive_t *drive, const u8 speed) timing =0x0808 ;break ;default : -return -1 ; +return ; } triflex_timings &= ~(0xFFFF << (16 * unit)); triflex_timings |= (timing << (16 * unit));pci_write_config_dword (dev, channel_offset, triflex_timings); - -return (ide_config_drive_speed (drive, speed)); }static void triflex_set_pio_mode (ide_drive_t *drive,const u8 pio) { - (void )triflex_tune_chipset (drive,XFER_PIO_0 + pio); +triflex_set_mode (drive,XFER_PIO_0 + pio); }static int triflex_config_drive_xfer_rate (ide_drive_t *drive)
@@ -111,7 +109,7 @@ static int triflex_config_drive_xfer_rate(ide_drive_t *drive)static void __devinit init_hwif_triflex (ide_hwif_t *hwif) { hwif->set_pio_mode = &triflex_set_pio_mode; - hwif->speedproc = &triflex_tune_chipset; + hwif->set_dma_mode = &triflex_set_mode;if (hwif->dma_base ==0 )return ;
drivers/ide/pci/via82cxxx.c +10 -19
@@ -1,6 +1,6 @@/* * -* Version 3.48 +* Version 3.49 * * VIA IDE driver for Linux. Supported southbridges: *
@@ -153,21 +153,17 @@ static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)* @drive: Drive to set up * @speed: desired speed * -* via_set_drive() computes timing values configures the drive and -* the chipset to a desired transfer mode. It also can be called -* by upper layers. +* via_set_drive() computes timing values configures the chipset to +* a desired transfer mode. It also can be called by upper layers. */ -static int via_set_drive (ide_drive_t *drive,const u8 speed) +static void via_set_drive (ide_drive_t *drive,const u8 speed) {ide_drive_t *peer =HWIF (drive)->drives + (~drive->dn &1 );struct via82cxxx_dev *vdev =pci_get_drvdata (drive->hwif->pci_dev);struct ide_timing t, p;unsigned int T ,UT ; -if (speed !=XFER_PIO_SLOW ) -ide_config_drive_speed (drive, speed); -T =1000000000 / via_clock;switch (vdev->via_config->udma_mask) {
@@ -186,16 +182,10 @@ static int via_set_drive(ide_drive_t *drive, const u8 speed) }via_set_speed (HWIF (drive), drive->dn, &t); - -if (!drive->init_speed) - drive->init_speed = speed; - drive->current_speed = speed; - -return 0 ; }/** -* via_set_pio_mode - PIO setup +* via_set_pio_mode - set host controller for PIO mode * @drive: drive * @pio: PIO mode number *
@@ -456,8 +446,7 @@ static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif) hwif->autodma =0 ; hwif->set_pio_mode = &via_set_pio_mode; - hwif->speedproc = &via_set_drive; - + hwif->set_dma_mode = &via_set_drive;#ifdef CONFIG_PPC_CHRP if (machine_is (chrp) && _chrp_type == _CHRP_Pegasos) {
@@ -500,7 +489,8 @@ static ide_pci_device_t via82cxxx_chipsets[] __devinitdata = { .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, .bootable = ON_BOARD, .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST - | IDE_HFLAG_PIO_NO_DOWNGRADE, + | IDE_HFLAG_PIO_NO_DOWNGRADE + | IDE_HFLAG_POST_SET_MODE, .pio_mask = ATA_PIO5, },{ /* 1 */ .name = "VP_IDE",
@@ -510,7 +500,8 @@ static ide_pci_device_t via82cxxx_chipsets[] __devinitdata = { .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}}, .bootable = ON_BOARD, .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST - | IDE_HFLAG_PIO_NO_DOWNGRADE, + | IDE_HFLAG_PIO_NO_DOWNGRADE + | IDE_HFLAG_POST_SET_MODE, .pio_mask = ATA_PIO5, } };
drivers/ide/ppc/pmac.c +52 -271
497 lines not on this page · raw message
include/linux/ide.h +18 -17
@@ -681,7 +681,7 @@ typedef struct hwif_s {u8 straight8;/* Alan's straight 8 check */ u8 bus_state;/* power state of the IDE bus */ -u8 host_flags; +u16 host_flags;u8 pio_mask;
@@ -702,10 +702,10 @@ typedef struct hwif_s {#if 0 ide_hwif_ops_t *hwifops;#else -/* routine to set PIO mode for drives */ +/* routine to program host for PIO mode */ void (*set_pio_mode)(ide_drive_t *,const u8 ); -/* routine to retune DMA modes for drives */ -int (*speedproc)(ide_drive_t *,const u8 ); +/* routine to program host for DMA mode */ +void (*set_dma_mode)(ide_drive_t *,const u8 );/* tweaks hardware to select drive */ void (*selectproc)(ide_drive_t *);/* chipset polling based on hba specifics */
@@ -1079,16 +1079,7 @@ extern void ide_fix_driveid(struct hd_driveid *);*/ extern void ide_fixstring (u8 *,const int ,const int ); -/* -* This routine busy-waits for the drive status to be not "busy". -* It then checks the status for all of the "good" bits and none -* of the "bad" bits, and if all is okay it returns 0. All other -* cases return 1 after doing "*startstop = ide_error()", and the -* caller should return the updated value of "startstop" in this case. -* "startstop" is unchanged when the function returns 0; -* (startstop, drive, good, bad, timeout) -*/ -extern int ide_wait_stat (ide_startstop_t *,ide_drive_t *,u8 ,u8 ,unsigned long ); +int ide_wait_stat (ide_startstop_t *,ide_drive_t *,u8 ,u8 ,unsigned long );/* * Start a reset operation for an IDE interface.
@@ -1162,7 +1153,6 @@ extern void SELECT_MASK(ide_drive_t *, int);extern void QUIRK_LIST (ide_drive_t *);extern int drive_is_ready (ide_drive_t *); -extern int wait_for_ready (ide_drive_t *,int /* timeout */ );/* * taskfile io for disks for now...and builds request from ide_ioctl
@@ -1262,6 +1252,15 @@ enum {IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 <<5 ),/* use 100-102 and 200-202 PIO values to set DMA modes */ IDE_HFLAG_ABUSE_DMA_MODES = (1 <<6 ), +/* +* keep DMA setting when programming PIO mode, may be used only +* for hosts which have separate PIO and DMA timings (ie. PMAC) +*/ +IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 <<7 ), +/* program host for the transfer mode after programming device */ +IDE_HFLAG_POST_SET_MODE = (1 <<8 ), +/* don't program host/device for the transfer mode ("smart" hosts) */ + IDE_HFLAG_NO_SET_MODE = (1 << 9), }; typedef struct ide_pci_device_s {
@@ -1278,7 +1277,7 @@ typedef struct ide_pci_device_s {u8 bootable;unsigned int extra;struct ide_pci_device_s *next; -u8 host_flags; +u16 host_flags;u8 pio_mask;u8 udma_mask; } ide_pci_device_t;
@@ -1301,7 +1300,6 @@ int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);#ifdef CONFIG_BLK_DEV_IDEDMA int __ide_dma_bad_drive (ide_drive_t *); -int __ide_dma_good_drive (ide_drive_t *);u8 ide_find_dma_mode (ide_drive_t *,u8 );
@@ -1420,6 +1418,9 @@ unsigned int ide_pio_cycle_time(ide_drive_t *, u8);u8 ide_get_best_pio_mode (ide_drive_t *,u8 ,u8 );extern const ide_pio_timings_t ide_pio_timings[6 ]; +int ide_set_pio_mode (ide_drive_t *,u8 ); +int ide_set_dma_mode (ide_drive_t *,u8 ); +void ide_set_pio (ide_drive_t *,u8 );static inline void ide_set_max_pio (ide_drive_t *drive)
Quoted 8 lines · On Sat, 13 Oct 2007 18:25:24 +0200 Bartlomiej Zolnierkiewicz…
Hi,
highlights of this update:
* Rework of IDE PMAC host driver: bugfixes, removal of the code duplicated from the IDE core and conversion to use the generic DMA tuning code path (the rework cuts
ide-pmac.cby ~200 LOC).
Reading the current driver from the git tree I don't see how the PCI driver ever sets the ctl register base. It seems to always be set to zero which means you can't issue SRST and reset sequences ?
Quoted 8 lines · Alan Cox
Quoted 5 lines · On Sat, 13 Oct 2007 18:25:24 +0200 Bartlomiej Zolnierkiewicz…
Hi,
highlights of this update:
Quoted 7 lines
Quoted 3 lines
* Rework of IDE PMAC host driver: bugfixes, removal of the code duplicated from the IDE core and conversion to use the generic DMA tuning code path (the rework cuts
ide-pmac.cby ~200 LOC).Reading the current driver from the git tree I don't see how the PCI driver ever sets the ctl register base. It seems to always be set to zero which means you can't issue SRST and reset sequences ?
Hi Alan,
Comment in pmac_ide_init_hwif_ports() is highly misleading as this function returns early only for "normal" IDE PCI devices (pmac_ide_init_hwif_ports() can be called outside ide-pmac driver through ppc_ide_md).
static int __devinitpmac_ide_pci_attach(struct pci_dev *pdev, const struct pci_device_id *id) {
...
pmif = &pmac_ide[i]; ... pmif->regbase = (unsigned long) base + 0x2000; ... rc = pmac_ide_setup_device(pmif, hwif);
...
}
static intpmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif) {
...
pmac_ide_init_hwif_ports(&hwif->hw, pmif->regbase, 0, &hwif->irq);
...
}
void
pmac_ide_init_hwif_ports(hw_regs_t *hw,
unsigned long data_port, unsigned long ctrl_port, int *irq)
{
...
for (ix = 0; ix < MAX_HWIFS; ++ix)
if (data_port == pmac_ide[ix].regbase)
break;
---> since pmif->regbase was set earlier ix will be < MAX_HWIFS
if (ix >= MAX_HWIFS) {
/* Probably a PCI interface... */
for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; ++i)
hw->io_ports[i] = data_port + i - IDE_DATA_OFFSET;
hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
return;
}
for (i = 0; i < 8; ++i)
hw->io_ports[i] = data_port + i * 0x10;
---> ctl register base will be set here
hw->io_ports[8] = data_port + 0x160;...
}
Bart
Quoted 3 lines
Comment in
pmac_ide_init_hwif_ports()is highly misleading as this function returns early only for "normal" IDE PCI devices (pmac_ide_init_hwif_ports()can be called outside ide-pmac driver throughppc_ide_md).
Follow the code you pasted
Quoted 3 lines
pmif->regbase = (unsigned long) base + 0x2000; ... rc = pmac_ide_setup_device(pmif, hwif);
Ok so regbase is set
Quoted 8 lines
...
}static int
pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif){
...pmac_ide_init_hwif_ports(&hwif->hw, pmif->regbase, 0, &hwif->irq);
Now we pass a honking great zero for the ctrl_port
Quoted 12 lines
...
}void
pmac_ide_init_hwif_ports(hw_regs_t *hw,
unsigned longdata_port, unsigned longctrl_port, int *irq)
{
...for (ix = 0; ix < MAX_HWIFS; ++ix) if (data_port == pmac_ide[ix].regbase) break;
Quoted 7 lines
---> since
pmif->regbasewas set earlier ix will be <MAX_HWIFSif (ix >= MAX_HWIFS) { /* Probably a PCI interface... */ for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; ++i) hw->io_ports[i] = data_port + i - IDE_DATA_OFFSET; hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
Which is zero..
See the problem ?
Alan
Quoted 15 lines · Alan Cox
Quoted 3 lines
Comment in
pmac_ide_init_hwif_ports()is highly misleading as this function returns early only for "normal" IDE PCI devices (pmac_ide_init_hwif_ports()can be called outside ide-pmac driver throughppc_ide_md).Follow the code you pasted
Quoted 3 lines
pmif->regbase = (unsigned long) base + 0x2000; ... rc = pmac_ide_setup_device(pmif, hwif);Ok so regbase is set
Quoted 3 lines
...
}
Quoted 17 lines
Quoted 5 lines
static int
pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif){
...pmac_ide_init_hwif_ports(&hwif->hw, pmif->regbase, 0, &hwif->irq);Now we pass a honking great zero for the
ctrl_portQuoted 10 lines
...
}void
pmac_ide_init_hwif_ports(hw_regs_t *hw,
unsigned longdata_port, unsigned longctrl_port, int *irq)
{
...for (ix = 0; ix < MAX_HWIFS; ++ix)
this loop is a tricky part, regbase is set so we break out early
Quoted 3 lines
Quoted 3 lines
if (data_port == pmac_ide[ix].regbase) break;---> since
pmif->regbasewas set earlier ix will be <MAX_HWIFS
^^^^^^^^^^^^^^^^^^^^^^
Quoted 1 line
Quoted 1 line
if (ix >= MAX_HWIFS) {
^^^^^^^^^^^^^^^
Quoted 9 lines
Quoted 4 lines
/* Probably a PCI interface... */ for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; ++i) hw->io_ports[i] = data_port + i - IDE_DATA_OFFSET; hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;Which is zero..
See the problem ?
Quoted 4 lines
Quoted 4 lines
Quoted 4 lines
/* Probably a PCI interface... */ for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; ++i) hw->io_ports[i] = data_port + i - IDE_DATA_OFFSET; hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
Ok so in actual fact
- The piece of code above can't be executed anyway
- The ctrl_port argument is not needed ?
Alan
Quoted 9 lines · Alan Cox
Quoted 4 lines
Quoted 4 lines
Quoted 4 lines
/* Probably a PCI interface... */ for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; ++i) hw->io_ports[i] = data_port + i - IDE_DATA_OFFSET; hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;Ok so in actual fact
- The piece of code above can't be executed anyway
- Thectrl_portargument is not needed ?
pmac_ide_init_hwif_ports() is also called by ide_init_hwif_ports() through ppc_ide_md.init_hwif.
Bart
Quoted 6 lines · Bartlomiej Zolnierkiewicz
Quoted 5 lines · Alan Cox
Quoted 4 lines
Quoted 4 lines
Quoted 4 lines
/* Probably a PCI interface... */ for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; ++i) hw->io_ports[i] = data_port + i - IDE_DATA_OFFSET; hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;
Quoted 7 lines
Quoted 4 lines
Ok so in actual fact
- The piece of code above can't be executed anyway
- Thectrl_portargument is not needed ?
pmac_ide_init_hwif_ports()is also called byide_init_hwif_ports()through ppc_ide_md.init_hwif.
In which case it should be called with a ctrl_port right ?
Ben.
Proposed addition to icside part, provided that ARM folks ACK it - gets icside to build and AFAICS it's correct:
drivers/ata/pata_icside.c +22 -20
@@ -332,12 +332,13 @@ static void ata_dummy_noret(struct ata_port *port) { } -static void pata_icside_postreset (struct ata_port *ap,unsigned int *classes) +static void pata_icside_postreset (struct ata_link *link,unsigned int *classes) { +struct ata_port *ap = link->ap;struct pata_icside_state *state = ap->host->private_data;if (classes[0 ] !=ATA_DEV_NONE || classes[1 ] !=ATA_DEV_NONE ) -return ata_std_postreset (ap, classes); +return ata_std_postreset (link, classes); state->port[ap->port_no].disabled =1 ;
@@ -395,29 +396,30 @@ static struct ata_port_operations pata_icside_port_ops = {static void __devinit pata_icside_setup_ioaddr (struct ata_port *ap,void __iomem *base, -const struct portinfo *info) +struct pata_icside_info *info, +const struct portinfo *port) {struct ata_ioports *ioaddr = &ap->ioaddr; -void __iomem *cmd = base + info->dataoffset; +void __iomem *cmd = base + port->dataoffset; ioaddr->cmd_addr = cmd; - ioaddr->data_addr = cmd + (ATA_REG_DATA << info->stepping); - ioaddr->error_addr = cmd + (ATA_REG_ERR << info->stepping); - ioaddr->feature_addr = cmd + (ATA_REG_FEATURE << info->stepping); - ioaddr->nsect_addr = cmd + (ATA_REG_NSECT << info->stepping); - ioaddr->lbal_addr = cmd + (ATA_REG_LBAL << info->stepping); - ioaddr->lbam_addr = cmd + (ATA_REG_LBAM << info->stepping); - ioaddr->lbah_addr = cmd + (ATA_REG_LBAH << info->stepping); - ioaddr->device_addr = cmd + (ATA_REG_DEVICE << info->stepping); - ioaddr->status_addr = cmd + (ATA_REG_STATUS << info->stepping); - ioaddr->command_addr = cmd + (ATA_REG_CMD << info->stepping); - - ioaddr->ctl_addr = base + info->ctrloffset; + ioaddr->data_addr = cmd + (ATA_REG_DATA << port->stepping); + ioaddr->error_addr = cmd + (ATA_REG_ERR << port->stepping); + ioaddr->feature_addr = cmd + (ATA_REG_FEATURE << port->stepping); + ioaddr->nsect_addr = cmd + (ATA_REG_NSECT << port->stepping); + ioaddr->lbal_addr = cmd + (ATA_REG_LBAL << port->stepping); + ioaddr->lbam_addr = cmd + (ATA_REG_LBAM << port->stepping); + ioaddr->lbah_addr = cmd + (ATA_REG_LBAH << port->stepping); + ioaddr->device_addr = cmd + (ATA_REG_DEVICE << port->stepping); + ioaddr->status_addr = cmd + (ATA_REG_STATUS << port->stepping); + ioaddr->command_addr = cmd + (ATA_REG_CMD << port->stepping); + + ioaddr->ctl_addr = base + port->ctrloffset; ioaddr->altstatus_addr = ioaddr->ctl_addr;ata_port_desc (ap,"cmd 0x%lx ctl 0x%lx" , - info->raw_base + info->dataoffset, - info->raw_base + info->ctrloffset); + info->raw_base + port->dataoffset, + info->raw_base + port->ctrloffset);if (info->raw_ioc_base)ata_port_desc (ap,"iocbase 0x%lx" , info->raw_ioc_base);
@@ -441,7 +443,7 @@ static int __devinit pata_icside_register_v5(struct pata_icside_info *info) info->nr_ports =1 ; info->port[0 ] = &pata_icside_portinfo_v5; - info->raw_base =ecard_resource_start (ec,ECARD_RES_MEMC ); + info->raw_base =ecard_resource_start (info->ec,ECARD_RES_MEMC );return 0 ; }
@@ -522,7 +524,7 @@ static int __devinit pata_icside_add_ports(struct pata_icside_info *info) ap->flags |=ATA_FLAG_SLAVE_POSS ; ap->ops = &pata_icside_port_ops; -pata_icside_setup_ioaddr (ap, info->base, info->port[i]); +pata_icside_setup_ioaddr (ap, info->base, info, info->port[i]); } return ata_host_activate(host, ec->irq, ata_interrupt, 0,
Quoted 10 lines · Benjamin Herrenschmidt
Quoted 8 lines · Bartlomiej Zolnierkiewicz
Quoted 7 lines · Alan Cox
Quoted 4 lines
Quoted 4 lines
Quoted 4 lines
/* Probably a PCI interface... */ for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; ++i) hw->io_ports[i] = data_port + i - IDE_DATA_OFFSET; hw->io_ports[IDE_CONTROL_OFFSET] = ctrl_port;Ok so in actual fact
Quoted 7 lines
Quoted 5 lines
Quoted 2 lines
- The piece of code above can't be executed anyway
- Thectrl_portargument is not needed ?
pmac_ide_init_hwif_ports()is also called byide_init_hwif_ports()through ppc_ide_md.init_hwif.In which case it should be called with a
ctrl_portright ?
Yep.
How's about this patch?
[PATCH] ide-pmac: fix pmac_ide_init_hwif_ports()
* pmac_ide_init_hwif_ports() can be called by ide_init_hwif_ports() (through ppc_ide_md.ide_init_hwif hook) for non IDE PMAC interfaces. If this is the case the hw->io_ports[] should be already setup by ide_init_hwif_ports()->ide_std_init_ports() so remove redundant code from pmac_ide_init_hwif_ports().
As side-effect this change fixes ctl_addr == 0 special handling in ide_init_hwif_ports().
* Fix misleading comment while at it.
Cc Benjamin Herrenschmidt <[email protected]>
Cc Alan Cox <[email protected]>
Signed-off-by Bartlomiej Zolnierkiewicz <[email protected]>
--- drivers/ide/ppc/pmac.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-)
drivers/ide/ppc/pmac.c +2 -7
@@ -438,13 +438,8 @@ pmac_ide_init_hwif_ports(hw_regs_t *hw,if (data_port == pmac_ide[ix].regbase)break ; -if (ix >=MAX_HWIFS ) { -/* Probably a PCI interface... */ -for (i =IDE_DATA_OFFSET ; i <=IDE_STATUS_OFFSET ; ++i) - hw->io_ports[i] = data_port + i -IDE_DATA_OFFSET ; - hw->io_ports[IDE_CONTROL_OFFSET ] = ctrl_port; -return ; - } +if (ix >=MAX_HWIFS ) +return ;/* not an IDE PMAC interface */ for (i =0 ; i <8 ; ++i) hw->io_ports[i] = data_port + i *0x10 ;
Quoted 2 lines · Al Viro
Proposed addition to icside part, provided that ARM folks ACK it - gets icside to build and AFAICS it's correct:
the patch looks good and gets my ACK but it is for Jeff ;)
Quoted 86 lines
drivers/ata/pata_icside.c +22
-20@@ -332,12 +332,13 @@ static void ata_dummy_noret(struct ata_port *port) { } -static void pata_icside_postreset (struct ata_port *ap,unsigned int *classes) +static void pata_icside_postreset (struct ata_link *link,unsigned int *classes) { +struct ata_port *ap = link->ap;struct pata_icside_state *state = ap->host->private_data;if (classes[0 ] !=ATA_DEV_NONE || classes[1 ] !=ATA_DEV_NONE ) -return ata_std_postreset (ap, classes); +return ata_std_postreset (link, classes); state->port[ap->port_no].disabled =1 ;@@ -395,29 +396,30 @@ static struct ata_port_operations pata_icside_port_ops = {static void __devinit pata_icside_setup_ioaddr (struct ata_port *ap,void __iomem *base, -const struct portinfo *info) +struct pata_icside_info *info, +const struct portinfo *port) {struct ata_ioports *ioaddr = &ap->ioaddr; -void __iomem *cmd = base + info->dataoffset; +void __iomem *cmd = base + port->dataoffset; ioaddr->cmd_addr = cmd; - ioaddr->data_addr = cmd + (ATA_REG_DATA << info->stepping); - ioaddr->error_addr = cmd + (ATA_REG_ERR << info->stepping); - ioaddr->feature_addr = cmd + (ATA_REG_FEATURE << info->stepping); - ioaddr->nsect_addr = cmd + (ATA_REG_NSECT << info->stepping); - ioaddr->lbal_addr = cmd + (ATA_REG_LBAL << info->stepping); - ioaddr->lbam_addr = cmd + (ATA_REG_LBAM << info->stepping); - ioaddr->lbah_addr = cmd + (ATA_REG_LBAH << info->stepping); - ioaddr->device_addr = cmd + (ATA_REG_DEVICE << info->stepping); - ioaddr->status_addr = cmd + (ATA_REG_STATUS << info->stepping); - ioaddr->command_addr = cmd + (ATA_REG_CMD << info->stepping); - - ioaddr->ctl_addr = base + info->ctrloffset; + ioaddr->data_addr = cmd + (ATA_REG_DATA << port->stepping); + ioaddr->error_addr = cmd + (ATA_REG_ERR << port->stepping); + ioaddr->feature_addr = cmd + (ATA_REG_FEATURE << port->stepping); + ioaddr->nsect_addr = cmd + (ATA_REG_NSECT << port->stepping); + ioaddr->lbal_addr = cmd + (ATA_REG_LBAL << port->stepping); + ioaddr->lbam_addr = cmd + (ATA_REG_LBAM << port->stepping); + ioaddr->lbah_addr = cmd + (ATA_REG_LBAH << port->stepping); + ioaddr->device_addr = cmd + (ATA_REG_DEVICE << port->stepping); + ioaddr->status_addr = cmd + (ATA_REG_STATUS << port->stepping); + ioaddr->command_addr = cmd + (ATA_REG_CMD << port->stepping); + + ioaddr->ctl_addr = base + port->ctrloffset; ioaddr->altstatus_addr = ioaddr->ctl_addr;ata_port_desc (ap,"cmd 0x%lx ctl 0x%lx" , - info->raw_base + info->dataoffset, - info->raw_base + info->ctrloffset); + info->raw_base + port->dataoffset, + info->raw_base + port->ctrloffset);if (info->raw_ioc_base)ata_port_desc (ap,"iocbase 0x%lx" , info->raw_ioc_base);@@ -441,7 +443,7 @@ static int __devinit pata_icside_register_v5(struct pata_icside_info *info) info->nr_ports =1 ; info->port[0 ] = &pata_icside_portinfo_v5; - info->raw_base =ecard_resource_start (ec,ECARD_RES_MEMC ); + info->raw_base =ecard_resource_start (info->ec,ECARD_RES_MEMC );return 0 ; }@@ -522,7 +524,7 @@ static int __devinit pata_icside_add_ports(struct pata_icside_info *info) ap->flags |=ATA_FLAG_SLAVE_POSS ; ap->ops = &pata_icside_port_ops; -pata_icside_setup_ioaddr (ap, info->base, info->port[i]); +pata_icside_setup_ioaddr (ap, info->base, info, info->port[i]); } return ata_host_activate(host, ec->irq, ata_interrupt, 0,
Quoted 11 lines
How's about this patch?
[PATCH] ide-pmac: fix
pmac_ide_init_hwif_ports()*
pmac_ide_init_hwif_ports()can be called byide_init_hwif_ports()(through ppc_ide_md.ide_init_hwif hook) for non IDE PMAC interfaces. If this is the case the hw->io_ports[] should be already setup by ide_init_hwif_ports()->ide_std_init_ports() so remove redundant code frompmac_ide_init_hwif_ports().
Quoted 4 lines
As side-effect this change fixes
ctl_addr== 0 special handling inide_init_hwif_ports().* Fix misleading comment while at it.
I would have to try it. Problem is, I don't actually have any powermac with a PCI IDE controller at hand.. ouch. I'll see what I can find.
Ben.
Quoted 2 lines · Al Viro
Proposed addition to icside part, provided that ARM folks ACK it - gets icside to build and AFAICS it's correct:
ACK from me too... ARM folks?
Quoted 5 lines · Jeff Garzik
Quoted 2 lines · Al Viro
Proposed addition to icside part, provided that ARM folks ACK it - gets icside to build and AFAICS it's correct:
ACK from me too... ARM folks?
Will test tomorrow/Wednesday.
Signature · 3 lines
Russell King Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/ maintainer of:
Quoted 7 lines · Russell King
Quoted 4 lines · Jeff Garzik
Quoted 2 lines · Al Viro
Proposed addition to icside part, provided that ARM folks ACK it - gets icside to build and AFAICS it's correct:
ACK from me too... ARM folks?
Will test tomorrow/Wednesday.
Thanks. Sorry about missing your CC on the libata-wide ata_link changes. We should have poked the maintainers on that, for the drivers we cannot build ourselves.
Quoted 2 lines · Al Viro
Proposed addition to icside part, provided that ARM folks ACK it - gets icside to build and AFAICS it's correct:
Booted and tested as working.
Whatever-tag-that-is: Russell King <[email protected]>
Quoted 85 lines
drivers/ata/pata_icside.c +22
-20@@ -332,12 +332,13 @@ static void ata_dummy_noret(struct ata_port *port) { } -static void pata_icside_postreset (struct ata_port *ap,unsigned int *classes) +static void pata_icside_postreset (struct ata_link *link,unsigned int *classes) { +struct ata_port *ap = link->ap;struct pata_icside_state *state = ap->host->private_data;if (classes[0 ] !=ATA_DEV_NONE || classes[1 ] !=ATA_DEV_NONE ) -return ata_std_postreset (ap, classes); +return ata_std_postreset (link, classes); state->port[ap->port_no].disabled =1 ;@@ -395,29 +396,30 @@ static struct ata_port_operations pata_icside_port_ops = {static void __devinit pata_icside_setup_ioaddr (struct ata_port *ap,void __iomem *base, -const struct portinfo *info) +struct pata_icside_info *info, +const struct portinfo *port) {struct ata_ioports *ioaddr = &ap->ioaddr; -void __iomem *cmd = base + info->dataoffset; +void __iomem *cmd = base + port->dataoffset; ioaddr->cmd_addr = cmd; - ioaddr->data_addr = cmd + (ATA_REG_DATA << info->stepping); - ioaddr->error_addr = cmd + (ATA_REG_ERR << info->stepping); - ioaddr->feature_addr = cmd + (ATA_REG_FEATURE << info->stepping); - ioaddr->nsect_addr = cmd + (ATA_REG_NSECT << info->stepping); - ioaddr->lbal_addr = cmd + (ATA_REG_LBAL << info->stepping); - ioaddr->lbam_addr = cmd + (ATA_REG_LBAM << info->stepping); - ioaddr->lbah_addr = cmd + (ATA_REG_LBAH << info->stepping); - ioaddr->device_addr = cmd + (ATA_REG_DEVICE << info->stepping); - ioaddr->status_addr = cmd + (ATA_REG_STATUS << info->stepping); - ioaddr->command_addr = cmd + (ATA_REG_CMD << info->stepping); - - ioaddr->ctl_addr = base + info->ctrloffset; + ioaddr->data_addr = cmd + (ATA_REG_DATA << port->stepping); + ioaddr->error_addr = cmd + (ATA_REG_ERR << port->stepping); + ioaddr->feature_addr = cmd + (ATA_REG_FEATURE << port->stepping); + ioaddr->nsect_addr = cmd + (ATA_REG_NSECT << port->stepping); + ioaddr->lbal_addr = cmd + (ATA_REG_LBAL << port->stepping); + ioaddr->lbam_addr = cmd + (ATA_REG_LBAM << port->stepping); + ioaddr->lbah_addr = cmd + (ATA_REG_LBAH << port->stepping); + ioaddr->device_addr = cmd + (ATA_REG_DEVICE << port->stepping); + ioaddr->status_addr = cmd + (ATA_REG_STATUS << port->stepping); + ioaddr->command_addr = cmd + (ATA_REG_CMD << port->stepping); + + ioaddr->ctl_addr = base + port->ctrloffset; ioaddr->altstatus_addr = ioaddr->ctl_addr;ata_port_desc (ap,"cmd 0x%lx ctl 0x%lx" , - info->raw_base + info->dataoffset, - info->raw_base + info->ctrloffset); + info->raw_base + port->dataoffset, + info->raw_base + port->ctrloffset);if (info->raw_ioc_base)ata_port_desc (ap,"iocbase 0x%lx" , info->raw_ioc_base);@@ -441,7 +443,7 @@ static int __devinit pata_icside_register_v5(struct pata_icside_info *info) info->nr_ports =1 ; info->port[0 ] = &pata_icside_portinfo_v5; - info->raw_base =ecard_resource_start (ec,ECARD_RES_MEMC ); + info->raw_base =ecard_resource_start (info->ec,ECARD_RES_MEMC );return 0 ; }@@ -522,7 +524,7 @@ static int __devinit pata_icside_add_ports(struct pata_icside_info *info) ap->flags |=ATA_FLAG_SLAVE_POSS ; ap->ops = &pata_icside_port_ops; -pata_icside_setup_ioaddr (ap, info->base, info->port[i]); +pata_icside_setup_ioaddr (ap, info->base, info, info->port[i]); } return ata_host_activate(host, ec->irq, ata_interrupt, 0,
Signature · 3 lines
Russell King Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/ maintainer of:
Quoted 11 lines · Benjamin Herrenschmidt
Quoted 11 lines
How's about this patch?
[PATCH] ide-pmac: fix
pmac_ide_init_hwif_ports()*
pmac_ide_init_hwif_ports()can be called byide_init_hwif_ports()(through ppc_ide_md.ide_init_hwif hook) for non IDE PMAC interfaces. If this is the case the hw->io_ports[] should be already setup by ide_init_hwif_ports()->ide_std_init_ports() so remove redundant code frompmac_ide_init_hwif_ports().
Quoted 7 lines
Quoted 4 lines
As side-effect this change fixes
ctl_addr== 0 special handling inide_init_hwif_ports().* Fix misleading comment while at it.
I would have to try it. Problem is, I don't actually have any powermac with a PCI IDE controller at hand.. ouch. I'll see what I can find.
Same problem here, would be great if somebody with PMAC could test this patch (should apply cleanly to Linus' tree).
Well, since the change is pretty safe I'm adding the patch to IDE tree (so it hopefully gets tested through -mm).
Thanks,
Bart
Quoted 5 lines · Jeff Garzik
Quoted 4 lines · Russell King
Quoted 3 lines · Jeff Garzik
Quoted 2 lines · Al Viro
Proposed addition to icside part, provided that ARM folks ACK it - gets icside to build and AFAICS it's correct:
Quoted 7 lines
Quoted 3 lines
Quoted 1 line
ACK from me too... ARM folks?
Will test tomorrow/Wednesday.
Thanks. Sorry about missing your CC on the libata-wide
ata_linkchanges. We should have poked the maintainers on that, for the drivers we cannot build ourselves.
I think Viro's patch got an ack from everyone. Who's dealing with getting this regression fix into mainline? It seems at the moment the patch is in limbo.
Signature · 3 lines
Russell King Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/ maintainer of:
Quoted 6 lines · Russell King
Quoted 5 lines · Jeff Garzik
Quoted 4 lines · Russell King
Quoted 3 lines · Jeff Garzik
Quoted 2 lines · Al Viro
Proposed addition to icside part, provided that ARM folks ACK it - gets icside to build and AFAICS it's correct:
Quoted 7 lines
Quoted 3 lines
Quoted 2 lines
Quoted 1 line
ACK from me too... ARM folks?
Will test tomorrow/Wednesday.
Thanks. Sorry about missing your CC on the libata-wide
ata_linkchanges. We should have poked the maintainers on that, for the drivers we cannot build ourselves.I think Viro's patch got an ack from everyone. Who's dealing with getting this regression fix into mainline? It seems at the moment the patch is in limbo.
I was waiting on you, who last said "Will test tomorrow/Wednesday" (with presumably an ACK forthcoming after test results)
If it now has your ACK, it's ready and waiting in my mbox queue to be merged upstream.
Jeff
Quoted 17 lines · Jeff Garzik
Quoted 7 lines · Russell King
Quoted 6 lines · Jeff Garzik
Quoted 5 lines · Russell King
Quoted 4 lines · Jeff Garzik
Quoted 2 lines · Al Viro
Proposed addition to icside part, provided that ARM folks ACK it - gets icside to build and AFAICS it's correct:
ACK from me too... ARM folks?
Quoted 8 lines
Quoted 4 lines
Quoted 1 line
Will test tomorrow/Wednesday.
Thanks. Sorry about missing your CC on the libata-wide
ata_linkchanges. We should have poked the maintainers on that, for the drivers we cannot build ourselves.I think Viro's patch got an ack from everyone. Who's dealing with getting this regression fix into mainline? It seems at the moment the patch is in limbo.
Quoted 5 lines
I was waiting on you, who last said "Will test tomorrow/Wednesday" (with presumably an ACK forthcoming after test results)
If it now has your ACK, it's ready and waiting in my mbox queue to be merged upstream.
Looks like it got my ack more than a week ago:
| Date: Tue, 16 Oct 2007 16:55:07 +0100 | From: Russell King <[email protected]> | To: Al Viro <[email protected]> | Cc: Bartlomiej Zolnierkiewicz <[email protected]>, | Linus Torvalds <[email protected]>, | [email protected], [email protected] | Subject: Re: [git patches] IDE updates (part 2) | | On Sun, Oct 14, 2007 at 01:12:39AM +0100, Al Viro wrote: | > Proposed addition to icside part, provided that ARM folks ACK it - gets | > icside to build and AFAICS it's correct: | | Booted and tested as working. | | Whatever-tag-that-is: Russell King <[email protected]>
which I gave to the _initial_ message asking for my ack. And no, before you whinge and moan, I didn't drop any CC's.
Signature · 3 lines
Russell King Linux kernel 2.6 ARM Linux - http://www.arm.linux.org.uk/ maintainer of:
Quoted 11 lines · Russell King
Quoted 10 lines · Jeff Garzik
Quoted 9 lines · Russell King
Quoted 8 lines · Jeff Garzik
Quoted 6 lines · Russell King
Quoted 4 lines · Jeff Garzik
Quoted 2 lines · Al Viro
Proposed addition to icside part, provided that ARM folks ACK it - gets icside to build and AFAICS it's correct:
ACK from me too... ARM folks?
Will test tomorrow/Wednesday.
Thanks. Sorry about missing your CC on the libata-wide
ata_linkchanges. We should have poked the maintainers on that, for the drivers we cannot build ourselves.
Quoted 8 lines
Quoted 6 lines
Quoted 3 lines
I think Viro's patch got an ack from everyone. Who's dealing with getting this regression fix into mainline? It seems at the moment the patch is in limbo.
I was waiting on you, who last said "Will test tomorrow/Wednesday" (with presumably an ACK forthcoming after test results)
If it now has your ACK, it's ready and waiting in my mbox queue to be merged upstream.
Looks like it got my ack more than a week ago:
Groovy.
Jeff
Jeff Garzik
Applieddrivers/ata/pata_icside.c static void ata_dummy_noret(struct ata_port *port)
Quoted 8 lines · Al Viro
Proposed addition to icside part, provided that ARM folks ACK it - gets icside to build and AFAICS it's correct:
drivers/ata/pata_icside.c +0
-0@@ -332,12 +332,13 @@ static void ata_dummy_noret(struct ata_port *port)
applied