ARM: OMAP: fix default sys_ck.rate for boot-time DPLL detection
PATCH 1/1 ARM: OMAP: fix default sys_ck.rate for boot-time DPLL detection
In the clock init code, the DPLL value set by the bootloader is queried, but always turns zero due it's parent clock (sys_ck) having no default rate. This results in the improper setting of the default PRCM rate-table entry and any queries of virt_prcm_set rate to return 0.
Following the example of the TI kernel, set the default sys_ck rate to 13MHz. Could then be overridden in board setup code.
--- arch/arm/mach-omap2/clock24xx.h | 1 + 1 file changed, 1 insertion(+)
arch/arm/mach-omap2/clock24xx.h +1 -0
@@ -581,6 +581,7 @@ static struct clk osc_ck = { /* (*12, */* With out modem likely 12MHz, with modem likely 13MHz */ static struct clk sys_ck = {/* (*12, *13, 19.2, 26, 38.4)MHz */ .name ="sys_ck" ,/* ~ ref_clk also */ + .rate =13000000 , .parent = &osc_ck, .flags =CLOCK_IN_OMAP242X |CLOCK_IN_OMAP243X |ALWAYS_ENABLED |RATE_PROPAGATES ,
--
Tony Lindgren
maintainerQuoted 19 lines · Kevin Hilman
In the clock init code, the DPLL value set by the bootloader is queried, but always turns zero due it's parent clock (
sys_ck) having no default rate. This results in the improper setting of the default PRCM rate-table entry and any queries ofvirt_prcm_setrate to return 0.Following the example of the TI kernel, set the default
sys_ckrate to 13MHz. Could then be overridden in board setup code.Signed-off-by Kevin Hilman <[email protected]>--- arch/arm/mach-omap2/clock24xx.h | 1 + 1 file changed, 1 insertion(+)Index:
dev/arch/arm/mach-omap2/clock24xx.h
===================================================================
arch/arm/mach-omap2/clock24xx.h static struct clk osc_ck = { /* (*12, * · line 587
Quoted 7 lines
arch/arm/mach-omap2/clock24xx.h +1
-0@@ -581,6 +581,7 @@ static struct clk osc_ck = { /* (*12, */* With out modem likely 12MHz, with modem likely 13MHz */ static struct clk sys_ck = {/* (*12, *13, 19.2, 26, 38.4)MHz */ .name ="sys_ck" ,/* ~ ref_clk also */ + .rate =13000000 , .parent = &osc_ck, .flags =CLOCK_IN_OMAP242X |CLOCK_IN_OMAP243X |ALWAYS_ENABLED |RATE_PROPAGATES ,
Pushing today.
Tony
Hi Kevin,
Quoted 7 lines · ext Kevin Hilman
In the clock init code, the DPLL value set by the bootloader is queried, but always turns zero due it's parent clock (
sys_ck) having no default rate. This results in the improper setting of the default PRCM rate-table entry and any queries ofvirt_prcm_setrate to return 0.Following the example of the TI kernel, set the default
sys_ckrate to 13MHz. Could then be overridden in board setup code.
There should be an even cleaner way to handle that (but i have no code to prove that it works =) since the boot rom already does auto-detection of the oscillator to support serial flashing.
If it is possible to read the detected value then the code can be moved to arch or even plat.
Signature · 4 lines
Cheers, Igor Igor Stoppa <[email protected]> (Nokia Multimedia - CP - OSSO / Helsinki, Finland)
RE: [PATCH] ARM: OMAP: fix default sys_ck.rate for boot-time DPLLdetection
The TI code does this with init_osc_sys_clk_rates() function. The preset bit in structure likely isn't needed.
The APLLS field which is setup by the bootloader is used to know osc and sys clk's rates.
A little while back Paul had patched some of this and the initial go did result in a bad value for this. After this was pointed out a subsequent patch was pushed to fix this. Perhaps yet another patch broke this or perhaps the version you are using was missing this update.
Regards
Richard W.
Quoted 6 lines
Hi Kevin,
Quoted 3 lines · ext Kevin Hilman
In the clock init code, the DPLL value set by the bootloader is queried, but always turns zero due it's parent clock (
sys_ck) having no default rate. This results in the improper setting of the
default
Quoted 1 line
Quoted 1 line
PRCM rate-table entry and any queries of
virt_prcm_setrate to
return 0.
Quoted 2 lines
Quoted 2 lines
Following the example of the TI kernel, set the default
sys_ckrate
to
Quoted 4 lines
Quoted 1 line
13MHz. Could then be overridden in board setup code.
There should be an even cleaner way to handle that (but i have no code to prove that it works =) since the boot rom already does
auto-detection
Quoted 3 lines
of the oscillator to support serial flashing.
If it is possible to read the detected value then the code can be
moved
Quoted 11 lines
to arch or even plat.
--
Cheers, IgorIgor Stoppa <[email protected]>
(Nokia Multimedia - CP - OSSO / Helsinki, Finland)
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Re: [PATCH] ARM: OMAP: fix default sys_ck.rate for boot-time DPLLdetection
Quoted 10 lines · Richard
The TI code does this with
init_osc_sys_clk_rates()function. The preset bit in structure likely isn't needed.The APLLS field which is setup by the bootloader is used to know osc and sys clk's rates.
A little while back Paul had patched some of this and the initial go did result in a bad value for this. After this was pointed out a subsequent patch was pushed to fix this. Perhaps yet another patch broke this or perhaps the version you are using was missing this update.
I was working from the head of OMAP git, and it was broken there.
It looks like the git tree has the equivalent funtion to the one you mentioned from the TI tree (see omap2_osc_clk_recalc), but it doesn't work for sys_ck. The osc_ck is correctly being set, but it's not propagating to sys_ck because it uses propagate_rate() which doesn't work since none of the clocks are registered yet.
The simple fix I tried was to move the osc_clk_recalc() after all the clk_registers, but then it no longer boots (didn't investigate too deeply.)
The easier fix is to simply add omap2_sys_clk_recalc() as in the following patch (which also reverts my previous patch.) If that seems reasonable, I'll submit it.
Kevin
arch/arm/mach-omap2/clock24xx.c +1 -0
@@ -475,6 +475,7 @@ int __init omap2_clk_init(void)clk_init (&omap2_clk_functions);omap2_osc_clk_recalc (&osc_ck); +omap2_sys_clk_recalc (&sys_ck); for (clkp = onchip_24xx_clks; clkp < onchip_24xx_clks + ARRAY_SIZE(onchip_24xx_clks);
arch/arm/mach-omap2/clock24xx.h +0 -1
@@ -581,7 +581,6 @@ static struct clk osc_ck = { /* (*12, */* With out modem likely 12MHz, with modem likely 13MHz */ static struct clk sys_ck = {/* (*12, *13, 19.2, 26, 38.4)MHz */ .name ="sys_ck" ,/* ~ ref_clk also */ - .rate =13000000 , .parent = &osc_ck, .flags =CLOCK_IN_OMAP242X |CLOCK_IN_OMAP243X |ALWAYS_ENABLED |RATE_PROPAGATES ,
Paul Walmsley
maintainerRe: [PATCH] ARM: OMAP: fix default sys_ck.rate for boot-time DPLLdetection
Quoted 3 lines · Kevin Hilman
The easier fix is to simply add
omap2_sys_clk_recalc()as in the following patch (which also reverts my previous patch.) If that seems reasonable, I'll submit it.
I would prefer this second patch; it allows sys_ck to be calculated dynamically based on osc_ck.
- Paul