Skip to contentSkip to conversation

resubmit PPC4xx: Minimal changes to add vxWorks support

PATCH New Niklaus Giger 2 participants 2 messages Nov 30, 2007

lore
Share & tools
lore
#0 lore raw

PATCH 1/1 resubmit PPC4xx: Minimal changes to add vxWorks support

---
 cpu/ppc4xx/start.S |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)
cpu/ppc4xx/start.S +5 -1
index 9626b65..97be4eb 100644
@@ -1432,7 +1432,11 @@ relocate_code:
 	dccci	0,0			/* Invalidate data cache, now no longer our stack */
 	sync
 	isync
-	addi	r1,r0,0x0000		/* TLB entry #0 */
+#ifdef CFG_TLB_FOR_BOOT_FLASH
+	addi	r1,r0,CFG_TLB_FOR_BOOT_FLASH	/* Use defined TLB */
+#else
+	addi	r1,r0,0x0000		/* Default TLB entry is #0 */
+#endif
 	tlbre	r0,r1,0x0002		/* Read contents */
 	ori	r0,r0,0x0c00		/* Or in the inhibit, write through bit */
 	tlbwe	r0,r1,0x0002		/* Save it out */
Signature · 1 line
1.5.2
#1 lore raw

PATCH 1/1 resubmit PPC4xx: Minimal changes to add vxWorks support

Quoted 12 lines · Niklaus Giger
---
 cpu/ppc4xx/start.S |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)
cpu/ppc4xx/start.S +0 -0
index 9626b65..97be4eb 100644
@@ -1432,7 +1432,11 @@ relocate_code:
 	dccci	0,0			/* Invalidate data cache, now no longer our stack */
 	sync

cpu/ppc4xx/start.S relocate_code: · line 1442

Quoted 10 lines
cpu/ppc4xx/start.S +5 -1
 	isync
-	addi	r1,r0,0x0000		/* TLB entry #0 */
+#ifdef CFG_TLB_FOR_BOOT_FLASH
+	addi	r1,r0,CFG_TLB_FOR_BOOT_FLASH	/* Use defined TLB */
+#else
+	addi	r1,r0,0x0000		/* Default TLB entry is #0 */
+#endif
 	tlbre	r0,r1,0x0002		/* Read contents */
 	ori	r0,r0,0x0c00		/* Or in the inhibit, write through bit */
 	tlbwe	r0,r1,0x0002		/* Save it out */

Ahh. There you go. Ok, added to my list.

Thanks.

Viele Gr??e,
Stefan

=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office at denx.de
=====================================================================