: AR7 final
Subsystems (6)
cover : AR7 final
I hope this is the last try
Works flawlessy with vanilla 2.6.24
PATCH 2/6 : AR7 mtd partition map
drivers/mtd/Kconfig +6 -0
@@ -158,6 +158,12 @@ config MTD_OF_PARTS the partition map from the children of the flash node, as described in Documentation/powerpc/booting-without-of.txt. +config MTD_AR7_PARTS + tristate "TI AR7 partitioning support" + depends on MTD_PARTITIONS + ---help--- + TI AR7 partitioning support + comment "User Modules And Translation Layers" config MTD_CHAR
drivers/mtd/Makefile +1 -0
@@ -11,6 +11,7 @@ obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o obj-$(CONFIG_MTD_AFS_PARTS) += afs.o +obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o # 'Users' - code which presents functionality to userspace.
drivers/mtd/ar7part.c new file +146 -0
146 lines not on this page · raw message
PATCH 3/6 : AR7: VLYNQ bus
In reply to Matteo Crocedrivers/vlynq/Kconfig new file +13 -0
@@ -0,0 +1,13 @@ +menu "TI VLYNQ" + +config VLYNQ + bool "TI VLYNQ bus support" + depends on AR7 && EXPERIMENTAL + help + Support for the TI VLYNQ bus + + The module will be called vlynq + + If unsure, say N + +endmenu
drivers/vlynq/Makefile new file +5 -0
@@ -0,0 +1,5 @@ +# +# Makefile for kernel vlynq drivers +# + +obj-$(CONFIG_VLYNQ) += vlynq.o
drivers/vlynq/vlynq.c new file +670 -0
670 lines not on this page · raw message
include/linux/vlynq.h new file +161 -0
161 lines not on this page · raw message
PATCH 4/6 : AR7 gpio
In reply to Matteo Crocedrivers/char/Kconfig +9 -0
@@ -913,6 +913,15 @@ config MWAVE To compile this driver as a module, choose M here: the module will be called mwave. +config AR7_GPIO + tristate "TI AR7 GPIO Support" + depends on AR7 + help + Give userspace access to the GPIO pins on the Texas Instruments AR7 + processors. + + If compiled as a module, it will be called ar7_gpio. + config SCx200_GPIO tristate "NatSemi SCx200 GPIO Support" depends on SCx200
drivers/char/Makefile +1 -0
@@ -90,6 +90,7 @@ obj-$(CONFIG_COBALT_LCD) += lcd.o obj-$(CONFIG_PPDEV) += ppdev.o obj-$(CONFIG_NWBUTTON) += nwbutton.o obj-$(CONFIG_NWFLASH) += nwflash.o +obj-$(CONFIG_AR7_GPIO) += ar7_gpio.o obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o
drivers/char/ar7_gpio.c new file +158 -0
158 lines not on this page · raw message
PATCH 5/6 : AR7: serial hack
In reply to Matteo CroceUgly but we need it
drivers/serial/8250.c +11 -0
@@ -267,6 +267,13 @@ static const struct serial8250_config uart_config[] = { .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, .flags = UART_CAP_FIFO, }, + [PORT_AR7] = { + .name = "TI-AR7", + .fifo_size = 16, + .tx_loadsz = 16, + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00, + .flags = UART_CAP_FIFO | UART_CAP_AFE, + }, };#if defined (CONFIG_SERIAL_8250_AU1X00 )
@@ -2455,7 +2462,11 @@ static void serial8250_console_putchar(struct uart_port *port, int ch) {struct uart_8250_port *up = (struct uart_8250_port *)port; +#ifdef CONFIG_AR7 +wait_for_xmitr (up,BOTH_EMPTY ); +#else wait_for_xmitr (up,UART_LSR_THRE ); +#endif serial_out (up,UART_TX , ch); }
include/linux/serialP.h +4 -0
@@ -135,6 +135,10 @@ struct rs_multiport_struct {* the interrupt line _up_ instead of down, so if we register the IRQ * while the UART is in that state, we die in an IRQ storm. */ #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2) +#elif defined(CONFIG_AR7 ) +/* This is how it is set up by bootloader... */ +#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1 \ + | UART_MCR_RTS | UART_MCR_DTR)#else #define ALPHA_KLUDGE_MCR 0#endif
include/linux/serial_core.h +1 -0
@@ -40,6 +40,7 @@#define PORT_NS16550A 14#define PORT_XSCALE 15#define PORT_RM9000 16/* PMC-Sierra RM9xxx internal UART */ +#define PORT_AR7 16#define PORT_MAX_8250 16/* max port ID */ /*
PATCH 6/6 : AR7 leds
In reply to Matteo Crocedrivers/net/cpmac.c +3 -16
@@ -1006,23 +1006,10 @@ static int __devinit cpmac_probe(struct platform_device *pdev)if (phy_id ==PHY_MAX_ADDR ) {if (external_switch || dumb_switch) { -struct fixed_phy_status status = {}; - - mdio_bus_id =0 ; - -/* -* FIXME: this should be in the platform code! -* Since there is not platform code at all (that is, -* no mainline users of that driver), place it here -* for now. -*/ - phy_id =0 ; - status.link =1 ; - status.duplex =1 ; - status.speed =100 ; -fixed_phy_add (PHY_POLL , phy_id, &status); + mdio_bus_id =0 ;/* fixed phys bus */ + phy_id = pdev->id; }else { -printk (KERN_ERR "cpmac: no PHY present\n" ); +dev_err (&pdev->dev,"no PHY present\n" );return -ENODEV ; } }
Thomas Bogendoerfer
maintainerRe: [PATCH][MIPS][5/6]: AR7: serial hack
In reply to Matteo CroceQuoted 1 line · Matteo Croce
Ugly but we need it
why ? I'm running AR7 uarts just like all other 16550.
drivers/serial/8250.c static void serial8250_console_putchar(struct uart_port *port, int ch) · line 2471
Quoted 12 lines
#if defined (
CONFIG_SERIAL_8250_AU1X00)drivers/serial/8250.c +4
-0@@ -2455,7 +2462,11 @@ static void serial8250_console_putchar(struct uart_port *port, int ch) {struct uart_8250_port *up = (struct uart_8250_port *)port; +#ifdef CONFIG_AR7 +wait_for_xmitr (up,BOTH_EMPTY ); +#else wait_for_xmitr (up,UART_LSR_THRE ); +#endif serial_out (up,UART_TX , ch); }
this doesn't make sense. Why don't you check for the port type and decide, if you need to use the AR7 way or the normal way. This will for example break 16550 uarts connected via PCI on UR8 devices.
include/linux/serial_core.h line 43
Quoted 9 lines
include/linux/serial_core.h +1
-0@@ -40,6 +40,7 @@#define PORT_NS16550A 14#define PORT_XSCALE 15#define PORT_RM9000 16/* PMC-Sierra RM9xxx internal UART */ +#define PORT_AR7 16
this doesn't look correct.
Thomas.
Signature · 2 lines
Crap can work. Given enough thrust pigs will fly, but it's not necessary a good idea. [ RFC1925, 2.3 ]
Re: [PATCH][MIPS][5/6]: AR7: serial hack
In reply to Matteo CroceQuoted 1 line · On Wed, 12 Mar 2008 02:30:06 +0100 Matteo Croce <[email protected]> wrote:
Ugly but we need it
Too ugly - NAK
However please send an explanation of the problem and lets find a nicer way to do it or bury it in arch code.
PATCH 1/6 : AR7: core
In reply to Matteo CroceSorry but the linux-mips mailing list can't accept this patch for unknown reasons. I'll send a gz file, that will work
Re: [PATCH][MIPS][1/6]: AR7: core
Quoted 2 lines · Matteo Croce
Sorry but the linux-mips mailing list can't accept this patch for unknown reasons. I'll send a gz file, that will work
to the best I can say without knowing the message ID of the lost mail it is as if the mail never reached the lmo machine. I can say for certain that it didn't end in the spam filter.
Ralf
Re: [PATCH][MIPS][5/6]: AR7: serial hack
In reply to Alan CoxIl Wednesday 12 March 2008 12:16:29 Alan Cox ha scritto:
Quoted 11 lines
Quoted 1 line · On Wed, 12 Mar 2008 02:30:06 +0100 Matteo Croce <[email protected]> wrote:
Ugly but we need it
Too ugly - NAK
However please send an explanation of the problem and lets find a nicer way to do it or bury it in arch code.
This is my problem:
ffi_cmdset_000: DDisabling erae-ssuspend-progrm ddue to code bokeenness. cmdlinparrt partition arssing not avaiabll
RedBoo ppartition parsngg not availabl
NET: Rgiistered protocl family 1
NET: Regsteered protocol ammily 10
IPv6 overIPPv4 tunnelingdriiver
NET: Regsteered protocolfammily 17
FS:: Mounted roo (ssquashfs filessttem) readonly.
Freeing nuused kernel meorry: 120k freed
I'll try to find a nicer way to fix it
Re: [PATCH][MIPS][6/6]: AR7 leds
In reply to Matteo CroceSubject really was: AR7 ethernet
Re: [PATCH][MIPS][5/6]: AR7: serial hack
In reply to Thomas BogendoerferIl Wednesday 12 March 2008 10:31:46 Thomas Bogendoerfer ha scritto:
Quoted 12 lines
include/linux/serial_core.h line 43
Quoted 9 lines
include/linux/serial_core.h +1
-0@@ -40,6 +40,7 @@#define PORT_NS16550A 14#define PORT_XSCALE 15#define PORT_RM9000 16/* PMC-Sierra RM9xxx internal UART */ +#define PORT_AR7 16this doesn't look correct.
Quoted 2 lines
Thomas.
Isn't it 16?
Thomas Bogendoerfer
maintainerRe: [PATCH][MIPS][5/6]: AR7: serial hack
Quoted 13 lines · Matteo Croce
Il Wednesday 12 March 2008 10:31:46 Thomas Bogendoerfer ha scritto:
Quoted 12 lines
include/linux/serial_core.h line 43
Quoted 9 lines
include/linux/serial_core.h +1
-0@@ -40,6 +40,7 @@#define PORT_NS16550A 14#define PORT_XSCALE 15#define PORT_RM9000 16/* PMC-Sierra RM9xxx internal UART */ +#define PORT_AR7 16this doesn't look correct.
Quoted 4 lines
Quoted 2 lines
Thomas.
Isn't it 16?
PORT_RM9000 is 16, how could PORT_AR7 be 16 as well ? And the 16 for PORT_RM9000 is correct in my counting.
Thomas.
Signature · 2 lines
Crap can work. Given enough thrust pigs will fly, but it's not necessary a good idea. [ RFC1925, 2.3 ]
Thomas Bogendoerfer
maintainerRe: [PATCH][MIPS][5/6]: AR7: serial hack
In reply to Matteo CroceQuoted 25 lines · Matteo Croce
Il Wednesday 12 March 2008 12:16:29 Alan Cox ha scritto:
Quoted 11 lines
Quoted 1 line · On Wed, 12 Mar 2008 02:30:06 +0100 Matteo Croce <[email protected]> wrote:
Ugly but we need it
Too ugly - NAK
However please send an explanation of the problem and lets find a nicer way to do it or bury it in arch code.
This is my problem:
ffi_cmdset_000: DDisabling erae-ssuspend-progrm ddue to code bokeenness. cmdlinparrt partition arssing not avaiabll
RedBoo ppartition parsngg not availabl
NET: Rgiistered protocl family 1
NET: Regsteered protocol ammily 10
IPv6 overIPPv4 tunnelingdriiver
NET: Regsteered protocolfammily 17
FS:: Mounted roo (ssquashfs filessttem) readonly.
Freeing nuused kernel meorry: 120k freed
Quoted 1 line
I'll try to find a nicer way to fix it
don't use AFE mode and treat it like a normal 16550 (PORT_16550A). You could also try to use UPIO_MEM32. That's how my console driver (different OS) works for AR7 without the hack to wait for LSR_TEMP and LSR_THRE.
Thomas.
Signature · 2 lines
Crap can work. Given enough thrust pigs will fly, but it's not necessary a good idea. [ RFC1925, 2.3 ]
Re: [PATCH][MIPS][5/6]: AR7: serial hack
In reply to Thomas BogendoerferIl Thursday 13 March 2008 09:45:26 Thomas Bogendoerfer ha scritto:
Quoted 17 lines · Matteo Croce
Quoted 16 lines
Il Wednesday 12 March 2008 10:31:46 Thomas Bogendoerfer ha scritto:
Quoted 14 lines
include/linux/serial_core.h line 43
Quoted 9 lines
include/linux/serial_core.h +1
-0@@ -40,6 +40,7 @@#define PORT_NS16550A 14#define PORT_XSCALE 15#define PORT_RM9000 16/* PMC-Sierra RM9xxx internal UART */ +#define PORT_AR7 16this doesn't look correct.
Thomas.
Quoted 7 lines
Quoted 1 line
Isn't it 16?
PORT_RM9000is 16, how couldPORT_AR7be 16 as well ? And the 16 forPORT_RM9000is correct in my counting.Thomas.
This is a bit better
drivers/serial/8250.c +11 -0
@@ -267,6 +267,13 @@ static const struct serial8250_config uart_config[] = { .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, .flags = UART_CAP_FIFO, }, + [PORT_AR7] = { + .name = "TI-AR7", + .fifo_size = 16, + .tx_loadsz = 16, + .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00, + .flags = UART_CAP_FIFO | UART_CAP_AFE, + }, };#if defined (CONFIG_SERIAL_8250_AU1X00 )
@@ -2455,7 +2462,11 @@ static void serial8250_console_putchar(struct uart_port *port, int ch) {struct uart_8250_port *up = (struct uart_8250_port *)port; +#ifdef CONFIG_AR7 +wait_for_xmitr (up,BOTH_EMPTY ); +#else wait_for_xmitr (up,UART_LSR_THRE ); +#endif serial_out (up,UART_TX , ch); }
include/linux/serial_core.h +2 -1
@@ -40,7 +40,8 @@#define PORT_NS16550A 14#define PORT_XSCALE 15#define PORT_RM9000 16/* PMC-Sierra RM9xxx internal UART */ -#define PORT_MAX_8250 16/* max port ID */ +#define PORT_AR7 17 +#define PORT_MAX_8250 17/* max port ID */ /* * ARM specific type numbers. These are not currently guaranteed
Thomas Bogendoerfer
maintainerRe: [PATCH][MIPS][5/6]: AR7: serial hack
Quoted 1 line · Matteo Croce
This is a bit better
is it possible to try without the serial changes first ?
Use
uart_port[0].type = PORT_16550A;
in arch/mips/ar7/platform.c.
Does it work ?
Thomas.
Signature · 2 lines
Crap can work. Given enough thrust pigs will fly, but it's not necessary a good idea. [ RFC1925, 2.3 ]
Alan Cox
NAKRe: [PATCH][MIPS][5/6]: AR7: serial hack
In reply to Matteo CroceQuoted 1 line
This is a bit better
NAK - especially as there has been a specific response about how to do this without ifdef hacks in core code.
Alan
Re: [PATCH][MIPS][5/6]: AR7: serial hack
In reply to Thomas BogendoerferIl Thursday 13 March 2008 10:01:09 Thomas Bogendoerfer ha scritto:
Quoted 26 lines · Matteo Croce
Quoted 25 lines
Il Wednesday 12 March 2008 12:16:29 Alan Cox ha scritto:
Quoted 11 lines
Quoted 1 line · On Wed, 12 Mar 2008 02:30:06 +0100 Matteo Croce <[email protected]> wrote:
Ugly but we need it
Too ugly - NAK
However please send an explanation of the problem and lets find a nicer way to do it or bury it in arch code.
This is my problem:
ffi_cmdset_000: DDisabling erae-ssuspend-progrm ddue to code bokeenness. cmdlinparrt partition arssing not avaiabll
RedBoo ppartition parsngg not availabl
NET: Rgiistered protocl family 1
NET: Regsteered protocol ammily 10
IPv6 overIPPv4 tunnelingdriiver
NET: Regsteered protocolfammily 17
FS:: Mounted roo (ssquashfs filessttem) readonly.
Freeing nuused kernel meorry: 120k freed
Quoted 9 lines
Quoted 1 line
I'll try to find a nicer way to fix it
don't use AFE mode and treat it like a normal 16550 (
PORT_16550A). You could also try to useUPIO_MEM32. That's how my console driver (different OS) works for AR7 without the hack to wait forLSR_TEMPandLSR_THRE.Thomas.
What about the .fcr field? PORT_16550A uses UART_FCR_R_TRIG_10 while AR7 uses UART_FCR_R_TRIG_00
Re: [PATCH][MIPS][5/6]: AR7: serial hack
In reply to Thomas BogendoerferIl Saturday 15 March 2008 11:40:09 Thomas Bogendoerfer ha scritto:
Quoted 7 lines · Matteo Croce
Quoted 1 line
This is a bit better
is it possible to try without the serial changes first ?
Use
Quoted 8 lines
uart_port[0].type = PORT_16550A;in
arch/mips/ar7/platform.c.Does it work ?
Thomas.
Tried I get teh usual broken serial output:
IP6 oover IPv4 tuneliing driver
NET: eggistered protooll family 17
VFS: Monteed root (squahfss filesystem)reaadonly.
Re: [PATCH][MIPS][5/6]: AR7: serial hack
In reply to Thomas BogendoerferIl Thursday 13 March 2008 10:01:09 Thomas Bogendoerfer ha scritto:
Quoted 26 lines · Matteo Croce
Quoted 25 lines
Il Wednesday 12 March 2008 12:16:29 Alan Cox ha scritto:
Quoted 11 lines
Quoted 1 line · On Wed, 12 Mar 2008 02:30:06 +0100 Matteo Croce <[email protected]> wrote:
Ugly but we need it
Too ugly - NAK
However please send an explanation of the problem and lets find a nicer way to do it or bury it in arch code.
This is my problem:
ffi_cmdset_000: DDisabling erae-ssuspend-progrm ddue to code bokeenness. cmdlinparrt partition arssing not avaiabll
RedBoo ppartition parsngg not availabl
NET: Rgiistered protocl family 1
NET: Regsteered protocol ammily 10
IPv6 overIPPv4 tunnelingdriiver
NET: Regsteered protocolfammily 17
FS:: Mounted roo (ssquashfs filessttem) readonly.
Freeing nuused kernel meorry: 120k freed
Quoted 9 lines
Quoted 1 line
I'll try to find a nicer way to fix it
don't use AFE mode and treat it like a normal 16550 (
PORT_16550A). You could also try to useUPIO_MEM32. That's how my console driver (different OS) works for AR7 without the hack to wait forLSR_TEMPandLSR_THRE.Thomas.
What do you mean by don't using AFE? Just removing UART_CAP_AFE from the .fcr field? I've tried but it doesn't work.
I tried also UPIO_MEM32 instead of UPIO_MEM (with PORT_AR7) but it doesn't works
Thomas Bogendoerfer
maintainerRe: [PATCH][MIPS][5/6]: AR7: serial hack
In reply to Matteo CroceQuoted 8 lines · Matteo Croce
Il Saturday 15 March 2008 11:40:09 Thomas Bogendoerfer ha scritto:
Quoted 7 lines · Matteo Croce
Quoted 1 line
This is a bit better
is it possible to try without the serial changes first ?
Use
Quoted 8 lines
Quoted 6 lines
uart_port[0].type = PORT_16550A;in
arch/mips/ar7/platform.c.Does it work ?
Tried I get teh usual broken serial output:
I just checked the latest AR7/UR8 source, I have, and they don't need special hacks. This is a 2.6.10 based tree. At that time there was no serial8250_console_putchar(), console output was done via serial8250_console_write() without any helper. Before writing to the UART_TX, wait_for_xmitr() is called. And this wait_for_xmitr() does check for BOTH_EMPTY.
Is there a good reason, why we don't check for BOTH_EMPTY in serial8250_console_putchar() ? To match the 2.6.10 behaviour we would need that and this would fix the AR7 case without any special handling.
Thomas.
Signature · 2 lines
Crap can work. Given enough thrust pigs will fly, but it's not necessary a good idea. [ RFC1925, 2.3 ]
Re: [PATCH][MIPS][5/6]: AR7: serial hack
Hello.
Quoted 18 lines · Thomas Bogendoerfer
Quoted 10 lines
Il Saturday 15 March 2008 11:40:09 Thomas Bogendoerfer ha scritto:
Quoted 7 lines · Matteo Croce
Quoted 2 lines
This is a bit better
is it possible to try without the serial changes first ?
Use
Quoted 7 lines
Quoted 5 lines
uart_port[0].type = PORT_16550A;in
arch/mips/ar7/platform.c.Does it work ?
Tried I get teh usual broken serial output:
Quoted 8 lines
I just checked the latest AR7/UR8 source, I have, and they don't need
special hacks. This is a 2.6.10 based tree. At that time there was
noserial8250_console_putchar(), console output was done viaserial8250_console_write()without any helper. Before writing to theUART_TX,wait_for_xmitr()is called. And thiswait_for_xmitr()does check forBOTH_EMPTY.Is there a good reason, why we don't check for
BOTH_EMPTYinserial8250_console_putchar()?
I guess transmission will be slower if you check both THRE and TSRE
conditions.
Quoted 3 lines
To match the 2.6.10 behaviour we
would need that and this would fix the AR7 case without any special handling.
AR7 case seems to be the case of bad hardware, and so require special
handling...
Quoted 1 line
Thomas.
WBR, Sergei
Re: [PATCH][MIPS][5/6]: AR7: serial hack
Quoted 20 lines · Hi, I wrote:
Quoted 19 lines
Quoted 6 lines
Quoted 5 lines
Quoted 1 line
This is a bit better
is it possible to try without the serial changes first ?
Use
Quoted 7 lines
Quoted 5 lines
uart_port[0].type = PORT_16550A;in
arch/mips/ar7/platform.c.Does it work ?
Tried I get teh usual broken serial output:
I just checked the latest AR7/UR8 source, I have, and they don't need
special hacks. This is a 2.6.10 based tree. At that time there was
noserial8250_console_putchar(), console output was done viaserial8250_console_write()without any helper. Before writing to theUART_TX,wait_for_xmitr()is called. And thiswait_for_xmitr()does check forBOTH_EMPTY.
Quoted 5 lines
Quoted 2 lines
Is there a good reason, why we don't check for
BOTH_EMPTYinserial8250_console_putchar()?I guess transmission will be slower if you check both THRE and TSRE
conditions.
... and since TX FIFO is in use, it must be even worse since you're only
able to load TX FIFO in the short time slots while TX shift register is empty -- quite possibly that this condition will turn to virtually no TX FIFO as these slots my be to short. BTW, does turning off TX FIFO help?
WBR, Sergei
Re: [PATCH][MIPS][5/6]: AR7: serial hack
In reply to Thomas BogendoerferQuoted 2 lines
Is there a good reason, why we don't check for
BOTH_EMPTYinserial8250_console_putchar()? To match the 2.6.10 behaviour we
A very good one - we have at least 1 byte of FIFO and the serial-ethernet magic console devices also use that fifo emptying entirely to deduce when to send a new packet.
Quoted 2 lines
would need that and this would fix the AR7 case without any special handling.
If the AR7 is an 8250 why does it need special handling? and indeed why does serial work on it except for console - or does that fail too.
Thomas Bogendoerfer
maintainerRe: [PATCH][MIPS][5/6]: AR7: serial hack
Quoted 6 lines · Alan Cox
Quoted 2 lines
Is there a good reason, why we don't check for
BOTH_EMPTYinserial8250_console_putchar()? To match the 2.6.10 behaviour weA very good one - we have at least 1 byte of FIFO and the serial-ethernet magic console devices also use that fifo emptying entirely to deduce when to send a new packet.
ok, now I understand.
Quoted 5 lines
Quoted 2 lines
would need that and this would fix the AR7 case without any special handling.
If the AR7 is an 8250 why does it need special handling? and indeed why does serial work on it except for console - or does that fail too.
well TI calls it a 16550A and I still wonder about the reported problems. Looks like I need to dig a little bit deeper...
Thomas.
Signature · 2 lines
Crap can work. Given enough thrust pigs will fly, but it's not necessary a good idea. [ RFC1925, 2.3 ]
Thomas Bogendoerfer
maintainerRe: [PATCH][MIPS][5/6]: AR7: serial hack
In reply to Matteo CroceQuoted 5 lines · Matteo Croce
Tried I get teh usual broken serial output:
IP6 oover IPv4 tuneliing driver
NET: eggistered protooll family 17
VFS: Monteed root (squahfss filesystem)reaadonly.
Linux version 2.6.25-rc6-00000-g151de9e-dirty ([email protected]) (gcc version 3.3.3 (Debian 20040320)) #29 Fri Mar 21 02:40:21 CET 2008 console [early0] enabled
CPU revision is: 00018448 (MIPS 4KEc)
TI AR7 (Unknown), ID: 0x5700, Revision: 0x00
Determined physical RAM map:
memory: 02000000 @ 14000000 (usable)
Zone PFN ranges:
Normal 81920 -> 90112
Movable zone start PFN for each node
early_node_map[1] active PFN ranges
0: 81920 -> 90112
Built 1 zonelists in Zone order, mobility grouping on. Total pages:
8128
Kernel command line: console=ttyS0,115200
Primary instruction cache 16kB, VIPT, 4-way, linesize 16 bytes. Primary data cache 16kB, 4-way, VIPT, no aliases, linesize 16 bytes Synthesized clear page handler (26 instructions). Synthesized copy page handler (46 instructions).
PID hash table entries: 128 (order: 7, 512 bytes)
Dentry cache hash table entries: 4096 (order: 2, 16384 bytes) Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
Memory: 29700k/32768k available (2075k kernel code, 3068k reserved, 466k data, 136k init, 0k highmem)
Mount-cache hash table entries: 512net_namespace: 152 bytes
NET: Registered protocol family 16
SCSI subsystem initialized
NET: Registered protocol family 2
Time: MIPS clocksource has been installed.
IP route cache hash table entries: 1024 (order: 0, 4096 bytes) TCP established hash table entries: 1024 (order: 1, 8192 bytes) TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
TCP: Hash tables configured (established 1024 bind 1024)
TCP reno registered
io scheduler noop registered
io scheduler anticipatory registered (default)
io scheduler deadline registered
Serial: 8250/16550 driver $Revision: 1.90 $ 2 ports, IRQ sharing disabled
serial8250: ttyS0 at MMIO 0x8610e03 (irq = 15) is a 16550A console handover: boot [early0] -> real [ttyS0]
serial8250: ttyS1 at MMIO 0x8610f03 (irq = 16) is a 16550A
loop: module loaded
Fixed MDIO Bus: probedar7_wdt: failed to unlock WDT disable regar7_wdt: failed to unlock WDT prescale regar7_wdt: failed to unlock WDT change regar7_wdt: timer margin 59 seconds (prescale 65535, change 57180, freq 62500000)
TCP cubic registered
NET: Registered protocol family 1
NET: Registered protocol family 17
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
Root-NFS: No NFS server available, giving up.
VFS: Unable to mount root fs via NFS, trying floppy.
List of all partitions:
No filesystem could mount root, tried:
Kernel panic - not syncing: VFS: Unable to mount root fs on
unknown-block(2,0)
Rebooting in 3 seconds..
I don't see any problems with using PORT_16550A. What I'm still wondering how your kernel could work at all, since there is a missing case for setting up the TLB refill handler. Something like the patch below.
And most of the AR7 device driver code will not work for big endian. The log above is from a big endian AR7 system, where I needed to disable CPMAC to get it booting that far.
Thomas.
arch/mips/mm/tlbex.c +1 -0
@@ -307,6 +307,7 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,case CPU_R12000 :case CPU_R14000 :case CPU_4KC : +case CPU_4KEC :case CPU_SB1 :case CPU_SB1A :case CPU_4KSC :
Signature · 2 lines
Crap can work. Given enough thrust pigs will fly, but it's not necessary a good idea. [ RFC1925, 2.3 ]
Re: [PATCH][MIPS][5/6]: AR7: serial hack
Il Friday 21 March 2008 02:55:40 Thomas Bogendoerfer ha scritto:
Quoted 89 lines · Matteo Croce
Quoted 5 lines
Tried I get teh usual broken serial output:
IP6 oover IPv4 tuneliing driver
NET: eggistered protooll family 17
VFS: Monteed root (squahfss filesystem)reaadonly.Linux version 2.6.25-rc6-00000-g151de9e-dirty ([email protected]) (gcc version 3.3.3 (Debian 20040320)) #29 Fri Mar 21 02:40:21 CET 2008 console [early0] enabled
CPU revision is: 00018448 (MIPS 4KEc)
TI AR7 (Unknown), ID:0x5700, Revision:0x00
Determined physical RAM map:
memory: 02000000 @ 14000000 (usable)
Zone PFN ranges:
Normal 81920 -> 90112
Movable zone start PFN for each node
early_node_map[1] active PFN ranges0: 81920 -> 90112Built 1 zonelists in Zone order, mobility grouping on. Total pages:
8128
Kernel command line: console=ttyS0,115200
Primary instruction cache 16kB, VIPT, 4-way, linesize 16 bytes. Primary data cache 16kB, 4-way, VIPT, no aliases, linesize 16 bytes Synthesized clear page handler (26 instructions). Synthesized copy page handler (46 instructions).
PID hash table entries: 128 (order: 7, 512 bytes)
Dentry cache hash table entries: 4096 (order: 2, 16384 bytes) Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
Memory: 29700k/32768k available (2075k kernel code, 3068k reserved, 466k data, 136k init, 0k highmem)
Mount-cache hash table entries: 512net_namespace: 152 bytes
NET: Registered protocol family 16
SCSI subsystem initialized
NET: Registered protocol family 2
Time: MIPS clocksource has been installed.
IP route cache hash table entries: 1024 (order: 0, 4096 bytes) TCP established hash table entries: 1024 (order: 1, 8192 bytes) TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
TCP: Hash tables configured (established 1024 bind 1024)
TCP reno registered
io scheduler noop registered
io scheduler anticipatory registered (default)
io scheduler deadline registered
Serial: 8250/16550 driver $Revision: 1.90 $ 2 ports, IRQ sharing disabled
serial8250: ttyS0 at MMIO0x8610e03(irq = 15) is a 16550A console handover: boot [early0] -> real [ttyS0]
serial8250: ttyS1 at MMIO0x8610f03(irq = 16) is a 16550A
loop: module loaded
Fixed MDIO Bus: probedar7_wdt: failed to unlock WDT disable regar7_wdt: failed to unlock WDT prescale regar7_wdt: failed to unlock WDT change regar7_wdt: timer margin 59 seconds (prescale 65535, change 57180, freq 62500000)
TCP cubic registered
NET: Registered protocol family 1
NET: Registered protocol family 17
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
Root-NFS: No NFS server available, giving up.
VFS: Unable to mount root fs via NFS, trying floppy.
List of all partitions:
No filesystem could mount root, tried:Kernel panic - not syncing: VFS: Unable to mount root fs onunknown-block(2,0)
Rebooting in 3 seconds..I don't see any problems with using
PORT_16550A. What I'm still wondering how your kernel could work at all, since there is a missing case for setting up the TLB refill handler. Something like the patch below.And most of the AR7 device driver code will not work for big endian. The log above is from a big endian AR7 system, where I needed to disable CPMAC to get it booting that far.
Thomas.
arch/mips/mm/tlbex.c +0
-0
arch/mips/mm/tlbex.c static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l, · line 313
Quoted 7 lines
arch/mips/mm/tlbex.c +1
-0@@ -307,6 +307,7 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,case CPU_R12000 :case CPU_R14000 :case CPU_4KC : +case CPU_4KEC :case CPU_SB1 :case CPU_SB1A :case CPU_4KSC :
Actually we use this for 2.6.24:
arch/mips/mm/tlbex.c +1 -1
@@ -902,7 +902,6 @@case CPU_R10000 :case CPU_R12000 :case CPU_R14000 : -case CPU_4KC :case CPU_SB1 :case CPU_SB1A :case CPU_4KSC :
@@ -933,6 +932,7 @@tlbw (p);break ; +case CPU_4KC :case CPU_4KEC :case CPU_24K :case CPU_34K :
Re: [PATCH][MIPS][5/6]: AR7: serial hack
In reply to Thomas BogendoerferIl Friday 21 March 2008 02:55:40 Thomas Bogendoerfer ha scritto:
Quoted 89 lines · Matteo Croce
Quoted 5 lines
Tried I get teh usual broken serial output:
IP6 oover IPv4 tuneliing driver
NET: eggistered protooll family 17
VFS: Monteed root (squahfss filesystem)reaadonly.Linux version 2.6.25-rc6-00000-g151de9e-dirty ([email protected]) (gcc version 3.3.3 (Debian 20040320)) #29 Fri Mar 21 02:40:21 CET 2008 console [early0] enabled
CPU revision is: 00018448 (MIPS 4KEc)
TI AR7 (Unknown), ID:0x5700, Revision:0x00
Determined physical RAM map:
memory: 02000000 @ 14000000 (usable)
Zone PFN ranges:
Normal 81920 -> 90112
Movable zone start PFN for each node
early_node_map[1] active PFN ranges0: 81920 -> 90112Built 1 zonelists in Zone order, mobility grouping on. Total pages:
8128
Kernel command line: console=ttyS0,115200
Primary instruction cache 16kB, VIPT, 4-way, linesize 16 bytes. Primary data cache 16kB, 4-way, VIPT, no aliases, linesize 16 bytes Synthesized clear page handler (26 instructions). Synthesized copy page handler (46 instructions).
PID hash table entries: 128 (order: 7, 512 bytes)
Dentry cache hash table entries: 4096 (order: 2, 16384 bytes) Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
Memory: 29700k/32768k available (2075k kernel code, 3068k reserved, 466k data, 136k init, 0k highmem)
Mount-cache hash table entries: 512net_namespace: 152 bytes
NET: Registered protocol family 16
SCSI subsystem initialized
NET: Registered protocol family 2
Time: MIPS clocksource has been installed.
IP route cache hash table entries: 1024 (order: 0, 4096 bytes) TCP established hash table entries: 1024 (order: 1, 8192 bytes) TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
TCP: Hash tables configured (established 1024 bind 1024)
TCP reno registered
io scheduler noop registered
io scheduler anticipatory registered (default)
io scheduler deadline registered
Serial: 8250/16550 driver $Revision: 1.90 $ 2 ports, IRQ sharing disabled
serial8250: ttyS0 at MMIO0x8610e03(irq = 15) is a 16550A console handover: boot [early0] -> real [ttyS0]
serial8250: ttyS1 at MMIO0x8610f03(irq = 16) is a 16550A
loop: module loaded
Fixed MDIO Bus: probedar7_wdt: failed to unlock WDT disable regar7_wdt: failed to unlock WDT prescale regar7_wdt: failed to unlock WDT change regar7_wdt: timer margin 59 seconds (prescale 65535, change 57180, freq 62500000)
TCP cubic registered
NET: Registered protocol family 1
NET: Registered protocol family 17
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
Root-NFS: No NFS server available, giving up.
VFS: Unable to mount root fs via NFS, trying floppy.
List of all partitions:
No filesystem could mount root, tried:Kernel panic - not syncing: VFS: Unable to mount root fs onunknown-block(2,0)
Rebooting in 3 seconds..I don't see any problems with using
PORT_16550A. What I'm still wondering how your kernel could work at all, since there is a missing case for setting up the TLB refill handler. Something like the patch below.And most of the AR7 device driver code will not work for big endian. The log above is from a big endian AR7 system, where I needed to disable CPMAC to get it booting that far.
Thomas.
arch/mips/mm/tlbex.c +0
-0
arch/mips/mm/tlbex.c static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l, · line 313
Quoted 7 lines
arch/mips/mm/tlbex.c +1
-0@@ -307,6 +307,7 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,case CPU_R12000 :case CPU_R14000 :case CPU_4KC : +case CPU_4KEC :case CPU_SB1 :case CPU_SB1A :case CPU_4KSC :
Actually we use this for 2.6.24:
arch/mips/mm/tlbex.c +1 -1
@@ -902,7 +902,6 @@case CPU_R10000 :case CPU_R12000 :case CPU_R14000 : -case CPU_4KC :case CPU_SB1 :case CPU_SB1A :case CPU_4KSC :
@@ -933,6 +932,7 @@tlbw (p);break ; +case CPU_4KC :case CPU_4KEC :case CPU_24K :case CPU_34K :
Re: [PATCH][MIPS][3/6]: AR7: VLYNQ bus
In reply to Matteo CroceHi Matteo,
drivers/vlynq/vlynq.c line 374
Quoted 3 lines · Matteo Croce
drivers/vlynq/vlynq.c new file +3
-0+switch (dev->divisor) { +case vlynq_div_auto: +/* Only try locally supplied clock, others cause problems */
i have a platform (AR7VWi - Leonardo Board) which has an external supplied clock from an ACX111 so the div_auto autoprobing will not work.
I put the vlynq_div_external code in front of this which should simply listen on the vlynq if there is a clock and use it. This solved one of the issues for me. Can you elaborate on the above comment where caused problems? I have seen multiple implementations of this, all of them did autoprobing first by listening on the remote clock first.
drivers/vlynq/vlynq.c line 387
Quoted 13 lines
drivers/vlynq/vlynq.c new file +13
-0+vlynq_reg_write (dev->remote->control,0 ); +for (i = vlynq_ldiv2; i <= vlynq_ldiv8; i++) { +vlynq_reg_write (dev->local->control, +VLYNQ_CTRL_CLOCK_INT | +VLYNQ_CTRL_CLOCK_DIV (i - vlynq_ldiv1)); +if (vlynq_linked (dev)) { +printk (KERN_DEBUG +"%s: using local clock divisor %d\n" , + dev->dev.bus_id, i - vlynq_ldiv1 +1 ); + dev->divisor = i; +return 0 ; + } + }
What i found in the TI code is that FIRST the local->control needs to get set before issueing a remote access so shouldnd the
vlynq_reg_write(dev->remote ... )
move behind the dev->local ? I mean the logic is to set a local clock divisor - try to access something on the remote end and see if the link got up ?!?
Flo
Signature · 3 lines
Florian Lohoff [email protected] +49-171-2280134 Those who would give up a little freedom to get a little security shall soon have neither - Benjamin Franklin
Re: [PATCH][MIPS][1/6]: AR7: core
In reply to Matteo CroceHi,
Quoted 3 lines · Matteo Croce
Sorry but the linux-mips mailing list can't accept this patch for unknown reasons. I'll send a gz file, that will work
i have a plattform AR7VWi which has a High Active reset for the vlynq_low so the code is not sufficient to get the ACX up and running
+static struct plat_vlynq_data vlynq_low_data = {
+ .ops.on = vlynq_on,
+ .ops.off = vlynq_off,
+ .reset_bit = 20,
+ .gpio_bit = 18,
+};
+
+static struct plat_vlynq_data vlynq_high_data = {
+ .ops.on = vlynq_on,
+ .ops.off = vlynq_off,
+ .reset_bit = 16,
+ .gpio_bit = 19,+};
The gpio_bit's are okay but they are high active so the generic code:
+static int vlynq_on(struct vlynq_device *dev)
+{
+ int result;
+ struct plat_vlynq_data *pdata = dev->dev.platform_data;
+
+ if ((result = gpio_request(pdata->gpio_bit, "vlynq")))
+ goto out;
+
+ ar7_device_reset(pdata->reset_bit);
+
+ if ((result = ar7_gpio_disable(pdata->gpio_bit)))
+ goto out_enabled;
+
+ if ((result = ar7_gpio_enable(pdata->gpio_bit)))
+ goto out_enabled;
+
+ if ((result = gpio_direction_output(pdata->gpio_bit, 0)))
+ goto out_gpio_enabled;
+
+ mdelay(50);
+
+ gpio_set_value(pdata->gpio_bit, 1);
Is not enough here - gpios might be reverse polarity ... The right thing to actually reset a device would need a toggle not a static state.
+ mdelay(50);
+
+ return 0;
+static void vlynq_off(struct vlynq_device *dev)
+{
+ struct plat_vlynq_data *pdata = dev->dev.platform_data; + ar7_gpio_disable(pdata->gpio_bit); + gpio_free(pdata->gpio_bit); + ar7_device_disable(pdata->reset_bit);
+}
gpio_disable to gpio_bit will put the gpio to tristate or special function which will lead to unpredicted results. So gpio_set_value would be needed and then the same as for vlynq_on applies concerning the reverse polarity.
Flo
Signature · 3 lines
Florian Lohoff [email protected] +49-171-2280134 Those who would give up a little freedom to get a little security shall soon have neither - Benjamin Franklin
Re: [PATCH][MIPS][3/6]: AR7: VLYNQ bus
In reply to Florian LohoffIl Saturday 29 March 2008 10:59:14 Florian Lohoff ha scritto:
Quoted 17 lines
Hi Matteo,
Review
Quoted 3 lines · Matteo Croce
(quoted diff) +3
-0+ switch (dev->divisor) { + case vlynq_div_auto: + /* Only try locally supplied clock, others cause problems */i have a platform (AR7VWi - Leonardo Board) which has an external supplied clock from an ACX111 so the
div_autoautoprobing will not work.I put the
vlynq_div_externalcode in front of this which should simply listen on the vlynq if there is a clock and use it. This solved one of the issues for me. Can you elaborate on the above comment where caused problems? I have seen multiple implementations of this, all of them did autoprobing first by listening on the remote clock first.
Quoted 14 lines
Review
Quoted 13 lines
(quoted diff) +13
-0+ vlynq_reg_write(dev->remote->control, 0); + for (i = vlynq_ldiv2; i <= vlynq_ldiv8; i++) { + vlynq_reg_write(dev->local->control, + VLYNQ_CTRL_CLOCK_INT | + VLYNQ_CTRL_CLOCK_DIV(i - vlynq_ldiv1)); + if (vlynq_linked(dev)) { + printk(KERN_DEBUG + "%s: using local clock divisor %d\n", + dev->dev.bus_id, i - vlynq_ldiv1 + 1); + dev->divisor = i; + return 0; + } + }
Il Saturday 29 March 2008 10:59:14 hai scritto:
Quoted 17 lines
Hi Matteo,
Review
Quoted 3 lines · Matteo Croce
(quoted diff) +3
-0+ switch (dev->divisor) { + case vlynq_div_auto: + /* Only try locally supplied clock, others cause problems */i have a platform (AR7VWi - Leonardo Board) which has an external supplied clock from an ACX111 so the
div_autoautoprobing will not work.I put the
vlynq_div_externalcode in front of this which should simply listen on the vlynq if there is a clock and use it. This solved one of the issues for me. Can you elaborate on the above comment where caused problems? I have seen multiple implementations of this, all of them did autoprobing first by listening on the remote clock first.
Quoted 13 lines
Review
Quoted 13 lines
(quoted diff) +13
-0+ vlynq_reg_write(dev->remote->control, 0); + for (i = vlynq_ldiv2; i <= vlynq_ldiv8; i++) { + vlynq_reg_write(dev->local->control, + VLYNQ_CTRL_CLOCK_INT | + VLYNQ_CTRL_CLOCK_DIV(i - vlynq_ldiv1)); + if (vlynq_linked(dev)) { + printk(KERN_DEBUG + "%s: using local clock divisor %d\n", + dev->dev.bus_id, i - vlynq_ldiv1 + 1); + dev->divisor = i; + return 0; + } + }
Works fine for my AR7 which has an interlan clock.
drivers/vlynq/Kconfig new file +13 -0
@@ -0,0 +1,13 @@ +menu "TI VLYNQ" + +config VLYNQ + bool "TI VLYNQ bus support" + depends on AR7 && EXPERIMENTAL + help + Support for the TI VLYNQ bus + + The module will be called vlynq + + If unsure, say N + +endmenu
drivers/vlynq/Makefile new file +5 -0
@@ -0,0 +1,5 @@ +# +# Makefile for kernel vlynq drivers +# + +obj-$(CONFIG_VLYNQ) += vlynq.o
drivers/vlynq/vlynq.c new file +669 -0
669 lines not on this page · raw message
include/linux/vlynq.h new file +161 -0
161 lines not on this page · raw message
Re: [PATCH][MIPS][3/6]: AR7: VLYNQ bus
In reply to Florian LohoffIl Saturday 29 March 2008 10:59:14 Florian Lohoff ha scritto:
Quoted 10 lines
What i found in the TI code is that FIRST the
local->controlneeds to get set before issueing a remote access so shouldnd thevlynq_reg_write(dev->remote ... )move behind the
dev->local? I mean the logic is to set a local clock divisor - try to access something on the remote end and see if the link got up ?!?Flo
dunno about the order, maybe "vlynq_reg_write(dev->remote->control, 0);" and other NULL writes works as a reset...
Re: [PATCH][MIPS][3/6]: AR7: VLYNQ bus
In reply to Florian LohoffIl Saturday 29 March 2008 10:59:14 Florian Lohoff ha scritto:
Quoted 34 lines
Hi Matteo,
Review
Quoted 3 lines · Matteo Croce
(quoted diff) +3
-0+ switch (dev->divisor) { + case vlynq_div_auto: + /* Only try locally supplied clock, others cause problems */i have a platform (AR7VWi - Leonardo Board) which has an external supplied clock from an ACX111 so the
div_autoautoprobing will not work.I put the
vlynq_div_externalcode in front of this which should simply listen on the vlynq if there is a clock and use it. This solved one of the issues for me. Can you elaborate on the above comment where caused problems? I have seen multiple implementations of this, all of them did autoprobing first by listening on the remote clock first.Review
Quoted 13 lines
(quoted diff) +13
-0+ vlynq_reg_write(dev->remote->control, 0); + for (i = vlynq_ldiv2; i <= vlynq_ldiv8; i++) { + vlynq_reg_write(dev->local->control, + VLYNQ_CTRL_CLOCK_INT | + VLYNQ_CTRL_CLOCK_DIV(i - vlynq_ldiv1)); + if (vlynq_linked(dev)) { + printk(KERN_DEBUG + "%s: using local clock divisor %d\n", + dev->dev.bus_id, i - vlynq_ldiv1 + 1); + dev->divisor = i; + return 0; + } + }What i found in the TI code is that FIRST the
local->controlneeds to get set before issueing a remote access so shouldnd the
Quoted 7 lines
vlynq_reg_write(dev->remote ... )move behind the
dev->local? I mean the logic is to set a local clock divisor - try to access something on the remote end and see if the link got up ?!?Flo
You were right, here is the fixed vlynq driver:
drivers/vlynq/Kconfig new file +13 -0
@@ -0,0 +1,13 @@ +menu "TI VLYNQ" + +config VLYNQ + bool "TI VLYNQ bus support" + depends on AR7 && EXPERIMENTAL + help + Support for the TI VLYNQ bus + + The module will be called vlynq + + If unsure, say N + +endmenu
drivers/vlynq/Makefile new file +5 -0
@@ -0,0 +1,5 @@ +# +# Makefile for kernel vlynq drivers +# + +obj-$(CONFIG_VLYNQ) += vlynq.o
drivers/vlynq/vlynq.c new file +670 -0
670 lines not on this page · raw message
include/linux/vlynq.h new file +161 -0
161 lines not on this page · raw message
Re: [PATCH][MIPS][3/6]: AR7: VLYNQ bus
In reply to Matteo CroceQuoted 3 lines · Matteo Croce
Works fine for my AR7 which has an interlan clock.
Its doesnt for me with an external clock - thats what i mean - Auto probing should first try to listen for an external clock before letting clocks run against each other. This is the hunk of a patch on top of yours ...
@@ -371,12 +371,20 @@ static int __vlynq_enable_device(struct
switch (dev->divisor) {
case vlynq_div_auto:
- /* Only try locally supplied clock, others cause problems */
+
+ vlynq_reg_write(dev->local->control, 0);
vlynq_reg_write(dev->remote->control, 0);+ if (vlynq_linked(dev)) {
+ printk(KERN_DEBUG "%s: using external clock\n",
+ dev->dev.bus_id);
+ return 0;
+ }
+
for (i = vlynq_ldiv2; i <= vlynq_ldiv8; i++) {
vlynq_reg_write(dev->local->control,
VLYNQ_CTRL_CLOCK_INT |
VLYNQ_CTRL_CLOCK_DIV(i - vlynq_ldiv1));+ vlynq_reg_write(dev->remote->control, 0);
if (vlynq_linked(dev)) {
printk(KERN_DEBUG
"%s: using local clock divisor %d\n",
Flo
Signature · 3 lines
Florian Lohoff [email protected] +49-171-2280134 Those who would give up a little freedom to get a little security shall soon have neither - Benjamin Franklin
Re: [PATCH][MIPS][3/6]: AR7: VLYNQ bus
Il Wednesday 02 April 2008 20:31:14 Florian Lohoff ha scritto:
Quoted 33 lines · Matteo Croce
Quoted 3 lines
Works fine for my AR7 which has an interlan clock.
Its doesnt for me with an external clock - thats what i mean - Auto probing should first try to listen for an external clock before letting clocks run against each other. This is the hunk of a patch on top of yours ...
(quoted diff) +9
-1@@ -371,12 +371,20 @@ static int __vlynq_enable_device(struct switch (dev->divisor) { case vlynq_div_auto: - /* Only try locally supplied clock, others cause problems */ + + vlynq_reg_write(dev->local->control, 0); vlynq_reg_write(dev->remote->control, 0); + if (vlynq_linked(dev)) { + printk(KERN_DEBUG "%s: using external clock\n", + dev->dev.bus_id); + return 0; + } + for (i = vlynq_ldiv2; i <= vlynq_ldiv8; i++) { vlynq_reg_write(dev->local->control, VLYNQ_CTRL_CLOCK_INT | VLYNQ_CTRL_CLOCK_DIV(i - vlynq_ldiv1)); + vlynq_reg_write(dev->remote->control, 0); if (vlynq_linked(dev)) { printk(KERN_DEBUG "%s: using local clock divisor %d\n",
Quoted 1 line
Flo
isn't this what I do in my last patch?
Re: [PATCH][MIPS][3/6]: AR7: VLYNQ bus
Quoted 23 lines · Matteo Croce
Quoted 23 lines
(quoted diff) +9
-1@@ -371,12 +371,20 @@ static int __vlynq_enable_device(struct switch (dev->divisor) { case vlynq_div_auto: - /* Only try locally supplied clock, others cause problems */ + + vlynq_reg_write(dev->local->control, 0); vlynq_reg_write(dev->remote->control, 0); + if (vlynq_linked(dev)) { + printk(KERN_DEBUG "%s: using external clock\n", + dev->dev.bus_id); + return 0; + } + for (i = vlynq_ldiv2; i <= vlynq_ldiv8; i++) { vlynq_reg_write(dev->local->control, VLYNQ_CTRL_CLOCK_INT | VLYNQ_CTRL_CLOCK_DIV(i - vlynq_ldiv1)); + vlynq_reg_write(dev->remote->control, 0); if (vlynq_linked(dev)) { printk(KERN_DEBUG "%s: using local clock divisor %d\n",
Quoted 3 lines
Quoted 1 line
Flo
isn't this what I do in my last patch?
I was shoveling through my inbox top down and the first mail was the original patch i was referring to - sorry for the noise...
Flo
Signature · 3 lines
Florian Lohoff [email protected] +49-171-2280134 Those who would give up a little freedom to get a little security shall soon have neither - Benjamin Franklin