Kernel parameter for max number of concurrent global TLB purges

PATCH New Fenghua Yu 1 participant 1 message Mar 14, 2008

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Fenghua Yu

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2008-03-14 20:57 UTC #0 lore raw

PATCH 1/1 Kernel parameter for max number of concurrent global TLB purges

The patch defines kernel parameter "nptcg=". The parameter overrides max number of concurrent global TLB purges which is reported from either PAL_VM_SUMMARY or SAL PALO.

This patch is on the top of patch sent before:

http://www.gelato.unsw.edu.au/archives/linux-ia64/0801/21684.html

Signed-off-by Fenghua Yu <[email protected]>

---

 Documentation/kernel-parameters.txt |    4 +++
 arch/ia64/kernel/efi.c              |    2 -
 arch/ia64/kernel/setup.c            |    2 -
 arch/ia64/mm/tlb.c                  |   46 ++++++++++++++++++++++++++++++++----
 include/asm-ia64/sal.h              |    4 +++
 5 files changed, 51 insertions(+), 7 deletions(-)

Documentation/kernel-parameters.txt +4 -0

index 533e67f..3477a8b 100644
@@ -1337,6 +1337,10 @@ and is between 256 and 4096 characters. It is defined in the file
 
 	nowb		[ARM]
 
+	nptcg=		[IA64] Override max number of concurrent global TLB
+			purges which is reported from either PAL_VM_SUMMARY or
+			SAL PALO.
+
 	numa_zonelist_order= [KNL, BOOT] Select zonelist order for NUMA.
 			one of ['zone', 'node', 'default'] can be specified
 			This can be set from sysctl after boot.

arch/ia64/kernel/efi.c +1 -1

index 003cd09..d45f215 100644
@@ -436,7 +436,7 @@ static void __init handle_palo(unsigned long palo_phys)
 		return;
 	}
 
-	setup_ptcg_sem(palo->max_tlb_purges, 1);
+	setup_ptcg_sem(palo->max_tlb_purges, NPTCG_FROM_PALO);
 }
 
 void

arch/ia64/kernel/setup.c +1 -1

index 1cbd263..f798c07 100644
@@ -949,7 +949,7 @@ cpu_init (void)
 	/* set ia64_ctx.max_rid to the maximum RID that is supported by all CPUs: */
 	if (ia64_pal_vm_summary(NULL, &vmi) = 0) {
 		max_ctx = (1U << (vmi.pal_vm_info_2_s.rid_size - 3)) - 1;
-		setup_ptcg_sem(vmi.pal_vm_info_2_s.max_purges, 0);
+		setup_ptcg_sem(vmi.pal_vm_info_2_s.max_purges, NPTCG_FROM_PAL);
 	} else {
 		printk(KERN_WARNING "cpu_init: PAL VM summary failed, assuming 18 RID bits\n");
 		max_ctx = (1U << 15) - 1;	/* use architected minimum */

arch/ia64/mm/tlb.c +41 -5

75 lines not on this page · raw message

include/asm-ia64/sal.h +4 -0

index 3cd637a..89594b4 100644
@@ -896,6 +896,10 @@ struct palo_table {
 	u8  reserved2[6];
 };
 
+#define NPTCG_FROM_PAL			0
+#define NPTCG_FROM_PALO			1
+#define NPTCG_FROM_KERNEL_PARAMETER	2
+
 #endif /* __ASSEMBLY__ */
 
 #endif /* _ASM_IA64_SAL_H */