Skip to contentSkip to conversation

x86/KVM: Move VMX MSR definition to msr-index.h

PATCH In review Yang, Sheng 1 participant 1 message Jun 24, 2008

Subsystems (3)
x86 KVM KVM x86
lore
Share & tools
lore

Yang, Sheng

author
#0 lore raw

PATCH 1/2 x86/KVM: Move VMX MSR definition to msr-index.h

From 90cc7b5303fab30d53d42b3fb7281d756b3d7134 Mon Sep 17 00:00:00 2001
From: Sheng Yang <[email protected]>
Date: Tue, 24 Jun 2008 17:02:41 +0800
Subject: [PATCH] x86/KVM: Move VMX MSR definition to msr-index.h

Signed-off-by Sheng Yang <[email protected]>
---
 arch/x86/kvm/vmx.h          |   15 ---------------
 include/asm-x86/msr-index.h |   16 ++++++++++++++++
 2 files changed, 16 insertions(+), 15 deletions(-)
arch/x86/kvm/vmx.h +0 -15
index 0c22e5f..da06a4a 100644
@@ -331,21 +331,6 @@ enum vmcs_field {
 
 #define AR_RESERVD_MASK 0xfffe0f00
 
-#define MSR_IA32_VMX_BASIC                      0x480
-#define MSR_IA32_VMX_PINBASED_CTLS              0x481
-#define MSR_IA32_VMX_PROCBASED_CTLS             0x482
-#define MSR_IA32_VMX_EXIT_CTLS                  0x483
-#define MSR_IA32_VMX_ENTRY_CTLS                 0x484
-#define MSR_IA32_VMX_MISC                       0x485
-#define MSR_IA32_VMX_CR0_FIXED0                 0x486
-#define MSR_IA32_VMX_CR0_FIXED1                 0x487
-#define MSR_IA32_VMX_CR4_FIXED0                 0x488
-#define MSR_IA32_VMX_CR4_FIXED1                 0x489
-#define MSR_IA32_VMX_VMCS_ENUM                  0x48a
-#define MSR_IA32_VMX_PROCBASED_CTLS2            0x48b
-#define MSR_IA32_VMX_EPT_VPID_CAP               0x48c
-
-#define MSR_IA32_FEATURE_CONTROL                0x3a
 #define IA32_FEATURE_CONTROL_LOCKED_BIT		0x1
 #define IA32_FEATURE_CONTROL_VMXON_ENABLED_BIT	0x4
include/asm-x86/msr-index.h +16 -0
index 09413ad..59ffc93 100644
@@ -174,6 +174,7 @@
 #define MSR_IA32_TSC			0x00000010
 #define MSR_IA32_PLATFORM_ID		0x00000017
 #define MSR_IA32_EBL_CR_POWERON		0x0000002a
+#define MSR_IA32_FEATURE_CONTROL	0x0000003a
 
 #define MSR_IA32_APICBASE		0x0000001b
 #define MSR_IA32_APICBASE_BSP		(1<<8)

@@ -194,6 +195,21 @@
 #define MSR_IA32_THERM_STATUS		0x0000019c
 #define MSR_IA32_MISC_ENABLE		0x000001a0
 
+/* Intel VT related */
+#define MSR_IA32_VMX_BASIC		0x00000480
+#define MSR_IA32_VMX_PINBASED_CTLS	0x00000481
+#define MSR_IA32_VMX_PROCBASED_CTLS	0x00000482
+#define MSR_IA32_VMX_EXIT_CTLS		0x00000483
+#define MSR_IA32_VMX_ENTRY_CTLS		0x00000484
+#define MSR_IA32_VMX_MISC		0x00000485
+#define MSR_IA32_VMX_CR0_FIXED0		0x00000486
+#define MSR_IA32_VMX_CR0_FIXED1		0x00000487
+#define MSR_IA32_VMX_CR4_FIXED0		0x00000488
+#define MSR_IA32_VMX_CR4_FIXED1		0x00000489
+#define MSR_IA32_VMX_VMCS_ENUM		0x0000048a
+#define MSR_IA32_VMX_PROCBASED_CTLS2	0x0000048b
+#define MSR_IA32_VMX_EPT_VPID_CAP	0x0000048c
+
 /* Intel Model 6 */
 #define MSR_P6_EVNTSEL0			0x00000186
 #define MSR_P6_EVNTSEL1			0x00000187

--
1.5.5

From 90cc7b5303fab30d53d42b3fb7281d756b3d7134 Mon Sep 17 00:00:00 2001
From: Sheng Yang <[email protected]>
Date: Tue, 24 Jun 2008 17:02:41 +0800
Subject: [PATCH] x86/KVM: Move VMX MSR definition to msr-index.h

Signed-off-by Sheng Yang <[email protected]>
---
 arch/x86/kvm/vmx.h          |   15 ---------------
 include/asm-x86/msr-index.h |   16 ++++++++++++++++
 2 files changed, 16 insertions(+), 15 deletions(-)
arch/x86/kvm/vmx.h +0 -15
index 0c22e5f..da06a4a 100644
@@ -331,21 +331,6 @@ enum vmcs_field {
 
 #define AR_RESERVD_MASK 0xfffe0f00
 
-#define MSR_IA32_VMX_BASIC                      0x480
-#define MSR_IA32_VMX_PINBASED_CTLS              0x481
-#define MSR_IA32_VMX_PROCBASED_CTLS             0x482
-#define MSR_IA32_VMX_EXIT_CTLS                  0x483
-#define MSR_IA32_VMX_ENTRY_CTLS                 0x484
-#define MSR_IA32_VMX_MISC                       0x485
-#define MSR_IA32_VMX_CR0_FIXED0                 0x486
-#define MSR_IA32_VMX_CR0_FIXED1                 0x487
-#define MSR_IA32_VMX_CR4_FIXED0                 0x488
-#define MSR_IA32_VMX_CR4_FIXED1                 0x489
-#define MSR_IA32_VMX_VMCS_ENUM                  0x48a
-#define MSR_IA32_VMX_PROCBASED_CTLS2            0x48b
-#define MSR_IA32_VMX_EPT_VPID_CAP               0x48c
-
-#define MSR_IA32_FEATURE_CONTROL                0x3a
 #define IA32_FEATURE_CONTROL_LOCKED_BIT		0x1
 #define IA32_FEATURE_CONTROL_VMXON_ENABLED_BIT	0x4
include/asm-x86/msr-index.h +16 -0
index 09413ad..59ffc93 100644
@@ -174,6 +174,7 @@
 #define MSR_IA32_TSC			0x00000010
 #define MSR_IA32_PLATFORM_ID		0x00000017
 #define MSR_IA32_EBL_CR_POWERON		0x0000002a
+#define MSR_IA32_FEATURE_CONTROL	0x0000003a
 
 #define MSR_IA32_APICBASE		0x0000001b
 #define MSR_IA32_APICBASE_BSP		(1<<8)

@@ -194,6 +195,21 @@
 #define MSR_IA32_THERM_STATUS		0x0000019c
 #define MSR_IA32_MISC_ENABLE		0x000001a0
 
+/* Intel VT related */
+#define MSR_IA32_VMX_BASIC		0x00000480
+#define MSR_IA32_VMX_PINBASED_CTLS	0x00000481
+#define MSR_IA32_VMX_PROCBASED_CTLS	0x00000482
+#define MSR_IA32_VMX_EXIT_CTLS		0x00000483
+#define MSR_IA32_VMX_ENTRY_CTLS		0x00000484
+#define MSR_IA32_VMX_MISC		0x00000485
+#define MSR_IA32_VMX_CR0_FIXED0		0x00000486
+#define MSR_IA32_VMX_CR0_FIXED1		0x00000487
+#define MSR_IA32_VMX_CR4_FIXED0		0x00000488
+#define MSR_IA32_VMX_CR4_FIXED1		0x00000489
+#define MSR_IA32_VMX_VMCS_ENUM		0x0000048a
+#define MSR_IA32_VMX_PROCBASED_CTLS2	0x0000048b
+#define MSR_IA32_VMX_EPT_VPID_CAP	0x0000048c
+
 /* Intel Model 6 */
 #define MSR_P6_EVNTSEL0			0x00000186
 #define MSR_P6_EVNTSEL1			0x00000187
Signature · 1 line
1.5.5