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ath5k: Update register list

PATCH In review Nick Kossifidis 5 participants 10 messages Jul 20, 2008 – Aug 2, 2008 Networking drivers (wireless)

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PATCH 1/12 ath5k: Update register list

* Update list of registers
* Use updated register macros inside hw.c and initvals.c

Changes-licensed-under: ISC

---

drivers/net/wireless/ath5k/hw.c +22 -21
index c6d12c5..2e60cf0 100644
@@ -843,27 +843,26 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
 		 * Write some more initial register settings
 		 */
 		if (ah->ah_version == AR5K_AR5212) {
-			ath5k_hw_reg_write(ah, 0x0002a002, AR5K_PHY(11));
+			ath5k_hw_reg_write(ah, 0x0002a002, 0x982c);
 
 			if (channel->hw_value == CHANNEL_G)
 				if (ah->ah_mac_srev < AR5K_SREV_VER_AR2413)
 					ath5k_hw_reg_write(ah, 0x00f80d80,
-						AR5K_PHY(83));
+								0x994c);
 				else if (ah->ah_mac_srev < AR5K_SREV_VER_AR2424)
 					ath5k_hw_reg_write(ah, 0x00380140,
-						AR5K_PHY(83));
+								0x994c);
 				else if (ah->ah_mac_srev < AR5K_SREV_VER_AR2425)
 					ath5k_hw_reg_write(ah, 0x00fc0ec0,
-						AR5K_PHY(83));
+								0x994c);
 				else /* 2425 */
 					ath5k_hw_reg_write(ah, 0x00fc0fc0,
-						AR5K_PHY(83));
+								0x994c);
 			else
-				ath5k_hw_reg_write(ah, 0x00000000,
-					AR5K_PHY(83));
+				ath5k_hw_reg_write(ah, 0x00000000, 0x994c);
 
 			ath5k_hw_reg_write(ah, 0x000009b5, 0xa228);
-			ath5k_hw_reg_write(ah, 0x0000000f, 0x8060);
+			ath5k_hw_reg_write(ah, 0x0000000f, AR5K_SEQ_MASK);
 			ath5k_hw_reg_write(ah, 0x00000000, 0xa254);
 			ath5k_hw_reg_write(ah, 0x0000000e, AR5K_PHY_SCAL);
 		}
@@ -935,7 +934,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
 			return ret;
 
 		/* Set antenna mode */
-		AR5K_REG_MASKED_BITS(ah, AR5K_PHY(0x44),
+		AR5K_REG_MASKED_BITS(ah, AR5K_PHY_ANT_CTL,
 			ah->ah_antenna[ee_mode][0], 0xfffffc06);
 
 		/*
@@ -965,15 +964,15 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
 
 		ath5k_hw_reg_write(ah,
 			AR5K_PHY_NF_SVAL(ee->ee_noise_floor_thr[ee_mode]),
-			AR5K_PHY(0x5a));
+			AR5K_PHY_NFTHRES);
 
-		AR5K_REG_MASKED_BITS(ah, AR5K_PHY(0x11),
+		AR5K_REG_MASKED_BITS(ah, AR5K_PHY_SETTLING,
 			(ee->ee_switch_settling[ee_mode] << 7) & 0x3f80,
 			0xffffc07f);
-		AR5K_REG_MASKED_BITS(ah, AR5K_PHY(0x12),
+		AR5K_REG_MASKED_BITS(ah, AR5K_PHY_GAIN,
 			(ee->ee_ant_tx_rx[ee_mode] << 12) & 0x3f000,
 			0xfffc0fff);
-		AR5K_REG_MASKED_BITS(ah, AR5K_PHY(0x14),
+		AR5K_REG_MASKED_BITS(ah, AR5K_PHY_DESIRED_SIZE,
 			(ee->ee_adc_desired_size[ee_mode] & 0x00ff) |
 			((ee->ee_pga_desired_size[ee_mode] << 8) & 0xff00),
 			0xffff0000);
@@ -982,13 +981,13 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
 			(ee->ee_tx_end2xpa_disable[ee_mode] << 24) |
 			(ee->ee_tx_end2xpa_disable[ee_mode] << 16) |
 			(ee->ee_tx_frm2xpa_enable[ee_mode] << 8) |
-			(ee->ee_tx_frm2xpa_enable[ee_mode]), AR5K_PHY(0x0d));
+			(ee->ee_tx_frm2xpa_enable[ee_mode]), AR5K_PHY_RF_CTL4);
 
-		AR5K_REG_MASKED_BITS(ah, AR5K_PHY(0x0a),
+		AR5K_REG_MASKED_BITS(ah, AR5K_PHY_RF_CTL3,
 			ee->ee_tx_end2xlna_enable[ee_mode] << 8, 0xffff00ff);
-		AR5K_REG_MASKED_BITS(ah, AR5K_PHY(0x19),
+		AR5K_REG_MASKED_BITS(ah, AR5K_PHY_NF,
 			(ee->ee_thr_62[ee_mode] << 12) & 0x7f000, 0xfff80fff);
-		AR5K_REG_MASKED_BITS(ah, AR5K_PHY(0x49), 4, 0xffffff01);
+		AR5K_REG_MASKED_BITS(ah, AR5K_PHY_OFDM_SELFCORR, 4, 0xffffff01);
 
 		AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ,
 		    AR5K_PHY_IQ_CORR_ENABLE |
@@ -3359,11 +3358,13 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue)
 		ath5k_hw_reg_write(ah, ah->ah_turbo ?
 			AR5K_INIT_PROTO_TIME_CNTRL_TURBO :
 			AR5K_INIT_PROTO_TIME_CNTRL, AR5K_IFS1);
-		/* Set PHY register 0x9844 (??) */
+		/* Set AR5K_PHY_SETTLING */
 		ath5k_hw_reg_write(ah, ah->ah_turbo ?
-			(ath5k_hw_reg_read(ah, AR5K_PHY(17)) & ~0x7F) | 0x38 :
-			(ath5k_hw_reg_read(ah, AR5K_PHY(17)) & ~0x7F) | 0x1C,
-			AR5K_PHY(17));
+			(ath5k_hw_reg_read(ah, AR5K_PHY_SETTLING) & ~0x7F)
+			| 0x38 :
+			(ath5k_hw_reg_read(ah, AR5K_PHY_SETTLING) & ~0x7F)
+			| 0x1C,
+			AR5K_PHY_SETTLING);
 		/* Set Frame Control Register */
 		ath5k_hw_reg_write(ah, ah->ah_turbo ?
 			(AR5K_PHY_FRAME_CTL_INI | AR5K_PHY_TURBO_MODE |
drivers/net/wireless/ath5k/initvals.c +2 -2
index 04c84e9..2806b21 100644
@@ -489,7 +489,7 @@ static const struct ath5k_ini ar5212_ini[] = {
 	{ AR5K_QUEUE_TXDP(9),	0x00000000 },
 	{ AR5K_DCU_FP,		0x00000000 },
 	{ AR5K_DCU_TXP,		0x00000000 },
-	{ AR5K_DCU_TX_FILTER,	0x00000000 },
+	{ AR5K_DCU_TX_FILTER_0_BASE,	0x00000000 },
 	/* Unknown table */
 	{ 0x1078, 0x00000000 },
 	{ 0x10b8, 0x00000000 },
@@ -679,7 +679,7 @@ static const struct ath5k_ini ar5212_ini[] = {
 	{ AR5K_PHY(645), 0x00106c10 },
 	{ AR5K_PHY(646), 0x009c4060 },
 	{ AR5K_PHY(647), 0x1483800a },
-	/* { AR5K_PHY(648), 0x018830c6 },*/ /* 2413 */
+	/* { AR5K_PHY(648), 0x018830c6 },*/ /* 2413/2425 */
 	{ AR5K_PHY(648), 0x01831061 },
 	{ AR5K_PHY(649), 0x00000400 },
 	/*{ AR5K_PHY(650), 0x000001b5 },*/
drivers/net/wireless/ath5k/reg.h +695 -239

1,510 lines not on this page · raw message

#1 lore raw
Quoted 2 lines · Nick Kossifidis

* Update list of registers
* Use updated register macros inside hw.c and initvals.c

What happened to those patches? Are they going to be applied? Maybe more cleanup is needed?

drivers/net/wireless/ath5k/hw.c int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode, · line 846

Quoted 2 lines
drivers/net/wireless/ath5k/hw.c +1 -1
-			ath5k_hw_reg_write(ah, 0x0002a002, AR5K_PHY(11));
+			ath5k_hw_reg_write(ah, 0x0002a002, 0x982c);

You are replacing macros with numbers in several places. Maybe you could introduce another macro? Or is it the case when you had interpretation of the registers, but now realize that it was wrong?

Signature · 2 lines
Regards,
Pavel Roskin
#2 lore raw
Quoted 7 lines

drivers/net/wireless/ath5k/hw.c int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode, · line 846

Quoted 2 lines
drivers/net/wireless/ath5k/hw.c +1 -1
-                     ath5k_hw_reg_write(ah, 0x0002a002, AR5K_PHY(11));
+                     ath5k_hw_reg_write(ah, 0x0002a002, 0x982c);

You are replacing macros with numbers in several places. Maybe you could introduce another macro? Or is it the case when you had interpretation of the registers, but now realize that it was wrong?

Helps me with rev. engineering, i'll hopefully introduce a macro for these registers soon...

Signature · 3 lines
GPG ID: 0xD21DB2DB
As you read this post global entropy rises. Have Fun ;-)
Nick
#3 lore raw
Quoted 10 lines · Nick Kossifidis
Quoted 7 lines

drivers/net/wireless/ath5k/hw.c int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode, · line 846

Quoted 2 lines
drivers/net/wireless/ath5k/hw.c +1 -1
-                     ath5k_hw_reg_write(ah, 0x0002a002, AR5K_PHY(11));
+                     ath5k_hw_reg_write(ah, 0x0002a002, 0x982c);

You are replacing macros with numbers in several places. Maybe you could introduce another macro? Or is it the case when you had interpretation of the registers, but now realize that it was wrong?

Helps me with rev. engineering, i'll hopefully introduce a macro for these registers soon...

Probably stating the obvious, but ath9k demystifies some of these registers perhaps? I'm not sure how much the phy register location changes each revision, but the bit pattern looks like 0x982c could easily be AR_PHY_ADC_CTL...

Signature · 1 line
Bob Copeland %% www.bobcopeland.com
#4 lore raw

2008/7/25 Bob Copeland <[email protected]>:

Quoted 12 lines · Nick Kossifidis
Quoted 10 lines
Quoted 7 lines

drivers/net/wireless/ath5k/hw.c int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode, · line 846

Quoted 2 lines
drivers/net/wireless/ath5k/hw.c +1 -1
-                     ath5k_hw_reg_write(ah, 0x0002a002, AR5K_PHY(11));
+                     ath5k_hw_reg_write(ah, 0x0002a002, 0x982c);

You are replacing macros with numbers in several places. Maybe you could introduce another macro? Or is it the case when you had interpretation of the registers, but now realize that it was wrong?

Helps me with rev. engineering, i'll hopefully introduce a macro for these registers soon...

Quoted 8 lines

Probably stating the obvious, but ath9k demystifies some of these registers perhaps? I'm not sure how much the phy register location changes each revision, but the bit pattern looks like 0x982c could easily be AR_PHY_ADC_CTL...

--
Bob Copeland %% www.bobcopeland.com

Give me some time on this, I think this patch is ok for now, we can update it in the future...

Signature · 3 lines
GPG ID: 0xD21DB2DB
As you read this post global entropy rises. Have Fun ;-)
Nick
#5 lore raw
In reply to Nick Kossifidis
Quoted 5 lines · Nick Kossifidis

* Update list of registers
* Use updated register macros inside hw.c and initvals.c

Changes-licensed-under: ISC

Nick,

Some of the changes in this patch break the build unless the rest of the series is applied, and those patches can't be applied before applying this one. This breaks git-bisect. Could I trouble you to include the pieces of this patch that break the build into those later patches that fix the build? Or perhaps you can simply split this into a patch that adds new definitions and one that deletes older definitions? The latter could then be applied at the end of the series.

Thanks,

John

Signature · 2 lines
John W. Linville
[email protected]
#6 lore raw

2008/7/29 John W. Linville <[email protected]>:

Quoted 18 lines · Nick Kossifidis
Quoted 5 lines

* Update list of registers
* Use updated register macros inside hw.c and initvals.c

Changes-licensed-under: ISC

Nick,

Some of the changes in this patch break the build unless the rest of the series is applied, and those patches can't be applied before applying this one. This breaks git-bisect. Could I trouble you to include the pieces of this patch that break the build into those later patches that fix the build? Or perhaps you can simply split this into a patch that adds new definitions and one that deletes older definitions? The latter could then be applied at the end of the series.

Quoted 3 lines

Thanks,

John

I'll repost this patch with the changes included in patch 12, then it won't break build ;-)

Signature · 3 lines
GPG ID: 0xD21DB2DB
As you read this post global entropy rises. Have Fun ;-)
Nick
#7 lore raw
In reply to John W. Linville

2008/7/29 John W. Linville <[email protected]>:

Quoted 18 lines · Nick Kossifidis
Quoted 5 lines

* Update list of registers
* Use updated register macros inside hw.c and initvals.c

Changes-licensed-under: ISC

Nick,

Some of the changes in this patch break the build unless the rest of the series is applied, and those patches can't be applied before applying this one. This breaks git-bisect. Could I trouble you to include the pieces of this patch that break the build into those later patches that fix the build? Or perhaps you can simply split this into a patch that adds new definitions and one that deletes older definitions? The latter could then be applied at the end of the series.

Quoted 3 lines

Thanks,

John

Hello John ;-)

Now that i resent the 1st patch that was broken can you please commit the series ? We really need to add RF2425 support in kernel, it'll also help me work easier on ath5k (i won't have to work on top of those patches).

All other patches should be O.K.

Signature · 3 lines
GPG ID: 0xD21DB2DB
As you read this post global entropy rises. Have Fun ;-)
Nick
#8 lore raw

2008/7/31 Nick Kossifidis <[email protected]>:

Quoted 23 lines

2008/7/29 John W. Linville <[email protected]>:

Quoted 18 lines · Nick Kossifidis
Quoted 5 lines

* Update list of registers
* Use updated register macros inside hw.c and initvals.c

Changes-licensed-under: ISC

Nick,

Some of the changes in this patch break the build unless the rest of the series is applied, and those patches can't be applied before applying this one. This breaks git-bisect. Could I trouble you to include the pieces of this patch that break the build into those later patches that fix the build? Or perhaps you can simply split this into a patch that adds new definitions and one that deletes older definitions? The latter could then be applied at the end of the series.

Quoted 3 lines

Thanks,

John

Quoted 9 lines

Hello John ;-)

Now that i resent the 1st patch that was broken can you please commit the series ? We really need to add RF2425 support in kernel, it'll also help me work easier on ath5k (i won't have to work on top of those patches).

All other patches should be O.K.

Thanx a lot ;-)

Signature · 3 lines
GPG ID: 0xD21DB2DB
As you read this post global entropy rises. Have Fun ;-)
Nick
#9 lore raw
In reply to Nick Kossifidis

* Update list of registers
* Use updated register macros inside hw.c, initvals.c and debug.c

Changes-licensed-under: ISC

---

drivers/net/wireless/ath5k/debug.c +1 -1
index 41d5fa3..6fa6c8e 100644
@@ -129,7 +129,7 @@ static struct reg regs[] = {
 	REG_STRUCT_INIT(AR5K_CPC1),
 	REG_STRUCT_INIT(AR5K_CPC2),
 	REG_STRUCT_INIT(AR5K_CPC3),
-	REG_STRUCT_INIT(AR5K_CPCORN),
+	REG_STRUCT_INIT(AR5K_CPCOVF),
 	REG_STRUCT_INIT(AR5K_RESET_CTL),
 	REG_STRUCT_INIT(AR5K_SLEEP_CTL),
 	REG_STRUCT_INIT(AR5K_INTPEND),
drivers/net/wireless/ath5k/hw.c +22 -21

95 lines not on this page · raw message

drivers/net/wireless/ath5k/initvals.c +2 -2
index 04c84e9..2806b21 100644
@@ -489,7 +489,7 @@ static const struct ath5k_ini ar5212_ini[] = {
 	{ AR5K_QUEUE_TXDP(9),	0x00000000 },
 	{ AR5K_DCU_FP,		0x00000000 },
 	{ AR5K_DCU_TXP,		0x00000000 },
-	{ AR5K_DCU_TX_FILTER,	0x00000000 },
+	{ AR5K_DCU_TX_FILTER_0_BASE,	0x00000000 },
 	/* Unknown table */
 	{ 0x1078, 0x00000000 },
 	{ 0x10b8, 0x00000000 },
@@ -679,7 +679,7 @@ static const struct ath5k_ini ar5212_ini[] = {
 	{ AR5K_PHY(645), 0x00106c10 },
 	{ AR5K_PHY(646), 0x009c4060 },
 	{ AR5K_PHY(647), 0x1483800a },
-	/* { AR5K_PHY(648), 0x018830c6 },*/ /* 2413 */
+	/* { AR5K_PHY(648), 0x018830c6 },*/ /* 2413/2425 */
 	{ AR5K_PHY(648), 0x01831061 },
 	{ AR5K_PHY(649), 0x00000400 },
 	/*{ AR5K_PHY(650), 0x000001b5 },*/
drivers/net/wireless/ath5k/reg.h +695 -239

1,510 lines not on this page · raw message