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x86 apic - a few function merge v2

PATCH In review Cyrill Gorcunov 2 participants 4 messages Jul 24, 2008 x86

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Cyrill Gorcunov

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#0 lore raw

cover x86 apic - a few function merge v2

I don't leave hope to merge APIC code someday (now it becomes harder
'cause of new x(2)APIC code). So these patches merges a few functions. No changes on binary level. Please review. Any comments are welcome!

The patches are made on top of -tip tree

commit d55ee73e46e89547aca7ca83a2df80bf70d9d1d1
Merge: 6a807a0... 695a6b4...
Author: Ingo Molnar <[email protected]>
Date: Wed Jul 23 13:21:26 2008 +0200

Merge branch 'cpus4096'

- Cyrill -

author
#2 lore raw

PATCH 2/2 x86: apic unification - merge down enable_NMI_through_LVT0

Signed-off-by Cyrill Gorcunov <[email protected]>

---

No code change on binary level.

arch/x86/kernel/apic_32.c +6 -2
Index: linux-2.6.git/arch/x86/kernel/apic_32.c
===================================================================
@@ -205,11 +205,15 @@ EXPORT_SYMBOL_GPL(apic_ops);
  */
 void __cpuinit enable_NMI_through_LVT0(void)
 {
-	unsigned int v = APIC_DM_NMI;
+	unsigned int v;
+
+	/* unmask and set to NMI */
+	v = APIC_DM_NMI;
 
-	/* Level triggered for 82489DX */
+	/* Level triggered for 82489DX (32bit mode) */
 	if (!lapic_is_integrated())
 		v |= APIC_LVT_LEVEL_TRIGGER;
+
 	apic_write(APIC_LVT0, v);
 }
arch/x86/kernel/apic_64.c +5 -0
Index: linux-2.6.git/arch/x86/kernel/apic_64.c
===================================================================
@@ -220,6 +220,11 @@ void __cpuinit enable_NMI_through_LVT0(v
 
 	/* unmask and set to NMI */
 	v = APIC_DM_NMI;
+
+	/* Level triggered for 82489DX (32bit mode) */
+	if (!lapic_is_integrated())
+		v |= APIC_LVT_LEVEL_TRIGGER;
+
 	apic_write(APIC_LVT0, v);
 }
author
#1 lore raw

PATCH 1/2 x86: apic unification - merge down lapic_get_maxlvt

In reply to Cyrill Gorcunov
Signed-off-by Cyrill Gorcunov <[email protected]>

---

No code change on binary level.

arch/x86/kernel/apic_32.c +6 -2
Index: linux-2.6.git/arch/x86/kernel/apic_32.c
===================================================================
@@ -226,9 +226,13 @@ int get_physical_broadcast(void)
  */
 int lapic_get_maxlvt(void)
 {
-	unsigned int v = apic_read(APIC_LVR);
+	unsigned int v;
 
-	/* 82489DXs do not report # of LVT entries. */
+	v = apic_read(APIC_LVR);
+	/*
+	 * - we always have APIC integrated on 64bit mode
+	 * - 82489DXs do not report # of LVT entries
+	 */
 	return APIC_INTEGRATED(GET_APIC_VERSION(v)) ? GET_APIC_MAXLVT(v) : 2;
 }
arch/x86/kernel/apic_64.c +6 -3
Index: linux-2.6.git/arch/x86/kernel/apic_64.c
===================================================================
@@ -228,11 +228,14 @@ void __cpuinit enable_NMI_through_LVT0(v
  */
 int lapic_get_maxlvt(void)
 {
-	unsigned int v, maxlvt;
+	unsigned int v;
 
 	v = apic_read(APIC_LVR);
-	maxlvt = GET_APIC_MAXLVT(v);
-	return maxlvt;
+	/*
+	 * - we always have APIC integrated on 64bit mode
+	 * - 82489DXs do not report # of LVT entries
+	 */
+	return APIC_INTEGRATED(GET_APIC_VERSION(v)) ? GET_APIC_MAXLVT(v) : 2;
 }
 
 /*
#3 lore raw
In reply to Cyrill Gorcunov
Quoted 3 lines · Cyrill Gorcunov

I don't leave hope to merge APIC code someday (now it becomes harder
'cause of new x(2)APIC code). So these patches merges a few functions. No changes on binary level. Please review. Any comments are welcome!

looks good to me - applied to tip/x86/apic, thanks Cyrill.

Ingo