OpenFirmware support for the spi_mpc83xx driver
Subsystems (7)
cover OpenFirmware support for the spi_mpc83xx driver
Hi all,
The patch series are used to support SPI via the OF SPI subsystem (driver/of/of_spi.c). Now the driver is able to manage its own chip selects, and doesn't need any auxiliary support from the board files or fsl_soc constructors.
The series also contains PowerPC portions of the MMC SPI support.
Since the series touches spi and powerpc trees, I think it would be most convenient to pass it via one of these trees. The patches doesn't touch any SPI functionality, only some probe routines, so I believe powerpc.git is the best candidate...
The other reason for powerpc tree is that the patches depends on other patches as found in paulus/powerpc.git + of_gpio_count() as found here:
http://ozlabs.org/pipermail/linuxppc-dev/2008-December/065917.html
David, if you're OK with the patches, may I ask you to sign off on the ones that touch drivers/spi so that we could pass it via Kumar's powerpc.git?
The queue:
[1/7] powerpc: Implement get_brgfreq() and get_baudrate() stubs [2/7] spi_mpc83xx: Fix sparse warnings
[3/7] spi_mpc83xx: Rework chip selects handling
[4/7] spi_mpc83xx: Add OF platform driver bindings
[5/7] powerpc/fsl_soc: Isolate legacy fsl_spi support to mpc832x_rdb boards [6/7] powerpc: Add mmc-spi-slot bindings
[7/7] powerpc/83xx: Add mmc-spi support via the device tree for MPC8323E-RDB
Thanks,
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Anton Vorontsov email: [email protected] irc://irc.freenode.net/bd2
PATCH 1/7 powerpc: Implement get_brgfreq() and get_baudrate() stubs
In reply to a message not in the archiveThis is needed to not bother with ugly #ifdefs in the drivers.
--- arch/powerpc/sysdev/fsl_soc.h | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-)
arch/powerpc/sysdev/fsl_soc.h +5 -0
@@ -5,8 +5,13 @@#include <asm/mmu.h> extern phys_addr_t get_immrbase (void ); +#if defined(CONFIG_CPM2 ) || defined(CONFIG_QUICC_ENGINE ) || defined(CONFIG_8xx)extern u32 get_brgfreq (void );extern u32 get_baudrate (void ); +#else +static inline u32 get_brgfreq (void ) {return -1 ; } +static inline u32 get_baudrate (void ) {return -1 ; } +#endif extern u32 fsl_get_sys_freq (void );struct spi_board_info ;
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PATCH 2/7 spi_mpc83xx: Fix sparse warnings
In reply to a message not in the archiveThe patch fixes following sparse warnings:
CHECK spi_mpc83xx.c
spi_mpc83xx.c:145:1: warning: symbol 'mpc83xx_spi_rx_buf_u8' was not declared. Should it be static? spi_mpc83xx.c:146:1: warning: symbol 'mpc83xx_spi_rx_buf_u16' was not declared. Should it be static? spi_mpc83xx.c:147:1: warning: symbol 'mpc83xx_spi_rx_buf_u32' was not declared. Should it be static? spi_mpc83xx.c:148:1: warning: symbol 'mpc83xx_spi_tx_buf_u8' was not declared. Should it be static? spi_mpc83xx.c:149:1: warning: symbol 'mpc83xx_spi_tx_buf_u16' was not declared. Should it be static? spi_mpc83xx.c:150:1: warning: symbol 'mpc83xx_spi_tx_buf_u32' was not declared. Should it be static? spi_mpc83xx.c:175:32: warning: incorrect type in initializer (different address spaces)
spi_mpc83xx.c:175:32: expected void *tmp_ptr
spi_mpc83xx.c:175:32: got unsigned int [noderef] <asn:2>*<noident>
spi_mpc83xx.c:183:26: warning: incorrect type in argument 1 (different address spaces)
spi_mpc83xx.c:183:26: expected unsigned int [noderef] [usertype] <asn:2>*reg
spi_mpc83xx.c:183:26: got void *tmp_ptr
spi_mpc83xx.c:184:26: warning: incorrect type in argument 1 (different address spaces)
spi_mpc83xx.c:184:26: expected unsigned int [noderef] [usertype] <asn:2>*reg
spi_mpc83xx.c:184:26: got void *tmp_ptr
spi_mpc83xx.c:287:31: warning: incorrect type in initializer (different address spaces)
spi_mpc83xx.c:287:31: expected void *tmp_ptr
spi_mpc83xx.c:287:31: got unsigned int [noderef] <asn:2>*<noident>
spi_mpc83xx.c:295:25: warning: incorrect type in argument 1 (different address spaces)
spi_mpc83xx.c:295:25: expected unsigned int [noderef] [usertype] <asn:2>*reg
spi_mpc83xx.c:295:25: got void *tmp_ptr
spi_mpc83xx.c:296:25: warning: incorrect type in argument 1 (different address spaces)
spi_mpc83xx.c:296:25: expected unsigned int [noderef] [usertype] <asn:2>*reg
spi_mpc83xx.c:296:25: got void *tmp_ptr
spi_mpc83xx.c:486:13: warning: symbol 'mpc83xx_spi_irq' was not declared. Should it be static?
--- drivers/spi/spi_mpc83xx.c | 16 +++++++++------- 1 files changed, 9 insertions(+), 7 deletions(-)
drivers/spi/spi_mpc83xx.c +9 -7
@@ -123,6 +123,7 @@ static inline u32 mpc83xx_spi_read_reg(__be32 __iomem * reg) }#define MPC83XX_SPI_RX_BUF (type) \ +static \ void mpc83xx_spi_rx_buf_##type(u32 data, struct mpc83xx_spi *mpc83xx_spi) \ { \ type * rx = mpc83xx_spi->rx; \
@@ -131,6 +132,7 @@ void mpc83xx_spi_rx_buf_##type(u32 data, struct mpc83xx_spi *mpc83xx_spi) \ }#define MPC83XX_SPI_TX_BUF (type) \ +static \ u32 mpc83xx_spi_tx_buf_##type(struct mpc83xx_spi *mpc83xx_spi) \ { \ u32 data; \
@@ -172,7 +174,7 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)if (cs->hw_mode != regval) {unsigned long flags; -void *tmp_ptr = &mpc83xx_spi->base->mode; +__be32 __iomem *mode = &mpc83xx_spi->base->mode; regval = cs->hw_mode;/* Turn off IRQs locally to minimize time that
@@ -180,8 +182,8 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)*/ local_irq_save (flags);/* Turn off SPI unit prior changing mode */ -mpc83xx_spi_write_reg (tmp_ptr, regval & ~SPMODE_ENABLE ); -mpc83xx_spi_write_reg (tmp_ptr, regval); +mpc83xx_spi_write_reg (mode, regval & ~SPMODE_ENABLE ); +mpc83xx_spi_write_reg (mode, regval);local_irq_restore (flags); }if (mpc83xx_spi->activate_cs)
@@ -284,7 +286,7 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) regval =mpc83xx_spi_read_reg (&mpc83xx_spi->base->mode);if (cs->hw_mode != regval) {unsigned long flags; -void *tmp_ptr = &mpc83xx_spi->base->mode; +__be32 __iomem *mode = &mpc83xx_spi->base->mode; regval = cs->hw_mode;/* Turn off IRQs locally to minimize time
@@ -292,8 +294,8 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)*/ local_irq_save (flags);/* Turn off SPI unit prior changing mode */ -mpc83xx_spi_write_reg (tmp_ptr, regval & ~SPMODE_ENABLE ); -mpc83xx_spi_write_reg (tmp_ptr, regval); +mpc83xx_spi_write_reg (mode, regval & ~SPMODE_ENABLE ); +mpc83xx_spi_write_reg (mode, regval);local_irq_restore (flags); }return 0 ;
@@ -483,7 +485,7 @@ static int mpc83xx_spi_setup(struct spi_device *spi)return 0 ; } -irqreturn_t mpc83xx_spi_irq (s32 irq,void *context_data) +static irqreturn_t mpc83xx_spi_irq (s32 irq,void *context_data) {struct mpc83xx_spi *mpc83xx_spi = context_data;u32 event;
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PATCH 3/7 spi_mpc83xx: Rework chip selects handling
In reply to a message not in the archiveThe main purpose of this patch is to pass 'struct spi_device' to the chip select handling routines. This is needed so that we could implement full-fledged OpenFirmware support for this driver.
While at it, also:
- Replace two {de,activate}_cs routines by single cs_contol().
- Don't duplicate platform data callbacks in mpc83xx_spi struct.
--- arch/powerpc/platforms/83xx/mpc832x_rdb.c | 16 ++++------------ arch/powerpc/sysdev/fsl_soc.c | 14 ++++++-------- arch/powerpc/sysdev/fsl_soc.h | 5 +++-- drivers/spi/spi_mpc83xx.c | 20 +++++++------------- include/linux/fsl_devices.h | 5 +++-- 5 files changed, 23 insertions(+), 37 deletions(-)
arch/powerpc/platforms/83xx/mpc832x_rdb.c +4 -12
@@ -39,16 +39,10 @@#endif #ifdef CONFIG_QUICC_ENGINE -static void mpc83xx_spi_activate_cs (u8 cs,u8 polarity) +static void mpc83xx_spi_cs_control (struct spi_device *spi,bool on) { -pr_debug ("%s %d %d\n" , __func__, cs, polarity); -par_io_data_set (3 ,13 , polarity); -} - -static void mpc83xx_spi_deactivate_cs (u8 cs,u8 polarity) -{ -pr_debug ("%s %d %d\n" , __func__, cs, polarity); -par_io_data_set (3 ,13 , !polarity); +pr_debug ("%s %d %d\n" , __func__, spi->chip_select, on); +par_io_data_set (3 ,13 , on); } static struct mmc_spi_platform_data mpc832x_mmc_pdata = {
@@ -74,9 +68,7 @@ static int __init mpc832x_spi_init(void)par_io_config_pin (3 ,14 ,2 ,0 ,0 ,0 );/* SD_INSERT, I */ par_io_config_pin (3 ,15 ,2 ,0 ,0 ,0 );/* SD_PROTECT,I */ -return fsl_spi_init (&mpc832x_spi_boardinfo,1 , - mpc83xx_spi_activate_cs, - mpc83xx_spi_deactivate_cs); + return fsl_spi_init(&mpc832x_spi_boardinfo, 1, mpc83xx_spi_cs_control); }machine_device_initcall (mpc832x_rdb, mpc832x_spi_init);#endif /* CONFIG_QUICC_ENGINE */
arch/powerpc/sysdev/fsl_soc.c +6 -8
@@ -601,8 +601,8 @@ arch_initcall(fsl_usb_of_init);static int __init of_fsl_spi_probe (char *type,char *compatible,u32 sysclk,struct spi_board_info *board_infos,unsigned int num_board_infos, -void (*activate_cs)(u8 cs,u8 polarity), -void (*deactivate_cs)(u8 cs,u8 polarity)) +void (*cs_control)(struct spi_device *dev, +bool on)) {struct device_node *np;unsigned int i =0 ;
@@ -614,8 +614,7 @@ static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,struct resource res[2 ];struct platform_device *pdev;struct fsl_spi_platform_data pdata = { - .activate_cs = activate_cs, - .deactivate_cs = deactivate_cs, + .cs_control = cs_control, };memset (res,0 ,sizeof (res));
@@ -682,8 +681,7 @@ next:int __init fsl_spi_init (struct spi_board_info *board_infos,unsigned int num_board_infos, -void (*activate_cs)(u8 cs,u8 polarity), -void (*deactivate_cs)(u8 cs,u8 polarity)) +void (*cs_control)(struct spi_device *spi,bool on)) {u32 sysclk =-1 ;int ret;
@@ -699,10 +697,10 @@ int __init fsl_spi_init(struct spi_board_info *board_infos, } ret =of_fsl_spi_probe (NULL ,"fsl,spi" , sysclk, board_infos, - num_board_infos, activate_cs, deactivate_cs); + num_board_infos, cs_control);if (!ret)of_fsl_spi_probe ("spi" ,"fsl_spi" , sysclk, board_infos, - num_board_infos, activate_cs, deactivate_cs); + num_board_infos, cs_control);return spi_register_board_info (board_infos, num_board_infos); }
arch/powerpc/sysdev/fsl_soc.h +3 -2
@@ -4,6 +4,8 @@#include <asm/mmu.h> +struct spi_device ; +extern phys_addr_t get_immrbase (void );#if defined(CONFIG_CPM2 ) || defined(CONFIG_QUICC_ENGINE ) || defined(CONFIG_8xx)extern u32 get_brgfreq (void );
@@ -19,8 +21,7 @@ struct device_node;extern int fsl_spi_init (struct spi_board_info *board_infos,unsigned int num_board_infos, -void (*activate_cs)(u8 cs,u8 polarity), -void (*deactivate_cs)(u8 cs,u8 polarity)); +void (*cs_control)(struct spi_device *spi,bool on));extern void fsl_rstcr_restart (char *cmd);
drivers/spi/spi_mpc83xx.c +7 -13
@@ -89,9 +89,6 @@ struct mpc83xx_spi {bool qe_mode; -void (*activate_cs) (u8 cs,u8 polarity); -void (*deactivate_cs) (u8 cs,u8 polarity); -u8 busy;struct workqueue_struct *workqueue;
@@ -153,15 +150,14 @@ MPC83XX_SPI_TX_BUF(u32)static void mpc83xx_spi_chipselect (struct spi_device *spi,int value) { -struct mpc83xx_spi *mpc83xx_spi; -u8 pol = spi->mode &SPI_CS_HIGH ?1 :0 ; +struct mpc83xx_spi *mpc83xx_spi =spi_master_get_devdata (spi->master); +struct fsl_spi_platform_data *pdata = spi->dev.parent->platform_data; +bool pol = spi->mode &SPI_CS_HIGH ;struct spi_mpc83xx_cs *cs = spi->controller_state; - mpc83xx_spi =spi_master_get_devdata (spi->master); -if (value ==BITBANG_CS_INACTIVE ) { -if (mpc83xx_spi->deactivate_cs) - mpc83xx_spi->deactivate_cs (spi->chip_select, pol); +if (pdata->cs_control) + pdata->cs_control (spi, !pol); }if (value ==BITBANG_CS_ACTIVE ) {
@@ -186,8 +182,8 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)mpc83xx_spi_write_reg (mode, regval);local_irq_restore (flags); } -if (mpc83xx_spi->activate_cs) - mpc83xx_spi->activate_cs (spi->chip_select, pol); +if (pdata->cs_control) + pdata->cs_control (spi, pol); } }
@@ -582,8 +578,6 @@ static int __init mpc83xx_spi_probe(struct platform_device *dev) master->cleanup = mpc83xx_spi_cleanup; mpc83xx_spi =spi_master_get_devdata (master); - mpc83xx_spi->activate_cs = pdata->activate_cs; - mpc83xx_spi->deactivate_cs = pdata->deactivate_cs; mpc83xx_spi->qe_mode = pdata->qe_mode; mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u8; mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u8;
include/linux/fsl_devices.h +3 -2
@@ -111,14 +111,15 @@ struct fsl_usb2_platform_data {#define FSL_USB2_PORT0_ENABLED 0x00000001#define FSL_USB2_PORT1_ENABLED 0x00000002 +struct spi_device ; +struct fsl_spi_platform_data {u32 initial_spmode;/* initial SPMODE value */ u16 bus_num;bool qe_mode;/* board specific information */ u16 max_chipselect; -void (*activate_cs)(u8 cs,u8 polarity); -void (*deactivate_cs)(u8 cs,u8 polarity); +void (*cs_control)(struct spi_device *spi,bool on);u32 sysclk; };
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PATCH 4/7 spi_mpc83xx: Add OF platform driver bindings
In reply to a message not in the archiveThis patch implements full support for OF SPI bindings. Now the driver can manage its own chip selects without any help from the board files and/or fsl_soc constructors.
The "legacy" code is well isolated and could be removed as time goes by.
--- drivers/spi/spi_mpc83xx.c | 330 ++++++++++++++++++++++++++++++++++++++----- include/linux/fsl_devices.h | 2 +- 2 files changed, 295 insertions(+), 37 deletions(-)
drivers/spi/spi_mpc83xx.c +294 -36
@@ -14,6 +14,8 @@#include <linux/init.h> #include <linux/types.h> #include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/err.h> #include <linux/completion.h> #include <linux/interrupt.h> #include <linux/delay.h>
@@ -23,7 +25,13 @@#include <linux/spi/spi_bitbang.h> #include <linux/platform_device.h> #include <linux/fsl_devices.h> +#include <linux/of.h> +#include <linux/of_platform.h> +#include <linux/gpio.h> +#include <linux/of_gpio.h> +#include <linux/of_spi.h> +#include <sysdev/fsl_soc.h> #include <asm/irq.h> #include <asm/io.h>
@@ -79,7 +87,7 @@ struct mpc83xx_spi {u32 (*get_tx) (struct mpc83xx_spi *);unsigned int count; -int irq; +unsigned int irq;unsigned nsecs;/* (clock cycle time)/2 */
@@ -543,36 +551,23 @@ static void mpc83xx_spi_cleanup(struct spi_device *spi)kfree (spi->controller_state); } -static int __init mpc83xx_spi_probe (struct platform_device *dev) +static struct spi_master *__devinit +mpc83xx_spi_probe (struct device *dev,struct resource *mem,unsigned int irq) { +struct fsl_spi_platform_data *pdata = dev->platform_data;struct spi_master *master;struct mpc83xx_spi *mpc83xx_spi; -struct fsl_spi_platform_data *pdata; -struct resource *r;u32 regval;int ret =0 ; -/* Get resources(memory, IRQ) associated with the device */ - master =spi_alloc_master (&dev->dev,sizeof (struct mpc83xx_spi )); - + master =spi_alloc_master (dev,sizeof (struct mpc83xx_spi ));if (master ==NULL ) { ret = -ENOMEM ; goto err; } -platform_set_drvdata (dev, master); - pdata = dev->dev.platform_data; - -if (pdata ==NULL ) { - ret = -ENODEV ; - goto free_master; - } +dev_set_drvdata (dev, master); - r =platform_get_resource (dev,IORESOURCE_MEM ,0 ); -if (r ==NULL ) { - ret = -ENODEV ; - goto free_master; - } master->setup = mpc83xx_spi_setup; master->transfer = mpc83xx_spi_transfer; master->cleanup = mpc83xx_spi_cleanup;
@@ -592,18 +587,13 @@ static int __init mpc83xx_spi_probe(struct platform_device *dev)init_completion (&mpc83xx_spi->done); - mpc83xx_spi->base =ioremap (r->start, r->end - r->start +1 ); + mpc83xx_spi->base =ioremap (mem->start, mem->end - mem->start +1 );if (mpc83xx_spi->base ==NULL ) { ret = -ENOMEM ; goto put_master; } - mpc83xx_spi->irq =platform_get_irq (dev,0 ); - -if (mpc83xx_spi->irq <0 ) { - ret = -ENXIO ; - goto unmap_io; - } + mpc83xx_spi->irq = irq;/* Register for SPI Interrupt */ ret = request_irq(mpc83xx_spi->irq, mpc83xx_spi_irq,
@@ -645,9 +635,9 @@ static int __init mpc83xx_spi_probe(struct platform_device *dev)printk (KERN_INFO "%s: MPC83xx SPI Controller driver at 0x%p (irq = %d)\n" , - dev->dev.bus_id, mpc83xx_spi->base, mpc83xx_spi->irq); +dev_name (dev), mpc83xx_spi->base, mpc83xx_spi->irq); -return ret; +return master; unreg_master:destroy_workqueue (mpc83xx_spi->workqueue);
@@ -657,18 +647,16 @@ unmap_io:iounmap (mpc83xx_spi->base); put_master:spi_master_put (master); -free_master: -kfree (master); err: -return ret; +return ERR_PTR (ret); } -static int __exit mpc83xx_spi_remove(struct platform_device *dev) +static int __devexit mpc83xx_spi_remove(struct device *dev) {struct mpc83xx_spi *mpc83xx_spi;struct spi_master *master; - master =platform_get_drvdata (dev); + master =dev_get_drvdata (dev); mpc83xx_spi =spi_master_get_devdata (master);flush_workqueue (mpc83xx_spi->workqueue);
@@ -681,23 +669,293 @@ static int __exit mpc83xx_spi_remove(struct platform_device *dev)return 0 ; } +struct mpc83xx_spi_probe_info { +struct fsl_spi_platform_data pdata; +int *gpios; +bool *alow_flags; +}; + +static struct mpc83xx_spi_probe_info * +to_of_pinfo (struct fsl_spi_platform_data *pdata) +{ + return container_of(pdata, struct mpc83xx_spi_probe_info, pdata); +} + +static void mpc83xx_spi_cs_control (struct spi_device *spi,bool on) +{ +struct device *dev = spi->dev.parent; +struct mpc83xx_spi_probe_info *pinfo =to_of_pinfo (dev->platform_data); +u16 cs = spi->chip_select; +int gpio = pinfo->gpios[cs]; +bool alow = pinfo->alow_flags[cs]; + +gpio_set_value (gpio, on ^ alow); +} + +static int of_mpc83xx_spi_get_chipselects (struct device *dev) +{ +struct device_node *np =dev_archdata_get_node (&dev->archdata); +struct fsl_spi_platform_data *pdata = dev->platform_data; +struct mpc83xx_spi_probe_info *pinfo =to_of_pinfo (pdata); +unsigned int ngpios; +int i =0 ; +int ret; + + ngpios =of_gpio_count (np); +if (!ngpios) { +/* +* SPI w/o chip-select line. One SPI device is still permitted +* though. +*/ + pdata->max_chipselect =1 ; +return 0 ; + } + + pinfo->gpios =kmalloc (ngpios *sizeof (pinfo->gpios),GFP_KERNEL ); +if (!pinfo->gpios) +return -ENOMEM ; +memset (pinfo->gpios,-1 , ngpios *sizeof (pinfo->gpios)); + + pinfo->alow_flags =kzalloc (ngpios *sizeof (pinfo->alow_flags), +GFP_KERNEL ); +if (!pinfo->alow_flags) { + ret = -ENOMEM ; + goto err_alloc_flags; + } + +for (; i < ngpios; i++) { +int gpio; +enum of_gpio_flags flags; + + gpio =of_get_gpio_flags (np, i, &flags); +if (!gpio_is_valid (gpio)) { +dev_err (dev,"invalid gpio #%d: %d\n" , i, gpio); + goto err_loop; + } + + ret =gpio_request (gpio,dev_name (dev)); +if (ret) { +dev_err (dev,"can't request gpio #%d: %d\n" , i, ret); + goto err_loop; + } + + pinfo->gpios[i] = gpio; + pinfo->alow_flags[i] = flags &OF_GPIO_ACTIVE_LOW ; + + ret =gpio_direction_output (pinfo->gpios[i], + pinfo->alow_flags[i]); +if (ret) { +dev_err (dev,"can't set output direction for gpio " +"#%d: %d\n" , i, ret); + goto err_loop; + } + } + + pdata->max_chipselect = ngpios; + pdata->cs_control = mpc83xx_spi_cs_control; + +return 0 ; + +err_loop: +while (i >=0 ) { +if (gpio_is_valid (pinfo->gpios[i])) +gpio_free (pinfo->gpios[i]); + i--; + } + +kfree (pinfo->alow_flags); + pinfo->alow_flags =NULL ; +err_alloc_flags: +kfree (pinfo->gpios); + pinfo->gpios =NULL ; +return ret; +} + +static int of_mpc83xx_spi_free_chipselects (struct device *dev) +{ +struct fsl_spi_platform_data *pdata = dev->platform_data; +struct mpc83xx_spi_probe_info *pinfo =to_of_pinfo (pdata); +int i; + +if (!pinfo->gpios) +return 0 ; + +for (i =0 ; i < pdata->max_chipselect; i++) { +if (gpio_is_valid (pinfo->gpios[i])) +gpio_free (pinfo->gpios[i]); + } + +kfree (pinfo->gpios); +kfree (pinfo->alow_flags); +return 0 ; +} + +static int __devinit of_mpc83xx_spi_probe (struct of_device *ofdev, +const struct of_device_id *ofid) +{ +struct device *dev = &ofdev->dev; +struct device_node *np = ofdev->node; +struct mpc83xx_spi_probe_info *pinfo; +struct fsl_spi_platform_data *pdata; +struct spi_master *master; +struct resource mem; +struct resource irq; +const void *prop; +int ret = -ENOMEM ; + + pinfo =kzalloc (sizeof (*pinfo),GFP_KERNEL ); +if (!pinfo) +return -ENOMEM ; + + pdata = &pinfo->pdata; + dev->platform_data = pdata; + +/* Allocate bus num dynamically. */ + pdata->bus_num =-1 ; + +/* SPI controller is either clocked from QE or SoC clock. */ + pdata->sysclk =get_brgfreq (); +if (pdata->sysclk ==-1 ) { + pdata->sysclk =fsl_get_sys_freq (); +if (pdata->sysclk ==-1 ) { + ret = -ENODEV ; + goto err_clk; + } + } + + prop =of_get_property (np,"mode" ,NULL ); +if (prop && !strcmp (prop,"cpu-qe" )) + pdata->qe_mode =1 ; + + ret =of_mpc83xx_spi_get_chipselects (dev); +if (ret) + goto err; + + ret =of_address_to_resource (np,0 , &mem); +if (ret) + goto err; + + ret =of_irq_to_resource (np,0 , &irq); +if (!ret) { + ret = -EINVAL ; + goto err; + } + + master =mpc83xx_spi_probe (dev, &mem, irq.start); +if (IS_ERR (master)) { + ret =PTR_ERR (master); + goto err; + } + +of_register_spi_devices (master, np); + +return 0 ; + +err: +of_mpc83xx_spi_free_chipselects (dev); +err_clk: +kfree (pinfo); +return ret; +} + +static int __devexit of_mpc83xx_spi_remove(struct of_device *ofdev) +{ +int ret; + + ret =mpc83xx_spi_remove (&ofdev->dev); +if (ret) +return ret; +of_mpc83xx_spi_free_chipselects (&ofdev->dev); +return 0 ; +} + +static const struct of_device_id of_mpc83xx_spi_match[] = { + { .compatible ="fsl,spi" }, + {}, +}; +MODULE_DEVICE_TABLE (of, of_mpc83xx_spi_match); + +static struct of_platform_driver of_mpc83xx_spi_driver = { + .name ="mpc83xx_spi" , + .match_table = of_mpc83xx_spi_match, + .probe = of_mpc83xx_spi_probe, + .remove =__devexit_p (of_mpc83xx_spi_remove), +}; + +#ifdef CONFIG_MPC832x_RDB +/* +* XXX XXX XXX +* This is "legacy" platform driver, was used by the MPC8323E-RDB boards +* only. The driver should go away soon, since newer MPC8323E-RDB's device +* tree can work with OpenFirmware driver. But for now we support old trees +* as well. +*/ +static int __devinit plat_mpc83xx_spi_probe (struct platform_device *pdev) +{ +struct resource *mem; +unsigned int irq; +struct spi_master *master; + +if (!pdev->dev.platform_data) +return -EINVAL ; + + mem =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); +if (!mem) +return -EINVAL ; + + irq =platform_get_irq (pdev,0 ); +if (!irq) +return -EINVAL ; + + master =mpc83xx_spi_probe (&pdev->dev, mem, irq); +if (IS_ERR (master)) +return PTR_ERR (master); +return 0 ; +} + +static int __devexit plat_mpc83xx_spi_remove(struct platform_device *pdev) +{ +return mpc83xx_spi_remove (&pdev->dev); +} +MODULE_ALIAS ("platform:mpc83xx_spi" );static struct platform_driver mpc83xx_spi_driver = { - .remove =__exit_p (mpc83xx_spi_remove), + .probe = plat_mpc83xx_spi_probe, + .remove =__exit_p (plat_mpc83xx_spi_remove), .driver = { .name ="mpc83xx_spi" , .owner =THIS_MODULE , }, }; +static bool legacy_driver_failed; + +static void __init legacy_driver_register (void ) +{ + legacy_driver_failed =platform_driver_register (&mpc83xx_spi_driver); +} + +static void __exit legacy_driver_unregister(void) +{ +if (legacy_driver_failed) +return ; +platform_driver_unregister (&mpc83xx_spi_driver); +} +#else +static void __init legacy_driver_register (void ) {} +static void __exit legacy_driver_unregister(void) {} +#endif /* CONFIG_MPC832x_RDB */ +static int __init mpc83xx_spi_init (void ) { -return platform_driver_probe (&mpc83xx_spi_driver, mpc83xx_spi_probe); +legacy_driver_register (); +return of_register_platform_driver (&of_mpc83xx_spi_driver); } static void __exit mpc83xx_spi_exit(void) { -platform_driver_unregister (&mpc83xx_spi_driver); +of_unregister_platform_driver (&of_mpc83xx_spi_driver); +legacy_driver_unregister (); }module_init (mpc83xx_spi_init);
include/linux/fsl_devices.h +1 -1
@@ -115,7 +115,7 @@ struct spi_device;struct fsl_spi_platform_data {u32 initial_spmode;/* initial SPMODE value */ -u16 bus_num; +s16 bus_num;bool qe_mode;/* board specific information */ u16 max_chipselect;
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PATCH 5/7 powerpc/fsl_soc: Isolate legacy fsl_spi support to mpc832x_rdb boards
In reply to a message not in the archiveThe advantages of this:
- Don't encourage legacy support;
- Less external symbols, less code to compile-in for !MPC832x_RDB platforms.
--- arch/powerpc/platforms/83xx/mpc832x_rdb.c | 107 +++++++++++++++++++++++++++++ arch/powerpc/sysdev/fsl_soc.c | 107 ----------------------------- arch/powerpc/sysdev/fsl_soc.h | 4 - 3 files changed, 107 insertions(+), 111 deletions(-)
arch/powerpc/platforms/83xx/mpc832x_rdb.c +107 -0
@@ -20,6 +20,7 @@#include <linux/spi/mmc_spi.h> #include <linux/mmc/host.h> #include <linux/of_platform.h> +#include <linux/fsl_devices.h> #include <asm/time.h> #include <asm/ipic.h>
@@ -39,6 +40,112 @@#endif #ifdef CONFIG_QUICC_ENGINE +static int __init of_fsl_spi_probe (char *type,char *compatible,u32 sysclk, +struct spi_board_info *board_infos, +unsigned int num_board_infos, +void (*cs_control)(struct spi_device *dev, +bool on)) +{ +struct device_node *np; +unsigned int i =0 ; + +for_each_compatible_node (np, type, compatible) { +int ret; +unsigned int j; +const void *prop; +struct resource res[2 ]; +struct platform_device *pdev; +struct fsl_spi_platform_data pdata = { + .cs_control = cs_control, + }; + +memset (res,0 ,sizeof (res)); + + pdata.sysclk = sysclk; + + prop =of_get_property (np,"reg" ,NULL ); +if (!prop) + goto err; + pdata.bus_num = *(u32 *)prop; + + prop =of_get_property (np,"cell-index" ,NULL ); +if (prop) + i = *(u32 *)prop; + + prop =of_get_property (np,"mode" ,NULL ); +if (prop && !strcmp (prop,"cpu-qe" )) + pdata.qe_mode =1 ; + +for (j =0 ; j < num_board_infos; j++) { +if (board_infos[j].bus_num == pdata.bus_num) + pdata.max_chipselect++; + } + +if (!pdata.max_chipselect) +continue ; + + ret =of_address_to_resource (np,0 , &res[0 ]); +if (ret) + goto err; + + ret =of_irq_to_resource (np,0 , &res[1 ]); +if (ret ==NO_IRQ ) + goto err; + + pdev =platform_device_alloc ("mpc83xx_spi" , i); +if (!pdev) + goto err; + + ret =platform_device_add_data (pdev, &pdata,sizeof (pdata)); +if (ret) + goto unreg; + + ret =platform_device_add_resources (pdev, res, +ARRAY_SIZE (res)); +if (ret) + goto unreg; + + ret =platform_device_add (pdev); +if (ret) + goto unreg; + + goto next; +unreg: +platform_device_del (pdev); +err: +pr_err ("%s: registration failed\n" , np->full_name); +next: + i++; + } + +return i; +} + +static int __init fsl_spi_init (struct spi_board_info *board_infos, +unsigned int num_board_infos, +void (*cs_control)(struct spi_device *spi, +bool on)) +{ +u32 sysclk =-1 ; +int ret; + +/* SPI controller is either clocked from QE or SoC clock */ + sysclk =get_brgfreq (); +if (sysclk ==-1 ) { + sysclk =fsl_get_sys_freq (); +if (sysclk ==-1 ) +return -ENODEV ; + } + + ret =of_fsl_spi_probe (NULL ,"fsl,spi" , sysclk, board_infos, + num_board_infos, cs_control); +if (!ret) +of_fsl_spi_probe ("spi" ,"fsl_spi" , sysclk, board_infos, + num_board_infos, cs_control); + +return spi_register_board_info (board_infos, num_board_infos); +} +static void mpc83xx_spi_cs_control (struct spi_device *spi,bool on) {pr_debug ("%s %d %d\n" , __func__, spi->chip_select, on);
arch/powerpc/sysdev/fsl_soc.c +0 -107
113 lines not on this page · raw message
arch/powerpc/sysdev/fsl_soc.h +0 -4
@@ -19,10 +19,6 @@ extern u32 fsl_get_sys_freq(void);struct spi_board_info ;struct device_node ; -extern int fsl_spi_init (struct spi_board_info *board_infos, -unsigned int num_board_infos, -void (*cs_control)(struct spi_device *spi,bool on)); -extern void fsl_rstcr_restart (char *cmd);#if defined(CONFIG_FB_FSL_DIU ) || defined(CONFIG_FB_FSL_DIU_MODULE )
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PATCH 6/7 powerpc: Add mmc-spi-slot bindings
In reply to a message not in the archiveThe bindings describes a case where MMC/SD/SDIO slot directly connected to a SPI bus. Such setups are widely used on embedded PowerPC boards.
The patch also adds the mmc-spi-slot entry to the OpenFirmware modalias table.
--- .../powerpc/dts-bindings/mmc-spi-slot.txt | 23 ++++++++++++++++++++ drivers/of/base.c | 1 + 2 files changed, 24 insertions(+), 0 deletions(-) create mode 100644 Documentation/powerpc/dts-bindings/mmc-spi-slot.txt
Documentation/powerpc/dts-bindings/mmc-spi-slot.txt new file +23 -0
@@ -0,0 +1,23 @@ +MMC/SD/SDIO slot directly connected to a SPI bus + +Required properties: +- compatible : should be "mmc-spi-slot". +- reg : should specify SPI address (chip-select number). +- spi-max-frequency : maximum frequency for this device (Hz). +- voltage-ranges : two cells are required, first cell specifies minimum + slot voltage (mV), second cell specifies maximum slot voltage (mV). + Several ranges could be specified. +- gpios : (optional) may specify GPIOs in this order: Card-Detect GPIO, + Write-Protect GPIO. + +Example: + + mmc-slot@0 { + compatible = "fsl,mpc8323rdb-mmc-slot", + "mmc-spi-slot"; + reg = <0>; + gpios = <&qe_pio_d 14 1 + &qe_pio_d 15 0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <50000000>; + };
drivers/of/base.c +1 -0
@@ -446,6 +446,7 @@ struct of_modalias_table { };static struct of_modalias_table of_modalias_table[] = { {"fsl,mcu-mpc8349emitx" ,"mcu-mpc8349emitx" }, + {"mmc-spi-slot" ,"mmc_spi" }, };/**
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PATCH 7/7 powerpc/83xx: Add mmc-spi support via the device tree for MPC8323E-RDB
In reply to a message not in the archive- Add gpio-controller node to manage QE GPIO Bank D;
- Add mmc-spi node;
- Modify board file so that it won't use legacy SPI support with the new device trees.
--- arch/powerpc/boot/dts/mpc832x_rdb.dts | 24 ++++++++++++++++++++++++ arch/powerpc/platforms/83xx/mpc832x_rdb.c | 6 ++++++ 2 files changed, 30 insertions(+), 0 deletions(-)
arch/powerpc/boot/dts/mpc832x_rdb.dts +24 -0
@@ -152,10 +152,21 @@ }; par_io@1400 { + #address-cells = <1>; + #size-cells = <1>; reg = <0x1400 0x100>; + ranges = <3 0x1448 0x18>; + compatible = "fsl,mpc8323-qe-pario"; device_type = "par_io"; num-ports = <7>; + qe_pio_d: gpio-controller@1448 { + #gpio-cells = <2>; + compatible = "fsl,mpc8323-qe-pario-bank"; + reg = <3 0x18>; + gpio-controller; + }; + ucc2pio:ucc_pin@02 { pio-map = < /* port pin dir open_drain assignment has_irq */
@@ -225,12 +236,25 @@ }; spi@4c0 { + #address-cells = <1>; + #size-cells = <0>; cell-index = <0>; compatible = "fsl,spi"; reg = <0x4c0 0x40>; interrupts = <2>; interrupt-parent = <&qeic>; + gpios = <&qe_pio_d 13 0>; mode = "cpu-qe"; + + mmc-slot@0 { + compatible = "fsl,mpc8323rdb-mmc-slot", + "mmc-spi-slot"; + reg = <0>; + gpios = <&qe_pio_d 14 1 + &qe_pio_d 15 0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <50000000>; + }; }; spi@500 {
arch/powerpc/platforms/83xx/mpc832x_rdb.c +6 -0
@@ -175,6 +175,12 @@ static int __init mpc832x_spi_init(void)par_io_config_pin (3 ,14 ,2 ,0 ,0 ,0 );/* SD_INSERT, I */ par_io_config_pin (3 ,15 ,2 ,0 ,0 ,0 );/* SD_PROTECT,I */ +/* +* Don't bother with legacy stuff when device tree contains +* mmc-spi-slot node. +*/ +if (of_find_compatible_node (NULL ,NULL ,"mmc-spi-slot" )) +return 0 ;return fsl_spi_init (&mpc832x_spi_boardinfo,1 , mpc83xx_spi_cs_control); }machine_device_initcall (mpc832x_rdb, mpc832x_spi_init);
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Kumar Gala
AppliedRe: [PATCH 1/7] powerpc: Implement get_brgfreq() and get_baudrate() stubs
In reply to Anton VorontsovQuoted 6 lines · Anton Vorontsov
This is needed to not bother with ugly #ifdefs in the drivers.
Signed-off-by Anton Vorontsov <[email protected]>---
arch/powerpc/sysdev/fsl_soc.h| 5 +++++1 files changed, 5 insertions(+), 0 deletions(-)
applied to next
- k
Quoted 14 lines · Anton Vorontsov
Hi all,
The patch series are used to support SPI via the OF SPI subsystem (
driver/of/of_spi.c). Now the driver is able to manage its own chip selects, and doesn't need any auxiliary support from the board files orfsl_socconstructors.The series also contains PowerPC portions of the MMC SPI support.
Since the series touches spi and powerpc trees, I think it would be most convenient to pass it via one of these trees. The patches doesn't touch any SPI functionality, only some probe routines, so I believe powerpc.git is the best candidate...
Quoted 8 lines
The other reason for powerpc tree is that the patches depends on other patches as found in paulus/powerpc.git +
of_gpio_count()as found here:
http://ozlabs.org/pipermail/linuxppc-dev/2008-December/065917.htmlDavid, if you're OK with the patches, may I ask you to sign off on the ones that touch
drivers/spiso that we could pass it via Kumar's powerpc.git?
David, I'm sorry for bothering you, but have you had a chance to look into this patch set?
Thanks,
Quoted 9 lines
The queue:
[1/7] powerpc: Implement
get_brgfreq()andget_baudrate()stubs [2/7]spi_mpc83xx: Fix sparse warnings
[3/7]spi_mpc83xx: Rework chip selects handling
[4/7]spi_mpc83xx: Add OF platform driver bindings
[5/7] powerpc/fsl_soc: Isolate legacyfsl_spisupport tompc832x_rdbboards [6/7] powerpc: Add mmc-spi-slot bindings
[7/7] powerpc/83xx: Add mmc-spi support via the device tree for MPC8323E-RDB
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Quoted 35 lines · Anton Vorontsov
Hi all,
The patch series are used to support SPI via the OF SPI subsystem (
driver/of/of_spi.c). Now the driver is able to manage its own chip selects, and doesn't need any auxiliary support from the board files orfsl_socconstructors.The series also contains PowerPC portions of the MMC SPI support.
Since the series touches spi and powerpc trees, I think it would be most convenient to pass it via one of these trees. The patches doesn't touch any SPI functionality, only some probe routines, so I believe powerpc.git is the best candidate...
The other reason for powerpc tree is that the patches depends on other patches as found in paulus/powerpc.git +
of_gpio_count()as found here:
http://ozlabs.org/pipermail/linuxppc-dev/2008-December/065917.htmlDavid, if you're OK with the patches, may I ask you to sign off on the ones that touch
drivers/spiso that we could pass it via Kumar's powerpc.git?The queue:
[1/7] powerpc: Implement
get_brgfreq()andget_baudrate()stubs [2/7]spi_mpc83xx: Fix sparse warnings
[3/7]spi_mpc83xx: Rework chip selects handling
[4/7]spi_mpc83xx: Add OF platform driver bindings
[5/7] powerpc/fsl_soc: Isolate legacyfsl_spisupport tompc832x_rdbboards
[6/7] powerpc: Add mmc-spi-slot bindings
[7/7] powerpc/83xx: Add mmc-spi support via the device tree for MPC8323E-RDB
Quoted 6 lines
Thanks,
Signature · 3 lines
Anton Vorontsov email: [email protected] irc://irc.freenode.net/bd2
David,
Any status on these patches?
- k
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cover OpenFirmware support for the spi_mpc83xx driver
Quoted 37 lines · Kumar Gala
Quoted 25 lines · Anton Vorontsov
Hi all,
The patch series are used to support SPI via the OF SPI subsystem (
driver/of/of_spi.c). Now the driver is able to manage its own chip selects, and doesn't need any auxiliary support from the board files orfsl_socconstructors.The series also contains PowerPC portions of the MMC SPI support.
Since the series touches spi and powerpc trees, I think it would be most convenient to pass it via one of these trees. The patches doesn't touch any SPI functionality, only some probe routines, so I believe powerpc.git is the best candidate...
The other reason for powerpc tree is that the patches depends on other patches as found in paulus/powerpc.git +
of_gpio_count()as found here:
http://ozlabs.org/pipermail/linuxppc-dev/2008-December/065917.htmlDavid, if you're OK with the patches, may I ask you to sign off on the ones that touch
drivers/spiso that we could pass it via Kumar's powerpc.git?The queue:
Quoted 10 lines
[1/7] powerpc: Implement
get_brgfreq()andget_baudrate()stubs [2/7]spi_mpc83xx: Fix sparse warnings
[3/7]spi_mpc83xx: Rework chip selects handling
[4/7]spi_mpc83xx: Add OF platform driver bindings
[5/7] powerpc/fsl_soc: Isolate legacyfsl_spisupport tompc832x_rdbboards
[6/7] powerpc: Add mmc-spi-slot bindings
[7/7] powerpc/83xx: Add mmc-spi support via the device tree for MPC8323E-RDB
Quoted 3 lines
David,
Any status on these patches?
Ping? No single comment on this patch set for ~2 months...
Resending...
Thanks,
Signature · 9 lines
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PATCH 1/6 spi_mpc83xx: Fix sparse warnings
The patch fixes following sparse warnings:
CHECK spi_mpc83xx.c
spi_mpc83xx.c:145:1: warning: symbol 'mpc83xx_spi_rx_buf_u8' was not declared. Should it be static? spi_mpc83xx.c:146:1: warning: symbol 'mpc83xx_spi_rx_buf_u16' was not declared. Should it be static? spi_mpc83xx.c:147:1: warning: symbol 'mpc83xx_spi_rx_buf_u32' was not declared. Should it be static? spi_mpc83xx.c:148:1: warning: symbol 'mpc83xx_spi_tx_buf_u8' was not declared. Should it be static? spi_mpc83xx.c:149:1: warning: symbol 'mpc83xx_spi_tx_buf_u16' was not declared. Should it be static? spi_mpc83xx.c:150:1: warning: symbol 'mpc83xx_spi_tx_buf_u32' was not declared. Should it be static? spi_mpc83xx.c:175:32: warning: incorrect type in initializer (different address spaces)
spi_mpc83xx.c:175:32: expected void *tmp_ptr
spi_mpc83xx.c:175:32: got unsigned int [noderef] <asn:2>*<noident>
spi_mpc83xx.c:183:26: warning: incorrect type in argument 1 (different address spaces)
spi_mpc83xx.c:183:26: expected unsigned int [noderef] [usertype] <asn:2>*reg
spi_mpc83xx.c:183:26: got void *tmp_ptr
spi_mpc83xx.c:184:26: warning: incorrect type in argument 1 (different address spaces)
spi_mpc83xx.c:184:26: expected unsigned int [noderef] [usertype] <asn:2>*reg
spi_mpc83xx.c:184:26: got void *tmp_ptr
spi_mpc83xx.c:287:31: warning: incorrect type in initializer (different address spaces)
spi_mpc83xx.c:287:31: expected void *tmp_ptr
spi_mpc83xx.c:287:31: got unsigned int [noderef] <asn:2>*<noident>
spi_mpc83xx.c:295:25: warning: incorrect type in argument 1 (different address spaces)
spi_mpc83xx.c:295:25: expected unsigned int [noderef] [usertype] <asn:2>*reg
spi_mpc83xx.c:295:25: got void *tmp_ptr
spi_mpc83xx.c:296:25: warning: incorrect type in argument 1 (different address spaces)
spi_mpc83xx.c:296:25: expected unsigned int [noderef] [usertype] <asn:2>*reg
spi_mpc83xx.c:296:25: got void *tmp_ptr
spi_mpc83xx.c:486:13: warning: symbol 'mpc83xx_spi_irq' was not declared. Should it be static?
--- drivers/spi/spi_mpc83xx.c | 16 +++++++++------- 1 files changed, 9 insertions(+), 7 deletions(-)
drivers/spi/spi_mpc83xx.c +9 -7
@@ -123,6 +123,7 @@ static inline u32 mpc83xx_spi_read_reg(__be32 __iomem * reg) }#define MPC83XX_SPI_RX_BUF (type) \ +static \ void mpc83xx_spi_rx_buf_##type(u32 data, struct mpc83xx_spi *mpc83xx_spi) \ { \ type * rx = mpc83xx_spi->rx; \
@@ -131,6 +132,7 @@ void mpc83xx_spi_rx_buf_##type(u32 data, struct mpc83xx_spi *mpc83xx_spi) \ }#define MPC83XX_SPI_TX_BUF (type) \ +static \ u32 mpc83xx_spi_tx_buf_##type(struct mpc83xx_spi *mpc83xx_spi) \ { \ u32 data; \
@@ -172,7 +174,7 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)if (cs->hw_mode != regval) {unsigned long flags; -void *tmp_ptr = &mpc83xx_spi->base->mode; +__be32 __iomem *mode = &mpc83xx_spi->base->mode; regval = cs->hw_mode;/* Turn off IRQs locally to minimize time that
@@ -180,8 +182,8 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)*/ local_irq_save (flags);/* Turn off SPI unit prior changing mode */ -mpc83xx_spi_write_reg (tmp_ptr, regval & ~SPMODE_ENABLE ); -mpc83xx_spi_write_reg (tmp_ptr, regval); +mpc83xx_spi_write_reg (mode, regval & ~SPMODE_ENABLE ); +mpc83xx_spi_write_reg (mode, regval);local_irq_restore (flags); }if (mpc83xx_spi->activate_cs)
@@ -284,7 +286,7 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) regval =mpc83xx_spi_read_reg (&mpc83xx_spi->base->mode);if (cs->hw_mode != regval) {unsigned long flags; -void *tmp_ptr = &mpc83xx_spi->base->mode; +__be32 __iomem *mode = &mpc83xx_spi->base->mode; regval = cs->hw_mode;/* Turn off IRQs locally to minimize time
@@ -292,8 +294,8 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t)*/ local_irq_save (flags);/* Turn off SPI unit prior changing mode */ -mpc83xx_spi_write_reg (tmp_ptr, regval & ~SPMODE_ENABLE ); -mpc83xx_spi_write_reg (tmp_ptr, regval); +mpc83xx_spi_write_reg (mode, regval & ~SPMODE_ENABLE ); +mpc83xx_spi_write_reg (mode, regval);local_irq_restore (flags); }return 0 ;
@@ -483,7 +485,7 @@ static int mpc83xx_spi_setup(struct spi_device *spi)return 0 ; } -irqreturn_t mpc83xx_spi_irq (s32 irq,void *context_data) +static irqreturn_t mpc83xx_spi_irq (s32 irq,void *context_data) {struct mpc83xx_spi *mpc83xx_spi = context_data;u32 event;
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PATCH 2/6 spi_mpc83xx: Rework chip selects handling
In reply to Anton VorontsovThe main purpose of this patch is to pass 'struct spi_device' to the chip select handling routines. This is needed so that we could implement full-fledged OpenFirmware support for this driver.
While at it, also:
- Replace two {de,activate}_cs routines by single cs_contol().
- Don't duplicate platform data callbacks in mpc83xx_spi struct.
--- arch/powerpc/platforms/83xx/mpc832x_rdb.c | 16 ++++------------ arch/powerpc/sysdev/fsl_soc.c | 14 ++++++-------- arch/powerpc/sysdev/fsl_soc.h | 5 +++-- drivers/spi/spi_mpc83xx.c | 20 +++++++------------- include/linux/fsl_devices.h | 5 +++-- 5 files changed, 23 insertions(+), 37 deletions(-)
arch/powerpc/platforms/83xx/mpc832x_rdb.c +4 -12
@@ -39,16 +39,10 @@#endif #ifdef CONFIG_QUICC_ENGINE -static void mpc83xx_spi_activate_cs (u8 cs,u8 polarity) +static void mpc83xx_spi_cs_control (struct spi_device *spi,bool on) { -pr_debug ("%s %d %d\n" , __func__, cs, polarity); -par_io_data_set (3 ,13 , polarity); -} - -static void mpc83xx_spi_deactivate_cs (u8 cs,u8 polarity) -{ -pr_debug ("%s %d %d\n" , __func__, cs, polarity); -par_io_data_set (3 ,13 , !polarity); +pr_debug ("%s %d %d\n" , __func__, spi->chip_select, on); +par_io_data_set (3 ,13 , on); } static struct mmc_spi_platform_data mpc832x_mmc_pdata = {
@@ -74,9 +68,7 @@ static int __init mpc832x_spi_init(void)par_io_config_pin (3 ,14 ,2 ,0 ,0 ,0 );/* SD_INSERT, I */ par_io_config_pin (3 ,15 ,2 ,0 ,0 ,0 );/* SD_PROTECT,I */ -return fsl_spi_init (&mpc832x_spi_boardinfo,1 , - mpc83xx_spi_activate_cs, - mpc83xx_spi_deactivate_cs); + return fsl_spi_init(&mpc832x_spi_boardinfo, 1, mpc83xx_spi_cs_control); }machine_device_initcall (mpc832x_rdb, mpc832x_spi_init);#endif /* CONFIG_QUICC_ENGINE */
arch/powerpc/sysdev/fsl_soc.c +6 -8
@@ -416,8 +416,8 @@ arch_initcall(fsl_usb_of_init);static int __init of_fsl_spi_probe (char *type,char *compatible,u32 sysclk,struct spi_board_info *board_infos,unsigned int num_board_infos, -void (*activate_cs)(u8 cs,u8 polarity), -void (*deactivate_cs)(u8 cs,u8 polarity)) +void (*cs_control)(struct spi_device *dev, +bool on)) {struct device_node *np;unsigned int i =0 ;
@@ -429,8 +429,7 @@ static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,struct resource res[2 ];struct platform_device *pdev;struct fsl_spi_platform_data pdata = { - .activate_cs = activate_cs, - .deactivate_cs = deactivate_cs, + .cs_control = cs_control, };memset (res,0 ,sizeof (res));
@@ -497,8 +496,7 @@ next:int __init fsl_spi_init (struct spi_board_info *board_infos,unsigned int num_board_infos, -void (*activate_cs)(u8 cs,u8 polarity), -void (*deactivate_cs)(u8 cs,u8 polarity)) +void (*cs_control)(struct spi_device *spi,bool on)) {u32 sysclk =-1 ;int ret;
@@ -514,10 +512,10 @@ int __init fsl_spi_init(struct spi_board_info *board_infos, } ret =of_fsl_spi_probe (NULL ,"fsl,spi" , sysclk, board_infos, - num_board_infos, activate_cs, deactivate_cs); + num_board_infos, cs_control);if (!ret)of_fsl_spi_probe ("spi" ,"fsl_spi" , sysclk, board_infos, - num_board_infos, activate_cs, deactivate_cs); + num_board_infos, cs_control);return spi_register_board_info (board_infos, num_board_infos); }
arch/powerpc/sysdev/fsl_soc.h +3 -2
@@ -4,6 +4,8 @@#include <asm/mmu.h> +struct spi_device ; +extern phys_addr_t get_immrbase (void );#if defined(CONFIG_CPM2 ) || defined(CONFIG_QUICC_ENGINE ) || defined(CONFIG_8xx)extern u32 get_brgfreq (void );
@@ -19,8 +21,7 @@ struct device_node;extern int fsl_spi_init (struct spi_board_info *board_infos,unsigned int num_board_infos, -void (*activate_cs)(u8 cs,u8 polarity), -void (*deactivate_cs)(u8 cs,u8 polarity)); +void (*cs_control)(struct spi_device *spi,bool on));extern void fsl_rstcr_restart (char *cmd);
drivers/spi/spi_mpc83xx.c +7 -13
@@ -89,9 +89,6 @@ struct mpc83xx_spi {bool qe_mode; -void (*activate_cs) (u8 cs,u8 polarity); -void (*deactivate_cs) (u8 cs,u8 polarity); -u8 busy;struct workqueue_struct *workqueue;
@@ -153,15 +150,14 @@ MPC83XX_SPI_TX_BUF(u32)static void mpc83xx_spi_chipselect (struct spi_device *spi,int value) { -struct mpc83xx_spi *mpc83xx_spi; -u8 pol = spi->mode &SPI_CS_HIGH ?1 :0 ; +struct mpc83xx_spi *mpc83xx_spi =spi_master_get_devdata (spi->master); +struct fsl_spi_platform_data *pdata = spi->dev.parent->platform_data; +bool pol = spi->mode &SPI_CS_HIGH ;struct spi_mpc83xx_cs *cs = spi->controller_state; - mpc83xx_spi =spi_master_get_devdata (spi->master); -if (value ==BITBANG_CS_INACTIVE ) { -if (mpc83xx_spi->deactivate_cs) - mpc83xx_spi->deactivate_cs (spi->chip_select, pol); +if (pdata->cs_control) + pdata->cs_control (spi, !pol); }if (value ==BITBANG_CS_ACTIVE ) {
@@ -186,8 +182,8 @@ static void mpc83xx_spi_chipselect(struct spi_device *spi, int value)mpc83xx_spi_write_reg (mode, regval);local_irq_restore (flags); } -if (mpc83xx_spi->activate_cs) - mpc83xx_spi->activate_cs (spi->chip_select, pol); +if (pdata->cs_control) + pdata->cs_control (spi, pol); } }
@@ -582,8 +578,6 @@ static int __init mpc83xx_spi_probe(struct platform_device *dev) master->cleanup = mpc83xx_spi_cleanup; mpc83xx_spi =spi_master_get_devdata (master); - mpc83xx_spi->activate_cs = pdata->activate_cs; - mpc83xx_spi->deactivate_cs = pdata->deactivate_cs; mpc83xx_spi->qe_mode = pdata->qe_mode; mpc83xx_spi->get_rx = mpc83xx_spi_rx_buf_u8; mpc83xx_spi->get_tx = mpc83xx_spi_tx_buf_u8;
include/linux/fsl_devices.h +3 -2
@@ -95,14 +95,15 @@ struct fsl_usb2_platform_data {#define FSL_USB2_PORT0_ENABLED 0x00000001#define FSL_USB2_PORT1_ENABLED 0x00000002 +struct spi_device ; +struct fsl_spi_platform_data {u32 initial_spmode;/* initial SPMODE value */ u16 bus_num;bool qe_mode;/* board specific information */ u16 max_chipselect; -void (*activate_cs)(u8 cs,u8 polarity); -void (*deactivate_cs)(u8 cs,u8 polarity); +void (*cs_control)(struct spi_device *spi,bool on);u32 sysclk; };
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1.5.6.5 ------------------------------------------------------------------------------ This SF.net email is sponsored by: SourcForge Community SourceForge wants to tell your story. http://p.sf.net/sfu/sf-spreadtheword
PATCH 3/6 spi_mpc83xx: Add OF platform driver bindings
In reply to Anton VorontsovThis patch implements full support for OF SPI bindings. Now the driver can manage its own chip selects without any help from the board files and/or fsl_soc constructors.
The "legacy" code is well isolated and could be removed as time goes by.
--- drivers/spi/spi_mpc83xx.c | 330 ++++++++++++++++++++++++++++++++++++++----- include/linux/fsl_devices.h | 2 +- 2 files changed, 295 insertions(+), 37 deletions(-)
drivers/spi/spi_mpc83xx.c +294 -36
@@ -14,6 +14,8 @@#include <linux/init.h> #include <linux/types.h> #include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/err.h> #include <linux/completion.h> #include <linux/interrupt.h> #include <linux/delay.h>
@@ -23,7 +25,13 @@#include <linux/spi/spi_bitbang.h> #include <linux/platform_device.h> #include <linux/fsl_devices.h> +#include <linux/of.h> +#include <linux/of_platform.h> +#include <linux/gpio.h> +#include <linux/of_gpio.h> +#include <linux/of_spi.h> +#include <sysdev/fsl_soc.h> #include <asm/irq.h> #include <asm/io.h>
@@ -79,7 +87,7 @@ struct mpc83xx_spi {u32 (*get_tx) (struct mpc83xx_spi *);unsigned int count; -int irq; +unsigned int irq;unsigned nsecs;/* (clock cycle time)/2 */
@@ -543,36 +551,23 @@ static void mpc83xx_spi_cleanup(struct spi_device *spi)kfree (spi->controller_state); } -static int __init mpc83xx_spi_probe (struct platform_device *dev) +static struct spi_master *__devinit +mpc83xx_spi_probe (struct device *dev,struct resource *mem,unsigned int irq) { +struct fsl_spi_platform_data *pdata = dev->platform_data;struct spi_master *master;struct mpc83xx_spi *mpc83xx_spi; -struct fsl_spi_platform_data *pdata; -struct resource *r;u32 regval;int ret =0 ; -/* Get resources(memory, IRQ) associated with the device */ - master =spi_alloc_master (&dev->dev,sizeof (struct mpc83xx_spi )); - + master =spi_alloc_master (dev,sizeof (struct mpc83xx_spi ));if (master ==NULL ) { ret = -ENOMEM ; goto err; } -platform_set_drvdata (dev, master); - pdata = dev->dev.platform_data; - -if (pdata ==NULL ) { - ret = -ENODEV ; - goto free_master; - } +dev_set_drvdata (dev, master); - r =platform_get_resource (dev,IORESOURCE_MEM ,0 ); -if (r ==NULL ) { - ret = -ENODEV ; - goto free_master; - } master->setup = mpc83xx_spi_setup; master->transfer = mpc83xx_spi_transfer; master->cleanup = mpc83xx_spi_cleanup;
@@ -592,18 +587,13 @@ static int __init mpc83xx_spi_probe(struct platform_device *dev)init_completion (&mpc83xx_spi->done); - mpc83xx_spi->base =ioremap (r->start, r->end - r->start +1 ); + mpc83xx_spi->base =ioremap (mem->start, mem->end - mem->start +1 );if (mpc83xx_spi->base ==NULL ) { ret = -ENOMEM ; goto put_master; } - mpc83xx_spi->irq =platform_get_irq (dev,0 ); - -if (mpc83xx_spi->irq <0 ) { - ret = -ENXIO ; - goto unmap_io; - } + mpc83xx_spi->irq = irq;/* Register for SPI Interrupt */ ret = request_irq(mpc83xx_spi->irq, mpc83xx_spi_irq,
@@ -645,9 +635,9 @@ static int __init mpc83xx_spi_probe(struct platform_device *dev)printk (KERN_INFO "%s: MPC83xx SPI Controller driver at 0x%p (irq = %d)\n" , - dev->dev.bus_id, mpc83xx_spi->base, mpc83xx_spi->irq); +dev_name (dev), mpc83xx_spi->base, mpc83xx_spi->irq); -return ret; +return master; unreg_master:destroy_workqueue (mpc83xx_spi->workqueue);
@@ -657,18 +647,16 @@ unmap_io:iounmap (mpc83xx_spi->base); put_master:spi_master_put (master); -free_master: -kfree (master); err: -return ret; +return ERR_PTR (ret); } -static int __exit mpc83xx_spi_remove(struct platform_device *dev) +static int __devexit mpc83xx_spi_remove(struct device *dev) {struct mpc83xx_spi *mpc83xx_spi;struct spi_master *master; - master =platform_get_drvdata (dev); + master =dev_get_drvdata (dev); mpc83xx_spi =spi_master_get_devdata (master);flush_workqueue (mpc83xx_spi->workqueue);
@@ -681,23 +669,293 @@ static int __exit mpc83xx_spi_remove(struct platform_device *dev)return 0 ; } +struct mpc83xx_spi_probe_info { +struct fsl_spi_platform_data pdata; +int *gpios; +bool *alow_flags; +}; + +static struct mpc83xx_spi_probe_info * +to_of_pinfo (struct fsl_spi_platform_data *pdata) +{ + return container_of(pdata, struct mpc83xx_spi_probe_info, pdata); +} + +static void mpc83xx_spi_cs_control (struct spi_device *spi,bool on) +{ +struct device *dev = spi->dev.parent; +struct mpc83xx_spi_probe_info *pinfo =to_of_pinfo (dev->platform_data); +u16 cs = spi->chip_select; +int gpio = pinfo->gpios[cs]; +bool alow = pinfo->alow_flags[cs]; + +gpio_set_value (gpio, on ^ alow); +} + +static int of_mpc83xx_spi_get_chipselects (struct device *dev) +{ +struct device_node *np =dev_archdata_get_node (&dev->archdata); +struct fsl_spi_platform_data *pdata = dev->platform_data; +struct mpc83xx_spi_probe_info *pinfo =to_of_pinfo (pdata); +unsigned int ngpios; +int i =0 ; +int ret; + + ngpios =of_gpio_count (np); +if (!ngpios) { +/* +* SPI w/o chip-select line. One SPI device is still permitted +* though. +*/ + pdata->max_chipselect =1 ; +return 0 ; + } + + pinfo->gpios =kmalloc (ngpios *sizeof (pinfo->gpios),GFP_KERNEL ); +if (!pinfo->gpios) +return -ENOMEM ; +memset (pinfo->gpios,-1 , ngpios *sizeof (pinfo->gpios)); + + pinfo->alow_flags =kzalloc (ngpios *sizeof (pinfo->alow_flags), +GFP_KERNEL ); +if (!pinfo->alow_flags) { + ret = -ENOMEM ; + goto err_alloc_flags; + } + +for (; i < ngpios; i++) { +int gpio; +enum of_gpio_flags flags; + + gpio =of_get_gpio_flags (np, i, &flags); +if (!gpio_is_valid (gpio)) { +dev_err (dev,"invalid gpio #%d: %d\n" , i, gpio); + goto err_loop; + } + + ret =gpio_request (gpio,dev_name (dev)); +if (ret) { +dev_err (dev,"can't request gpio #%d: %d\n" , i, ret); + goto err_loop; + } + + pinfo->gpios[i] = gpio; + pinfo->alow_flags[i] = flags &OF_GPIO_ACTIVE_LOW ; + + ret =gpio_direction_output (pinfo->gpios[i], + pinfo->alow_flags[i]); +if (ret) { +dev_err (dev,"can't set output direction for gpio " +"#%d: %d\n" , i, ret); + goto err_loop; + } + } + + pdata->max_chipselect = ngpios; + pdata->cs_control = mpc83xx_spi_cs_control; + +return 0 ; + +err_loop: +while (i >=0 ) { +if (gpio_is_valid (pinfo->gpios[i])) +gpio_free (pinfo->gpios[i]); + i--; + } + +kfree (pinfo->alow_flags); + pinfo->alow_flags =NULL ; +err_alloc_flags: +kfree (pinfo->gpios); + pinfo->gpios =NULL ; +return ret; +} + +static int of_mpc83xx_spi_free_chipselects (struct device *dev) +{ +struct fsl_spi_platform_data *pdata = dev->platform_data; +struct mpc83xx_spi_probe_info *pinfo =to_of_pinfo (pdata); +int i; + +if (!pinfo->gpios) +return 0 ; + +for (i =0 ; i < pdata->max_chipselect; i++) { +if (gpio_is_valid (pinfo->gpios[i])) +gpio_free (pinfo->gpios[i]); + } + +kfree (pinfo->gpios); +kfree (pinfo->alow_flags); +return 0 ; +} + +static int __devinit of_mpc83xx_spi_probe (struct of_device *ofdev, +const struct of_device_id *ofid) +{ +struct device *dev = &ofdev->dev; +struct device_node *np = ofdev->node; +struct mpc83xx_spi_probe_info *pinfo; +struct fsl_spi_platform_data *pdata; +struct spi_master *master; +struct resource mem; +struct resource irq; +const void *prop; +int ret = -ENOMEM ; + + pinfo =kzalloc (sizeof (*pinfo),GFP_KERNEL ); +if (!pinfo) +return -ENOMEM ; + + pdata = &pinfo->pdata; + dev->platform_data = pdata; + +/* Allocate bus num dynamically. */ + pdata->bus_num =-1 ; + +/* SPI controller is either clocked from QE or SoC clock. */ + pdata->sysclk =get_brgfreq (); +if (pdata->sysclk ==-1 ) { + pdata->sysclk =fsl_get_sys_freq (); +if (pdata->sysclk ==-1 ) { + ret = -ENODEV ; + goto err_clk; + } + } + + prop =of_get_property (np,"mode" ,NULL ); +if (prop && !strcmp (prop,"cpu-qe" )) + pdata->qe_mode =1 ; + + ret =of_mpc83xx_spi_get_chipselects (dev); +if (ret) + goto err; + + ret =of_address_to_resource (np,0 , &mem); +if (ret) + goto err; + + ret =of_irq_to_resource (np,0 , &irq); +if (!ret) { + ret = -EINVAL ; + goto err; + } + + master =mpc83xx_spi_probe (dev, &mem, irq.start); +if (IS_ERR (master)) { + ret =PTR_ERR (master); + goto err; + } + +of_register_spi_devices (master, np); + +return 0 ; + +err: +of_mpc83xx_spi_free_chipselects (dev); +err_clk: +kfree (pinfo); +return ret; +} + +static int __devexit of_mpc83xx_spi_remove(struct of_device *ofdev) +{ +int ret; + + ret =mpc83xx_spi_remove (&ofdev->dev); +if (ret) +return ret; +of_mpc83xx_spi_free_chipselects (&ofdev->dev); +return 0 ; +} + +static const struct of_device_id of_mpc83xx_spi_match[] = { + { .compatible ="fsl,spi" }, + {}, +}; +MODULE_DEVICE_TABLE (of, of_mpc83xx_spi_match); + +static struct of_platform_driver of_mpc83xx_spi_driver = { + .name ="mpc83xx_spi" , + .match_table = of_mpc83xx_spi_match, + .probe = of_mpc83xx_spi_probe, + .remove =__devexit_p (of_mpc83xx_spi_remove), +}; + +#ifdef CONFIG_MPC832x_RDB +/* +* XXX XXX XXX +* This is "legacy" platform driver, was used by the MPC8323E-RDB boards +* only. The driver should go away soon, since newer MPC8323E-RDB's device +* tree can work with OpenFirmware driver. But for now we support old trees +* as well. +*/ +static int __devinit plat_mpc83xx_spi_probe (struct platform_device *pdev) +{ +struct resource *mem; +unsigned int irq; +struct spi_master *master; + +if (!pdev->dev.platform_data) +return -EINVAL ; + + mem =platform_get_resource (pdev,IORESOURCE_MEM ,0 ); +if (!mem) +return -EINVAL ; + + irq =platform_get_irq (pdev,0 ); +if (!irq) +return -EINVAL ; + + master =mpc83xx_spi_probe (&pdev->dev, mem, irq); +if (IS_ERR (master)) +return PTR_ERR (master); +return 0 ; +} + +static int __devexit plat_mpc83xx_spi_remove(struct platform_device *pdev) +{ +return mpc83xx_spi_remove (&pdev->dev); +} +MODULE_ALIAS ("platform:mpc83xx_spi" );static struct platform_driver mpc83xx_spi_driver = { - .remove =__exit_p (mpc83xx_spi_remove), + .probe = plat_mpc83xx_spi_probe, + .remove =__exit_p (plat_mpc83xx_spi_remove), .driver = { .name ="mpc83xx_spi" , .owner =THIS_MODULE , }, }; +static bool legacy_driver_failed; + +static void __init legacy_driver_register (void ) +{ + legacy_driver_failed =platform_driver_register (&mpc83xx_spi_driver); +} + +static void __exit legacy_driver_unregister(void) +{ +if (legacy_driver_failed) +return ; +platform_driver_unregister (&mpc83xx_spi_driver); +} +#else +static void __init legacy_driver_register (void ) {} +static void __exit legacy_driver_unregister(void) {} +#endif /* CONFIG_MPC832x_RDB */ +static int __init mpc83xx_spi_init (void ) { -return platform_driver_probe (&mpc83xx_spi_driver, mpc83xx_spi_probe); +legacy_driver_register (); +return of_register_platform_driver (&of_mpc83xx_spi_driver); } static void __exit mpc83xx_spi_exit(void) { -platform_driver_unregister (&mpc83xx_spi_driver); +of_unregister_platform_driver (&of_mpc83xx_spi_driver); +legacy_driver_unregister (); }module_init (mpc83xx_spi_init);
include/linux/fsl_devices.h +1 -1
@@ -99,7 +99,7 @@ struct spi_device;struct fsl_spi_platform_data {u32 initial_spmode;/* initial SPMODE value */ -u16 bus_num; +s16 bus_num;bool qe_mode;/* board specific information */ u16 max_chipselect;
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PATCH 4/6 powerpc: Add mmc-spi-slot bindings
In reply to Anton VorontsovThe bindings describes a case where MMC/SD/SDIO slot directly connected to a SPI bus. Such setups are widely used on embedded PowerPC boards.
The patch also adds the mmc-spi-slot entry to the OpenFirmware modalias table.
--- .../powerpc/dts-bindings/mmc-spi-slot.txt | 23 ++++++++++++++++++++ drivers/of/base.c | 1 + 2 files changed, 24 insertions(+), 0 deletions(-) create mode 100644 Documentation/powerpc/dts-bindings/mmc-spi-slot.txt
Documentation/powerpc/dts-bindings/mmc-spi-slot.txt new file +23 -0
@@ -0,0 +1,23 @@ +MMC/SD/SDIO slot directly connected to a SPI bus + +Required properties: +- compatible : should be "mmc-spi-slot". +- reg : should specify SPI address (chip-select number). +- spi-max-frequency : maximum frequency for this device (Hz). +- voltage-ranges : two cells are required, first cell specifies minimum + slot voltage (mV), second cell specifies maximum slot voltage (mV). + Several ranges could be specified. +- gpios : (optional) may specify GPIOs in this order: Card-Detect GPIO, + Write-Protect GPIO. + +Example: + + mmc-slot@0 { + compatible = "fsl,mpc8323rdb-mmc-slot", + "mmc-spi-slot"; + reg = <0>; + gpios = <&qe_pio_d 14 1 + &qe_pio_d 15 0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <50000000>; + };
drivers/of/base.c +1 -0
@@ -446,6 +446,7 @@ struct of_modalias_table { };static struct of_modalias_table of_modalias_table[] = { {"fsl,mcu-mpc8349emitx" ,"mcu-mpc8349emitx" }, + {"mmc-spi-slot" ,"mmc_spi" }, };/**
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PATCH 5/6 powerpc/83xx: Add mmc-spi support via the device tree for MPC8323E-RDB
In reply to Anton Vorontsov- Add gpio-controller node to manage QE GPIO Bank D;
- Add mmc-spi node;
- Modify board file so that it won't use legacy SPI support with the new device trees.
--- arch/powerpc/boot/dts/mpc832x_rdb.dts | 24 ++++++++++++++++++++++++ arch/powerpc/platforms/83xx/mpc832x_rdb.c | 6 ++++++ 2 files changed, 30 insertions(+), 0 deletions(-)
arch/powerpc/boot/dts/mpc832x_rdb.dts +24 -0
@@ -152,10 +152,21 @@ }; par_io@1400 { + #address-cells = <1>; + #size-cells = <1>; reg = <0x1400 0x100>; + ranges = <3 0x1448 0x18>; + compatible = "fsl,mpc8323-qe-pario"; device_type = "par_io"; num-ports = <7>; + qe_pio_d: gpio-controller@1448 { + #gpio-cells = <2>; + compatible = "fsl,mpc8323-qe-pario-bank"; + reg = <3 0x18>; + gpio-controller; + }; + ucc2pio:ucc_pin@02 { pio-map = < /* port pin dir open_drain assignment has_irq */
@@ -225,12 +236,25 @@ }; spi@4c0 { + #address-cells = <1>; + #size-cells = <0>; cell-index = <0>; compatible = "fsl,spi"; reg = <0x4c0 0x40>; interrupts = <2>; interrupt-parent = <&qeic>; + gpios = <&qe_pio_d 13 0>; mode = "cpu-qe"; + + mmc-slot@0 { + compatible = "fsl,mpc8323rdb-mmc-slot", + "mmc-spi-slot"; + reg = <0>; + gpios = <&qe_pio_d 14 1 + &qe_pio_d 15 0>; + voltage-ranges = <3300 3300>; + spi-max-frequency = <50000000>; + }; }; spi@500 {
arch/powerpc/platforms/83xx/mpc832x_rdb.c +6 -0
@@ -68,6 +68,12 @@ static int __init mpc832x_spi_init(void)par_io_config_pin (3 ,14 ,2 ,0 ,0 ,0 );/* SD_INSERT, I */ par_io_config_pin (3 ,15 ,2 ,0 ,0 ,0 );/* SD_PROTECT,I */ +/* +* Don't bother with legacy stuff when device tree contains +* mmc-spi-slot node. +*/ +if (of_find_compatible_node (NULL ,NULL ,"mmc-spi-slot" )) +return 0 ;return fsl_spi_init (&mpc832x_spi_boardinfo,1 , mpc83xx_spi_cs_control); }machine_device_initcall (mpc832x_rdb, mpc832x_spi_init);
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PATCH 6/6 powerpc/fsl_soc: Isolate legacy fsl_spi support to mpc832x_rdb boards
In reply to Anton VorontsovThe advantages of this:
- Don't encourage legacy support;
- Less external symbols, less code to compile-in for !MPC832x_RDB platforms.
--- arch/powerpc/platforms/83xx/mpc832x_rdb.c | 107 +++++++++++++++++++++++++++++ arch/powerpc/sysdev/fsl_soc.c | 107 ----------------------------- arch/powerpc/sysdev/fsl_soc.h | 4 - 3 files changed, 107 insertions(+), 111 deletions(-)
arch/powerpc/platforms/83xx/mpc832x_rdb.c +107 -0
@@ -20,6 +20,7 @@#include <linux/spi/mmc_spi.h> #include <linux/mmc/host.h> #include <linux/of_platform.h> +#include <linux/fsl_devices.h> #include <asm/time.h> #include <asm/ipic.h>
@@ -39,6 +40,112 @@#endif #ifdef CONFIG_QUICC_ENGINE +static int __init of_fsl_spi_probe (char *type,char *compatible,u32 sysclk, +struct spi_board_info *board_infos, +unsigned int num_board_infos, +void (*cs_control)(struct spi_device *dev, +bool on)) +{ +struct device_node *np; +unsigned int i =0 ; + +for_each_compatible_node (np, type, compatible) { +int ret; +unsigned int j; +const void *prop; +struct resource res[2 ]; +struct platform_device *pdev; +struct fsl_spi_platform_data pdata = { + .cs_control = cs_control, + }; + +memset (res,0 ,sizeof (res)); + + pdata.sysclk = sysclk; + + prop =of_get_property (np,"reg" ,NULL ); +if (!prop) + goto err; + pdata.bus_num = *(u32 *)prop; + + prop =of_get_property (np,"cell-index" ,NULL ); +if (prop) + i = *(u32 *)prop; + + prop =of_get_property (np,"mode" ,NULL ); +if (prop && !strcmp (prop,"cpu-qe" )) + pdata.qe_mode =1 ; + +for (j =0 ; j < num_board_infos; j++) { +if (board_infos[j].bus_num == pdata.bus_num) + pdata.max_chipselect++; + } + +if (!pdata.max_chipselect) +continue ; + + ret =of_address_to_resource (np,0 , &res[0 ]); +if (ret) + goto err; + + ret =of_irq_to_resource (np,0 , &res[1 ]); +if (ret ==NO_IRQ ) + goto err; + + pdev =platform_device_alloc ("mpc83xx_spi" , i); +if (!pdev) + goto err; + + ret =platform_device_add_data (pdev, &pdata,sizeof (pdata)); +if (ret) + goto unreg; + + ret =platform_device_add_resources (pdev, res, +ARRAY_SIZE (res)); +if (ret) + goto unreg; + + ret =platform_device_add (pdev); +if (ret) + goto unreg; + + goto next; +unreg: +platform_device_del (pdev); +err: +pr_err ("%s: registration failed\n" , np->full_name); +next: + i++; + } + +return i; +} + +static int __init fsl_spi_init (struct spi_board_info *board_infos, +unsigned int num_board_infos, +void (*cs_control)(struct spi_device *spi, +bool on)) +{ +u32 sysclk =-1 ; +int ret; + +/* SPI controller is either clocked from QE or SoC clock */ + sysclk =get_brgfreq (); +if (sysclk ==-1 ) { + sysclk =fsl_get_sys_freq (); +if (sysclk ==-1 ) +return -ENODEV ; + } + + ret =of_fsl_spi_probe (NULL ,"fsl,spi" , sysclk, board_infos, + num_board_infos, cs_control); +if (!ret) +of_fsl_spi_probe ("spi" ,"fsl_spi" , sysclk, board_infos, + num_board_infos, cs_control); + +return spi_register_board_info (board_infos, num_board_infos); +} +static void mpc83xx_spi_cs_control (struct spi_device *spi,bool on) {pr_debug ("%s %d %d\n" , __func__, spi->chip_select, on);
arch/powerpc/sysdev/fsl_soc.c +0 -107
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arch/powerpc/sysdev/fsl_soc.h +0 -4
@@ -19,10 +19,6 @@ extern u32 fsl_get_sys_freq(void);struct spi_board_info ;struct device_node ; -extern int fsl_spi_init (struct spi_board_info *board_infos, -unsigned int num_board_infos, -void (*cs_control)(struct spi_device *spi,bool on)); -extern void fsl_rstcr_restart (char *cmd);#if defined(CONFIG_FB_FSL_DIU ) || defined(CONFIG_FB_FSL_DIU_MODULE )
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Quoted 40 lines · Anton Vorontsov
Quoted 39 lines · Kumar Gala
Quoted 25 lines · Anton Vorontsov
Hi all,
The patch series are used to support SPI via the OF SPI subsystem (
driver/of/of_spi.c). Now the driver is able to manage its own chip selects, and doesn't need any auxiliary support from the board files orfsl_socconstructors.The series also contains PowerPC portions of the MMC SPI support.
Since the series touches spi and powerpc trees, I think it would be most convenient to pass it via one of these trees. The patches doesn't touch any SPI functionality, only some probe routines, so I believe powerpc.git is the best candidate...
The other reason for powerpc tree is that the patches depends on other patches as found in paulus/powerpc.git +
of_gpio_count()as found here:
http://ozlabs.org/pipermail/linuxppc-dev/2008-December/065917.htmlDavid, if you're OK with the patches, may I ask you to sign off on the ones that touch
drivers/spiso that we could pass it via Kumar's powerpc.git?The queue:
Quoted 10 lines
[1/7] powerpc: Implement
get_brgfreq()andget_baudrate()stubs [2/7]spi_mpc83xx: Fix sparse warnings
[3/7]spi_mpc83xx: Rework chip selects handling
[4/7]spi_mpc83xx: Add OF platform driver bindings
[5/7] powerpc/fsl_soc: Isolate legacyfsl_spisupport tompc832x_rdbboards
[6/7] powerpc: Add mmc-spi-slot bindings
[7/7] powerpc/83xx: Add mmc-spi support via the device tree for MPC8323E-RDBDavid,
Quoted 7 lines
Quoted 1 line
Any status on these patches?
Ping? No single comment on this patch set for ~2 months...
Resending...
Thanks,
David,
Anything going on here? Should we send this via some other channel?
- k
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PATCH v2 2/2 powerpc/83xx: Move gianfar mdio nodes under the ethernet nodes
Currently it doesn't matter where the mdio nodes are placed, but with power management support (i.e. when sleep = <> properties will take effect), mdio nodes placement will become important: mdio controller is a part of the ethernet block, so the mdio nodes should be placed correctly. Otherwise we may wrongly assume that MDIO controllers are available during sleep.
---
Changes since RFC:
- Don't use compatible = "simple-bus" for gianfar nodes.
arch/powerpc/boot/dts/mpc8315erdb.dts | 80 ++++++++++++++++------------- arch/powerpc/boot/dts/mpc8349emitx.dts | 69 +++++++++++++----------- arch/powerpc/boot/dts/mpc8349emitxgp.dts | 42 ++++++++------- arch/powerpc/boot/dts/mpc834x_mds.dts | 81 ++++++++++++++++------------- arch/powerpc/boot/dts/mpc8377_mds.dts | 80 ++++++++++++++++------------- arch/powerpc/boot/dts/mpc8377_rdb.dts | 67 +++++++++++++----------- arch/powerpc/boot/dts/mpc8378_mds.dts | 80 ++++++++++++++++------------- arch/powerpc/boot/dts/mpc8378_rdb.dts | 69 ++++++++++++++----------- arch/powerpc/boot/dts/mpc8379_mds.dts | 79 ++++++++++++++++------------ arch/powerpc/boot/dts/mpc8379_rdb.dts | 66 +++++++++++++---------- arch/powerpc/platforms/83xx/mpc834x_itx.c | 1 + arch/powerpc/platforms/83xx/mpc834x_mds.c | 1 + arch/powerpc/platforms/83xx/mpc837x_mds.c | 1 + arch/powerpc/platforms/83xx/mpc837x_rdb.c | 1 + 14 files changed, 398 insertions(+), 319 deletions(-)
arch/powerpc/boot/dts/mpc8315erdb.dts +44 -36
@@ -190,66 +190,74 @@ phy_type = "utmi"; }; - mdio@24520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x24520 0x20>; - phy0: ethernet-phy@0 { - interrupt-parent = <&ipic>; - interrupts = <20 0x8>; - reg = <0x0>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&ipic>; - interrupts = <19 0x8>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@25520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x25520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@24000 { + #address-cells = <1>; + #size-cells = <1>; cell-index = <0>; device_type = "network"; model = "eTSEC"; compatible = "gianfar"; reg = <0x24000 0x1000>; + ranges; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <32 0x8 33 0x8 34 0x8>; interrupt-parent = <&ipic>; tbi-handle = <&tbi0>; phy-handle = < &phy0 >; + + mdio@24520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x24520 0x20>; + + phy0: ethernet-phy@0 { + interrupt-parent = <&ipic>; + interrupts = <20 0x8>; + reg = <0x0>; + device_type = "ethernet-phy"; + }; + + phy1: ethernet-phy@1 { + interrupt-parent = <&ipic>; + interrupts = <19 0x8>; + reg = <0x1>; + device_type = "ethernet-phy"; + }; + + tbi0: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; }; enet1: ethernet@25000 { + #address-cells = <1>; + #size-cells = <1>; cell-index = <1>; device_type = "network"; model = "eTSEC"; compatible = "gianfar"; reg = <0x25000 0x1000>; + ranges; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <35 0x8 36 0x8 37 0x8>; interrupt-parent = <&ipic>; tbi-handle = <&tbi1>; phy-handle = < &phy1 >; + + mdio@25520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-tbi"; + reg = <0x25520 0x20>; + + tbi1: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; }; serial0: serial@4500 {
arch/powerpc/boot/dts/mpc8349emitx.dts +38 -31
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arch/powerpc/boot/dts/mpc8349emitxgp.dts +23 -19
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arch/powerpc/boot/dts/mpc834x_mds.dts +44 -37
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arch/powerpc/boot/dts/mpc8377_mds.dts +44 -36
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arch/powerpc/boot/dts/mpc8377_rdb.dts +37 -30
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arch/powerpc/boot/dts/mpc8378_mds.dts +44 -36
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arch/powerpc/boot/dts/mpc8378_rdb.dts +39 -30
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arch/powerpc/boot/dts/mpc8379_mds.dts +44 -35
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arch/powerpc/boot/dts/mpc8379_rdb.dts +37 -29
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arch/powerpc/platforms/83xx/mpc834x_itx.c +1 -0
@@ -42,6 +42,7 @@static struct of_device_id __initdata mpc834x_itx_ids[] = { { .compatible ="fsl,pq2pro-localbus" , }, { .compatible ="simple-bus" , }, + { .compatible ="gianfar" , }, {}, };
arch/powerpc/platforms/83xx/mpc834x_mds.c +1 -0
@@ -112,6 +112,7 @@ static struct of_device_id mpc834x_ids[] = { { .type = "soc", }, { .compatible = "soc", }, { .compatible = "simple-bus", }, + { .compatible = "gianfar", }, {}, };
arch/powerpc/platforms/83xx/mpc837x_mds.c +1 -0
@@ -96,6 +96,7 @@ static struct of_device_id mpc837x_ids[] = { { .type = "soc", }, { .compatible = "soc", }, { .compatible = "simple-bus", }, + { .compatible = "gianfar", }, {}, };
arch/powerpc/platforms/83xx/mpc837x_rdb.c +1 -0
@@ -48,6 +48,7 @@ static struct of_device_id mpc837x_ids[] = { { .type = "soc", }, { .compatible = "soc", }, { .compatible = "simple-bus", }, + { .compatible = "gianfar", }, {}, };
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Re: [PATCH v2 2/2] powerpc/83xx: Move gianfar mdio nodes under the ethernet nodes
Quoted 30 lines · Anton Vorontsov
Currently it doesn't matter where the mdio nodes are placed, but with power management support (i.e. when sleep = <> properties will take effect), mdio nodes placement will become important: mdio controller is a part of the ethernet block, so the mdio nodes should be placed correctly. Otherwise we may wrongly assume that MDIO controllers are available during sleep.
Suggested-by Scott Wood <[email protected]>Signed-off-by Anton Vorontsov <[email protected]>---
Changes since RFC:
- Don't use compatible = "simple-bus" for gianfar nodes.
arch/powerpc/boot/dts/mpc8315erdb.dts| 80 ++++++++++++++++------------- arch/powerpc/boot/dts/mpc8349emitx.dts | 69 ++++++++++++ +----------- arch/powerpc/boot/dts/mpc8349emitxgp.dts | 42 ++++++++------- arch/powerpc/boot/dts/mpc834x_mds.dts | 81 +++++++++++++++ +------------- arch/powerpc/boot/dts/mpc8377_mds.dts | 80 +++++++++++++++ +------------- arch/powerpc/boot/dts/mpc8377_rdb.dts | 67 ++++++++++++ +----------- arch/powerpc/boot/dts/mpc8378_mds.dts | 80 +++++++++++++++ +------------- arch/powerpc/boot/dts/mpc8378_rdb.dts | 69 +++++++++++++ +----------- arch/powerpc/boot/dts/mpc8379_mds.dts | 79 +++++++++++++++
Quoted 8 lines
+------------ arch/powerpc/boot/dts/mpc8379_rdb.dts | 66 ++++++++++++ +---------- arch/powerpc/platforms/83xx/mpc834x_itx.c | 1 + arch/powerpc/platforms/83xx/mpc834x_mds.c | 1 + arch/powerpc/platforms/83xx/mpc837x_mds.c | 1 + arch/powerpc/platforms/83xx/mpc837x_rdb.c | 1 + 14 files changed, 398 insertions(+), 319 deletions(-)
If we do this we should also fixup all the 85xx & 86xx .dts
Quoted 7 lines
arch/powerpc/boot/dts/mpc8315erdb.dts +0
-0@@ -190,66 +190,74 @@ phy_type = "utmi"; };
[snip]
arch/powerpc/boot/dts/mpc8315erdb.dts
Quoted 10 lines
enet0: ethernet@24000 {arch/powerpc/boot/dts/mpc8315erdb.dts +2
-0+ #address-cells = <1>; + #size-cells = <1>;cell-index = <0>; device_type = "network"; model = "eTSEC"; compatible = "gianfar"; reg = <0x24000 0x1000>;arch/powerpc/boot/dts/mpc8315erdb.dts +1
-0+ ranges;
Can this be proper?
ranges = <0x0 0x24520 0x20>;
arch/powerpc/boot/dts/mpc8315erdb.dts line 212
Quoted 12 lines
local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <32 0x8 33 0x8 34 0x8>; interrupt-parent = <&ipic>; tbi-handle = <&tbi0>; phy-handle = < &phy0 >;arch/powerpc/boot/dts/mpc8315erdb.dts +6
-0+ + mdio@24520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x24520 0x20>;
update here for ranges change.
Quoted 21 lines
arch/powerpc/boot/dts/mpc8315erdb.dts +20
-0+ + phy0: ethernet-phy@0 { + interrupt-parent = <&ipic>; + interrupts = <20 0x8>; + reg = <0x0>; + device_type = "ethernet-phy"; + }; + + phy1: ethernet-phy@1 { + interrupt-parent = <&ipic>; + interrupts = <19 0x8>; + reg = <0x1>; + device_type = "ethernet-phy"; + }; + + tbi0: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + };
Quoted 1 line
};
- k
Re: [PATCH v2 2/2] powerpc/83xx: Move gianfar mdio nodes under the ethernet nodes
On Wed, Mar 18, 2009 at 08:21:18AM -0500, Kumar Gala wrote:
[...]
Quoted 6 lines
Quoted 4 lines
arch/powerpc/platforms/83xx/mpc834x_mds.c | 1 + arch/powerpc/platforms/83xx/mpc837x_mds.c | 1 + arch/powerpc/platforms/83xx/mpc837x_rdb.c | 1 + 14 files changed, 398 insertions(+), 319 deletions(-)If we do this we should also fixup all the 85xx & 86xx .dts
OK.
It would be great to have #include <gianfar_enet.dts> facility in .dts files. ;-) I heard some rumors about this, what was the consequence?..
[...]
Quoted 4 lines
Review
Quoted 1 line
(quoted diff) +1
-0+ ranges;Can this be proper?
ranges = <0x0 0x24520 0x20>;
Yes, will change.
I was actually asking that q in RFC, i.e. whether we want proper ranges or these stubs (I took stubs approach since it's already in mpc8313_rdb device tree).
Thanks,
Signature · 3 lines
Anton Vorontsov email: [email protected] irc://irc.freenode.net/bd2
Re: [PATCH v2 2/2] powerpc/83xx: Move gianfar mdio nodes under the ethernet nodes
Quoted 2 lines · Anton Vorontsov
It would be great to have #include <
gianfar_enet.dts> facility in .dts files. ;-) I heard some rumors about this, what was the consequence?..
You can already do a raw include, but in most cases it needs parameterized templates/macros to make it useful. There were some patches floating around for that, but there was some disagreement about syntax and the discussion seems to have died out.
Quoted 4 lines
[...]
Quoted 3 lines
Review
Quoted 1 line
(quoted diff) +1
-0+ ranges;Can this be proper?
It's proper, but a bit lazy. :-)
Quoted 3 lines
Quoted 1 line
ranges = <0x0 0x24520 0x20>;Yes, will change.
I'd prefer ranges = <0 0x24000 0x1000>, in case any other sub-blocks come along in the future.
-Scott
Re: [PATCH v2 2/2] powerpc/83xx: Move gianfar mdio nodes under the ethernet nodes
On Wed, Mar 18, 2009 at 9:43 AM, Scott Wood <[email protected]> wrote= :
Quoted 6 lines · Anton Vorontsov
Quoted 3 lines
Quoted 1 line
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ranges =3D <
0x00x245200x20>;Yes, will change.
I'd prefer ranges =3D <0
0x240000x1000>, in case any other sub-blocks co=
me
Quoted 1 line
along in the future.
FWIW, ditto.
g.
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
Re: [PATCH v2 2/2] powerpc/83xx: Move gianfar mdio nodes under the ethernet nodes
In reply to Anton VorontsovQuoted 8 lines · Anton Vorontsov
On Wed, Mar 18, 2009 at 08:21:18AM -0500, Kumar Gala wrote:
[...]Quoted 6 lines
Quoted 4 lines
arch/powerpc/platforms/83xx/mpc834x_mds.c | 1 + arch/powerpc/platforms/83xx/mpc837x_mds.c | 1 + arch/powerpc/platforms/83xx/mpc837x_rdb.c | 1 + 14 files changed, 398 insertions(+), 319 deletions(-)If we do this we should also fixup all the 85xx & 86xx .dts
Here it goes. (The single patch is quite big, so I split it into 83xx/85xx/86xx parts. Can glue them together for the final resend, if you like).
Plus, now the patch set depends on
http://patchwork.ozlabs.org/patch/24624/
Thanks!
Signature · 3 lines
Anton Vorontsov email: [email protected] irc://irc.freenode.net/bd2
PATCH v3 1/4 powerpc/83xx: Add power management support for MPC837x boards
This patch adds pmc nodes to the device tree files so that the boards will able to use standby capability of MPC837x processors. The MPC837x PMC controllers are compatible with MPC8349 ones (i.e. no deep sleep).
sleep = <> properties are used to specify SCCR masks as described in "Specifying Device Power Management Information (sleep property)" chapter in Documentation/powerpc/booting-without-of.txt.
Since I2C1 and eSDHC controllers share the same clock source, they are now placed under sleep-nexus nodes.
A processor is able to wakeup the boards on LAN events (Wake-On-Lan), console events (with no_console_suspend kernel command line), GPIO events and external IRQs (IRQ1 and IRQ2).
The processor can also wakeup the boards by the fourth general purpose timer in GTM1 block, but the GTM wakeup support isn't yet implemented (it's tested to work, but it's unclear how can we use the quite short GTM timers, and how do we want to expose the GTM to userspace).
--- arch/powerpc/boot/dts/mpc8377_mds.dts | 68 ++++++++++++++++------- arch/powerpc/boot/dts/mpc8377_rdb.dts | 98 +++++++++++++++++++++------------ arch/powerpc/boot/dts/mpc8378_mds.dts | 66 +++++++++++++++------- arch/powerpc/boot/dts/mpc8378_rdb.dts | 96 ++++++++++++++++++++------------ arch/powerpc/boot/dts/mpc8379_mds.dts | 68 ++++++++++++++++------- arch/powerpc/boot/dts/mpc8379_rdb.dts | 98 +++++++++++++++++++++------------ 6 files changed, 323 insertions(+), 171 deletions(-)
arch/powerpc/boot/dts/mpc8377_mds.dts +47 -21
@@ -129,21 +129,38 @@ reg = <0x200 0x100>; }; - i2c@3000 { + sleep-nexus { #address-cells = <1>; - #size-cells = <0>; - cell-index = <0>; - compatible = "fsl-i2c"; - reg = <0x3000 0x100>; - interrupts = <14 0x8>; - interrupt-parent = <&ipic>; - dfsrr; + #size-cells = <1>; + compatible = "simple-bus"; + sleep = <&pmc 0x0c000000>; + ranges; - rtc@68 { - compatible = "dallas,ds1374"; - reg = <0x68>; - interrupts = <19 0x8>; + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <14 0x8>; interrupt-parent = <&ipic>; + dfsrr; + + rtc@68 { + compatible = "dallas,ds1374"; + reg = <0x68>; + interrupts = <19 0x8>; + interrupt-parent = <&ipic>; + }; + }; + + sdhci@2e000 { + compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc"; + reg = <0x2e000 0x1000>; + interrupts = <42 0x8>; + interrupt-parent = <&ipic>; + /* Filled in by U-Boot */ + clock-frequency = <0>; }; };
@@ -176,6 +193,7 @@ interrupts = <38 0x8>; dr_mode = "host"; phy_type = "ulpi"; + sleep = <&pmc 0x00c00000>; }; mdio@24520 {
@@ -226,6 +244,8 @@ interrupt-parent = <&ipic>; tbi-handle = <&tbi0>; phy-handle = <&phy2>; + sleep = <&pmc 0xc0000000>; + fsl,magic-packet; }; enet1: ethernet@25000 {
@@ -240,6 +260,8 @@ interrupt-parent = <&ipic>; tbi-handle = <&tbi1>; phy-handle = <&phy3>; + sleep = <&pmc 0x30000000>; + fsl,magic-packet; }; serial0: serial@4500 {
@@ -311,15 +333,7 @@ fsl,channel-fifo-len = <24>; fsl,exec-units-mask = <0x9fe>; fsl,descriptor-types-mask = <0x3ab0ebf>; - }; - - sdhci@2e000 { - compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - /* Filled in by U-Boot */ - clock-frequency = <0>; + sleep = <&pmc 0x03000000>; }; sata@18000 {
@@ -327,6 +341,7 @@ reg = <0x18000 0x1000>; interrupts = <44 0x8>; interrupt-parent = <&ipic>; + sleep = <&pmc 0x000000c0>; }; sata@19000 {
@@ -334,6 +349,7 @@ reg = <0x19000 0x1000>; interrupts = <45 0x8>; interrupt-parent = <&ipic>; + sleep = <&pmc 0x00000030>; }; /* IPIC
@@ -349,6 +365,13 @@ #interrupt-cells = <2>; reg = <0x700 0x100>; }; + + pmc: power@b00 { + compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc"; + reg = <0xb00 0x100 0xa00 0x100>; + interrupts = <80 0x8>; + interrupt-parent = <&ipic>; + }; }; pci0: pci@e0008500 {
@@ -403,6 +426,7 @@ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; + sleep = <&pmc 0x00010000>; clock-frequency = <0>; #interrupt-cells = <1>; #size-cells = <2>;
@@ -428,6 +452,7 @@ 0 0 0 2 &ipic 1 8 0 0 0 3 &ipic 1 8 0 0 0 4 &ipic 1 8>; + sleep = <&pmc 0x00300000>; clock-frequency = <0>; pcie@0 {
@@ -459,6 +484,7 @@ 0 0 0 2 &ipic 2 8 0 0 0 3 &ipic 2 8 0 0 0 4 &ipic 2 8>; + sleep = <&pmc 0x000c0000>; clock-frequency = <0>; pcie@0 {
arch/powerpc/boot/dts/mpc8377_rdb.dts +62 -36
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arch/powerpc/boot/dts/mpc8378_mds.dts +45 -21
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arch/powerpc/boot/dts/mpc8378_rdb.dts +60 -36
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arch/powerpc/boot/dts/mpc8379_mds.dts +47 -21
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arch/powerpc/boot/dts/mpc8379_rdb.dts +62 -36
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Signature · 1 line
1.5.6.5
PATCH v3 2/4 powerpc/83xx: Move gianfar mdio nodes under the ethernet nodes
In reply to Anton VorontsovCurrently it doesn't matter where the mdio nodes are placed, but with power management support (i.e. when sleep = <> properties will take effect), mdio nodes placement will become important: mdio controller is a part of the ethernet block, so the mdio nodes should be placed correctly. Otherwise we may wrongly assume that MDIO controllers are available during sleep.
--- arch/powerpc/boot/dts/asp834x-redboot.dts | 82 +++++++++++++++------------- arch/powerpc/boot/dts/mpc8315erdb.dts | 80 +++++++++++++++------------- arch/powerpc/boot/dts/mpc8349emitx.dts | 69 +++++++++++++----------- arch/powerpc/boot/dts/mpc8349emitxgp.dts | 42 ++++++++------- arch/powerpc/boot/dts/mpc834x_mds.dts | 81 +++++++++++++++------------- arch/powerpc/boot/dts/mpc8377_mds.dts | 80 +++++++++++++++------------- arch/powerpc/boot/dts/mpc8377_rdb.dts | 67 +++++++++++++----------- arch/powerpc/boot/dts/mpc8378_mds.dts | 80 +++++++++++++++------------- arch/powerpc/boot/dts/mpc8378_rdb.dts | 69 ++++++++++++++----------- arch/powerpc/boot/dts/mpc8379_mds.dts | 79 +++++++++++++++------------ arch/powerpc/boot/dts/mpc8379_rdb.dts | 66 +++++++++++++---------- arch/powerpc/boot/dts/sbc8349.dts | 80 +++++++++++++++------------- arch/powerpc/platforms/83xx/asp834x.c | 1 + arch/powerpc/platforms/83xx/mpc834x_itx.c | 1 + arch/powerpc/platforms/83xx/mpc834x_mds.c | 1 + arch/powerpc/platforms/83xx/mpc837x_mds.c | 1 + arch/powerpc/platforms/83xx/mpc837x_rdb.c | 1 + arch/powerpc/platforms/83xx/sbc834x.c | 1 + 18 files changed, 488 insertions(+), 393 deletions(-)
arch/powerpc/boot/dts/asp834x-redboot.dts +44 -38
@@ -181,70 +181,76 @@ phy_type = "ulpi"; }; - mdio@24520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x24520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&ipic>; - interrupts = <17 0x8>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - phy1: ethernet-phy@1 { - interrupt-parent = <&ipic>; - interrupts = <18 0x8>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@25520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x25520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@24000 { + #address-cells = <1>; + #size-cells = <1>; cell-index = <0>; device_type = "network"; model = "TSEC"; compatible = "gianfar"; reg = <0x24000 0x1000>; + ranges = <0x0 0x24000 0x1000>; local-mac-address = [ 00 08 e5 11 32 33 ]; interrupts = <32 0x8 33 0x8 34 0x8>; interrupt-parent = <&ipic>; tbi-handle = <&tbi0>; phy-handle = <&phy0>; linux,network-index = <0>; + + mdio@520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x520 0x20>; + + phy0: ethernet-phy@0 { + interrupt-parent = <&ipic>; + interrupts = <17 0x8>; + reg = <0x1>; + device_type = "ethernet-phy"; + }; + + phy1: ethernet-phy@1 { + interrupt-parent = <&ipic>; + interrupts = <18 0x8>; + reg = <0x2>; + device_type = "ethernet-phy"; + }; + + tbi0: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; }; enet1: ethernet@25000 { + #address-cells = <1>; + #size-cells = <1>; cell-index = <1>; device_type = "network"; model = "TSEC"; compatible = "gianfar"; reg = <0x25000 0x1000>; + ranges = <0x0 0x25000 0x1000>; local-mac-address = [ 00 08 e5 11 32 34 ]; interrupts = <35 0x8 36 0x8 37 0x8>; interrupt-parent = <&ipic>; tbi-handle = <&tbi1>; phy-handle = <&phy1>; linux,network-index = <1>; + + mdio@520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-tbi"; + reg = <0x520 0x20>; + + tbi1: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; }; serial0: serial@4500 {
arch/powerpc/boot/dts/mpc8315erdb.dts +44 -36
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arch/powerpc/boot/dts/mpc8349emitx.dts +38 -31
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arch/powerpc/boot/dts/mpc8349emitxgp.dts +23 -19
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arch/powerpc/boot/dts/mpc834x_mds.dts +44 -37
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arch/powerpc/boot/dts/mpc8377_mds.dts +44 -36
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arch/powerpc/boot/dts/mpc8377_rdb.dts +37 -30
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arch/powerpc/boot/dts/mpc8378_mds.dts +44 -36
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arch/powerpc/boot/dts/mpc8378_rdb.dts +39 -30
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arch/powerpc/boot/dts/mpc8379_mds.dts +44 -35
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arch/powerpc/boot/dts/mpc8379_rdb.dts +37 -29
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arch/powerpc/boot/dts/sbc8349.dts +44 -36
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arch/powerpc/platforms/83xx/asp834x.c +1 -0
@@ -58,6 +58,7 @@ static struct __initdata of_device_id asp8347_ids[] = { { .type = "soc", }, { .compatible = "soc", }, { .compatible = "simple-bus", }, + { .compatible = "gianfar", }, {}, };
arch/powerpc/platforms/83xx/mpc834x_itx.c +1 -0
@@ -42,6 +42,7 @@static struct of_device_id __initdata mpc834x_itx_ids[] = { { .compatible ="fsl,pq2pro-localbus" , }, { .compatible ="simple-bus" , }, + { .compatible ="gianfar" , }, {}, };
arch/powerpc/platforms/83xx/mpc834x_mds.c +1 -0
@@ -112,6 +112,7 @@ static struct of_device_id mpc834x_ids[] = { { .type = "soc", }, { .compatible = "soc", }, { .compatible = "simple-bus", }, + { .compatible = "gianfar", }, {}, };
arch/powerpc/platforms/83xx/mpc837x_mds.c +1 -0
@@ -96,6 +96,7 @@ static struct of_device_id mpc837x_ids[] = { { .type = "soc", }, { .compatible = "soc", }, { .compatible = "simple-bus", }, + { .compatible = "gianfar", }, {}, };
arch/powerpc/platforms/83xx/mpc837x_rdb.c +1 -0
@@ -48,6 +48,7 @@ static struct of_device_id mpc837x_ids[] = { { .type = "soc", }, { .compatible = "soc", }, { .compatible = "simple-bus", }, + { .compatible = "gianfar", }, {}, };
arch/powerpc/platforms/83xx/sbc834x.c +1 -0
@@ -84,6 +84,7 @@ static struct __initdata of_device_id sbc834x_ids[] = { { .type = "soc", }, { .compatible = "soc", }, { .compatible = "simple-bus", }, + { .compatible = "gianfar", }, {}, };
Signature · 1 line
1.5.6.5
PATCH v3 3/4 powerpc/85xx: Move gianfar mdio nodes under the ethernet nodes
In reply to Anton VorontsovCurrently it doesn't matter where the mdio nodes are placed, but with power management support (i.e. when sleep = <> properties will take effect), mdio nodes placement will become important: mdio controller is a part of the ethernet block, so the mdio nodes should be placed correctly. Otherwise we may wrongly assume that MDIO controllers are available during sleep.
NOTE: mpc8572ds_camp_core1.dts now fully specifies ethernet@24000 layout. ethernet@24000 node is disabled via status = "disabled on core1" property.
--- arch/powerpc/boot/dts/ksi8560.dts | 79 ++++++----- arch/powerpc/boot/dts/mpc8536ds.dts | 78 ++++++----- arch/powerpc/boot/dts/mpc8540ads.dts | 117 +++++++++-------- arch/powerpc/boot/dts/mpc8541cds.dts | 78 ++++++----- arch/powerpc/boot/dts/mpc8544ds.dts | 81 ++++++------ arch/powerpc/boot/dts/mpc8548cds.dts | 156 ++++++++++++---------- arch/powerpc/boot/dts/mpc8555cds.dts | 78 ++++++----- arch/powerpc/boot/dts/mpc8560ads.dts | 102 ++++++++------- arch/powerpc/boot/dts/mpc8568mds.dts | 102 ++++++++------- arch/powerpc/boot/dts/mpc8572ds.dts | 150 ++++++++++++---------- arch/powerpc/boot/dts/mpc8572ds_36b.dts | 150 ++++++++++++---------- arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts | 47 ++++--- arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts | 49 ++++++-- arch/powerpc/boot/dts/sbc8548.dts | 78 ++++++----- arch/powerpc/boot/dts/sbc8560.dts | 100 ++++++++------- arch/powerpc/boot/dts/stx_gp3_8560.dts | 78 ++++++----- arch/powerpc/boot/dts/tqm8540.dts | 117 +++++++++-------- arch/powerpc/boot/dts/tqm8541.dts | 90 +++++++------ arch/powerpc/boot/dts/tqm8548-bigflash.dts | 168 +++++++++++++----------- arch/powerpc/boot/dts/tqm8548.dts | 168 +++++++++++++----------- arch/powerpc/boot/dts/tqm8555.dts | 90 +++++++------ arch/powerpc/boot/dts/tqm8560.dts | 90 +++++++------ arch/powerpc/platforms/85xx/ksi8560.c | 1 + arch/powerpc/platforms/85xx/mpc8536_ds.c | 1 + arch/powerpc/platforms/85xx/mpc85xx_ads.c | 1 + arch/powerpc/platforms/85xx/mpc85xx_cds.c | 1 + arch/powerpc/platforms/85xx/mpc85xx_ds.c | 1 + arch/powerpc/platforms/85xx/mpc85xx_mds.c | 1 + arch/powerpc/platforms/85xx/sbc8548.c | 1 + arch/powerpc/platforms/85xx/sbc8560.c | 1 + arch/powerpc/platforms/85xx/stx_gp3.c | 1 + arch/powerpc/platforms/85xx/tqm85xx.c | 1 + 32 files changed, 1229 insertions(+), 1027 deletions(-)
arch/powerpc/boot/dts/ksi8560.dts +42 -37
@@ -124,67 +124,72 @@ }; }; - mdio@24520 { /* For TSECs */ - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x24520 0x20>; - - PHY1: ethernet-phy@1 { - interrupt-parent = <&mpic>; - reg = <0x1>; - device_type = "ethernet-phy"; - }; - - PHY2: ethernet-phy@2 { - interrupt-parent = <&mpic>; - reg = <0x2>; - device_type = "ethernet-phy"; - }; - - tbi0: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - mdio@25520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-tbi"; - reg = <0x25520 0x20>; - - tbi1: tbi-phy@11 { - reg = <0x11>; - device_type = "tbi-phy"; - }; - }; - - enet0: ethernet@24000 { + #address-cells = <1>; + #size-cells = <1>; device_type = "network"; model = "TSEC"; compatible = "gianfar"; reg = <0x24000 0x1000>; + ranges = <0x0 0x24000 0x1000>; /* Mac address filled in by bootwrapper */ local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; interrupt-parent = <&mpic>; tbi-handle = <&tbi0>; phy-handle = <&PHY1>; + + mdio@520 { /* For TSECs */ + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x520 0x20>; + + PHY1: ethernet-phy@1 { + interrupt-parent = <&mpic>; + reg = <0x1>; + device_type = "ethernet-phy"; + }; + + PHY2: ethernet-phy@2 { + interrupt-parent = <&mpic>; + reg = <0x2>; + device_type = "ethernet-phy"; + }; + + tbi0: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; }; enet1: ethernet@25000 { + #address-cells = <1>; + #size-cells = <1>; device_type = "network"; model = "TSEC"; compatible = "gianfar"; reg = <0x25000 0x1000>; + ranges = <0x0 0x25000 0x1000>; /* Mac address filled in by bootwrapper */ local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; interrupt-parent = <&mpic>; tbi-handle = <&tbi1>; phy-handle = <&PHY2>; + + mdio@520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-tbi"; + reg = <0x520 0x20>; + + tbi1: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; }; mpic: pic@40000 {
arch/powerpc/boot/dts/mpc8536ds.dts +42 -36
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arch/powerpc/boot/dts/mpc8540ads.dts +63 -54
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arch/powerpc/boot/dts/mpc8541cds.dts +42 -36
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arch/powerpc/boot/dts/mpc8544ds.dts +43 -38
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arch/powerpc/boot/dts/mpc8548cds.dts +84 -72
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arch/powerpc/boot/dts/mpc8555cds.dts +42 -36
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arch/powerpc/boot/dts/mpc8560ads.dts +54 -48
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arch/powerpc/boot/dts/mpc8568mds.dts +54 -48
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arch/powerpc/boot/dts/mpc8572ds.dts +81 -69
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arch/powerpc/boot/dts/mpc8572ds_36b.dts +81 -69
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arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts +29 -18
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arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts +38 -11
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arch/powerpc/boot/dts/sbc8548.dts +42 -36
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arch/powerpc/boot/dts/sbc8560.dts +53 -47
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arch/powerpc/boot/dts/stx_gp3_8560.dts +42 -36
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arch/powerpc/boot/dts/tqm8540.dts +63 -54
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arch/powerpc/boot/dts/tqm8541.dts +48 -42
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arch/powerpc/boot/dts/tqm8548-bigflash.dts +90 -78
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arch/powerpc/boot/dts/tqm8548.dts +90 -78
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arch/powerpc/boot/dts/tqm8555.dts +48 -42
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arch/powerpc/boot/dts/tqm8560.dts +48 -42
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arch/powerpc/platforms/85xx/mpc8536_ds.c +1 -0
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arch/powerpc/platforms/85xx/mpc85xx_ads.c +1 -0
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arch/powerpc/platforms/85xx/mpc85xx_cds.c +1 -0
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arch/powerpc/platforms/85xx/mpc85xx_ds.c +1 -0
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arch/powerpc/platforms/85xx/mpc85xx_mds.c +1 -0
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Signature · 1 line
1.5.6.5
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PATCH v3 4/4 powerpc/86xx: Move gianfar mdio nodes under the ethernet nodes
In reply to Anton VorontsovCurrently it doesn't matter where the mdio nodes are placed, but with power management support (i.e. when sleep = <> properties will take effect), mdio nodes placement will become important: mdio controller is a part of the ethernet block, so the mdio nodes should be placed correctly. Otherwise we may wrongly assume that MDIO controllers are available during sleep.
--- arch/powerpc/boot/dts/gef_sbc310.dts | 39 ++++--- arch/powerpc/boot/dts/gef_sbc610.dts | 39 ++++--- arch/powerpc/boot/dts/mpc8641_hpcn.dts | 157 +++++++++++++++------------- arch/powerpc/boot/dts/sbc8641d.dts | 156 +++++++++++++++------------- arch/powerpc/platforms/86xx/gef_sbc310.c | 1 + arch/powerpc/platforms/86xx/gef_sbc610.c | 1 + arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 1 + arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 1 + arch/powerpc/platforms/86xx/sbc8641d.c | 1 + 9 files changed, 215 insertions(+), 181 deletions(-)
arch/powerpc/boot/dts/gef_sbc310.dts +21 -18
@@ -247,34 +247,37 @@ }; }; - mdio@24520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x24520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&gef_pic>; - interrupts = <0x9 0x4>; - reg = <1>; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&gef_pic>; - interrupts = <0x8 0x4>; - reg = <3>; - }; - }; - enet0: ethernet@24000 { + #address-cells = <1>; + #size-cells = <1>; device_type = "network"; model = "eTSEC"; compatible = "gianfar"; reg = <0x24000 0x1000>; + ranges = <0x0 0x24000 0x1000>; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; interrupt-parent = <&mpic>; phy-handle = <&phy0>; phy-connection-type = "gmii"; + + mdio@520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x520 0x20>; + + phy0: ethernet-phy@0 { + interrupt-parent = <&gef_pic>; + interrupts = <0x9 0x4>; + reg = <1>; + }; + phy2: ethernet-phy@2 { + interrupt-parent = <&gef_pic>; + interrupts = <0x8 0x4>; + reg = <3>; + }; + }; }; enet1: ethernet@26000 {
arch/powerpc/boot/dts/gef_sbc610.dts +21 -18
@@ -202,34 +202,37 @@ }; }; - mdio@24520 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,gianfar-mdio"; - reg = <0x24520 0x20>; - - phy0: ethernet-phy@0 { - interrupt-parent = <&gef_pic>; - interrupts = <0x9 0x4>; - reg = <1>; - }; - phy2: ethernet-phy@2 { - interrupt-parent = <&gef_pic>; - interrupts = <0x8 0x4>; - reg = <3>; - }; - }; - enet0: ethernet@24000 { + #address-cells = <1>; + #size-cells = <1>; device_type = "network"; model = "eTSEC"; compatible = "gianfar"; reg = <0x24000 0x1000>; + ranges = <0x0 0x24000 0x1000>; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; interrupt-parent = <&mpic>; phy-handle = <&phy0>; phy-connection-type = "gmii"; + + mdio@520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x520 0x20>; + + phy0: ethernet-phy@0 { + interrupt-parent = <&gef_pic>; + interrupts = <0x9 0x4>; + reg = <1>; + }; + phy2: ethernet-phy@2 { + interrupt-parent = <&gef_pic>; + interrupts = <0x8 0x4>; + reg = <3>; + }; + }; }; enet1: ethernet@26000 {
arch/powerpc/boot/dts/mpc8641_hpcn.dts +84 -73
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arch/powerpc/boot/dts/sbc8641d.dts +84 -72
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arch/powerpc/platforms/86xx/gef_sbc310.c +1 -0
@@ -201,6 +201,7 @@ static long __init mpc86xx_time_init(void)static __initdata struct of_device_id of_bus_ids[] = { { .compatible ="simple-bus" , }, + { .compatible ="gianfar" , }, {}, };
arch/powerpc/platforms/86xx/gef_sbc610.c +1 -0
@@ -194,6 +194,7 @@ static long __init mpc86xx_time_init(void)static __initdata struct of_device_id of_bus_ids[] = { { .compatible ="simple-bus" , }, + { .compatible ="gianfar" , }, {}, };
arch/powerpc/platforms/86xx/mpc8610_hpcd.c +1 -0
@@ -46,6 +46,7 @@ static unsigned char *pixis_bdcfg0, *pixis_arch;static struct of_device_id __initdata mpc8610_ids[] = { { .compatible ="fsl,mpc8610-immr" , }, { .compatible ="simple-bus" , }, + { .compatible ="gianfar" , }, {} };
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c +1 -0
@@ -148,6 +148,7 @@ mpc86xx_time_init(void)static __initdata struct of_device_id of_bus_ids[] = { { .compatible ="simple-bus" , }, { .compatible ="fsl,rapidio-delta" , }, + { .compatible ="gianfar" , }, {}, };
arch/powerpc/platforms/86xx/sbc8641d.c +1 -0
@@ -103,6 +103,7 @@ mpc86xx_time_init(void)static __initdata struct of_device_id of_bus_ids[] = { { .compatible ="simple-bus" , }, + { .compatible ="gianfar" , }, {}, };
Signature · 1 line
1.5.6.5
Re: [PATCH v3 3/4] powerpc/85xx: Move gianfar mdio nodes under the ethernet nodes
In reply to Anton VorontsovQuoted 10 lines · Anton Vorontsov
Currently it doesn't matter where the mdio nodes are placed, but with power management support (i.e. when sleep = <> properties will take effect), mdio nodes placement will become important: mdio controller is a part of the ethernet block, so the mdio nodes should be placed correctly. Otherwise we may wrongly assume that MDIO controllers are available during sleep.
NOTE:
mpc8572ds_camp_core1.dtsnow fully specifies ethernet@24000 layout. ethernet@24000 node is disabled via status = "disabled on core1" property.
Hmm, would that imply that the mdio underneath it is disabled as well?
And are we just ignoring the possibility of races between multiple partitions accessing the shared mdio block?
-Scott
Re: [PATCH v3 3/4] powerpc/85xx: Move gianfar mdio nodes under the ethernet nodes
Quoted 8 lines · Scott Wood
Quoted 7 lines · Anton Vorontsov
Currently it doesn't matter where the mdio nodes are placed, but with power management support (i.e. when sleep = <> properties will take effect), mdio nodes placement will become important: mdio controller is a part of the ethernet block, so the mdio nodes should be placed correctly. Otherwise we may wrongly assume that MDIO controllers are available during sleep.
Quoted 5 lines
Quoted 3 lines
NOTE:
mpc8572ds_camp_core1.dtsnow fully specifies ethernet@24000 layout. ethernet@24000 node is disabled via status = "disabled on core1" property.Hmm, would that imply that the mdio underneath it is disabled as well?
Technically, yes. In practice, MDIO and MAC drivers are probed separately.
I don't see any better solution, should I just leave the core1's mdio node intact?
Quoted 2 lines
And are we just ignoring the possibility of races between multiple partitions accessing the shared mdio block?
Dunno. From simply looking into the device tree, I'd assume the same.
Thanks,
Signature · 3 lines
Anton Vorontsov email: [email protected] irc://irc.freenode.net/bd2
Re: [PATCH v3 3/4] powerpc/85xx: Move gianfar mdio nodes under the ethernet nodes
Quoted 5 lines · Anton Vorontsov
Quoted 1 line · Scott Wood
Hmm, would that imply that the mdio underneath it is disabled as well?
Technically, yes. In practice, MDIO and MAC drivers are probed separately.
Currently, yes, but that may not always be the case.
Quoted 2 lines
I don't see any better solution, should I just leave the core1's mdio node intact?
Probably. It's not as if core1 is going to be putting ethernet@24000 to sleep.
-Scott
Re: [PATCH v3 3/4] powerpc/85xx: Move gianfar mdio nodes under the ethernet nodes
In reply to Anton VorontsovQuoted 13 lines · Anton Vorontsov
Quoted 12 lines · Scott Wood
Quoted 10 lines · Anton Vorontsov
Currently it doesn't matter where the mdio nodes are placed, but with power management support (i.e. when sleep = <> properties will take effect), mdio nodes placement will become important: mdio controller is a part of the ethernet block, so the mdio nodes should be placed correctly. Otherwise we may wrongly assume that MDIO controllers are available during sleep.
NOTE:
mpc8572ds_camp_core1.dtsnow fully specifies ethernet@24000 layout. ethernet@24000 node is disabled via status = "disabled on core1" property.
Quoted 7 lines
Quoted 1 line
Hmm, would that imply that the mdio underneath it is disabled as well?
Technically, yes. In practice, MDIO and MAC drivers are probed separately.
I don't see any better solution, should I just leave the core1's mdio node intact?
Ah. We also could change compatible entry to "fsl,gianfar-slave". This will prevent gianfar MAC driver to probe on core1.
Signature · 3 lines
Anton Vorontsov email: [email protected] irc://irc.freenode.net/bd2
Re: [PATCH v3 3/4] powerpc/85xx: Move gianfar mdio nodes under the ethernet nodes
Quoted 6 lines · Anton Vorontsov
Quoted 2 lines · Anton Vorontsov
I don't see any better solution, should I just leave the core1's mdio node intact?
Ah. We also could change compatible entry to "fsl,gianfar-slave". This will prevent gianfar MAC driver to probe on core1.
...and also prevent it from probing the children, unless simple-bus is specified, or Linux is given special knowledge of the "fsl,gianfar-slave" name.
-Scott
Re: [PATCH v3 3/4] powerpc/85xx: Move gianfar mdio nodes under the ethernet nodes
Quoted 11 lines · Scott Wood
Quoted 6 lines · Anton Vorontsov
Quoted 2 lines · Anton Vorontsov
I don't see any better solution, should I just leave the core1's mdio node intact?
Ah. We also could change compatible entry to "fsl,gianfar-slave". This will prevent gianfar MAC driver to probe on core1.
...and also prevent it from probing the children, unless simple-bus is specified, or Linux is given special knowledge of the "fsl,gianfar-slave" name.
Yup. Do you see any problem with this?
Signature · 3 lines
Anton Vorontsov email: [email protected] irc://irc.freenode.net/bd2
Re: [PATCH v3 3/4] powerpc/85xx: Move gianfar mdio nodes under the ethernet nodes
Quoted 10 lines · Anton Vorontsov
Quoted 7 lines · Scott Wood
Quoted 5 lines · Anton Vorontsov
Quoted 2 lines · Anton Vorontsov
I don't see any better solution, should I just leave the core1's mdio node intact?
Ah. We also could change compatible entry to "fsl,gianfar-slave". This will prevent gianfar MAC driver to probe on core1.
...and also prevent it from probing the children, unless simple-bus is specified, or Linux is given special knowledge of the "fsl,gianfar-slave" name.
Yup. Do you see any problem with this?
Yes, the mdio node would not get probed. Why put it in the device tree at all then?
-Scott
Re: [PATCH v3 3/4] powerpc/85xx: Move gianfar mdio nodes under the ethernet nodes
Quoted 8 lines · Scott Wood
Quoted 7 lines · Anton Vorontsov
Quoted 6 lines · Scott Wood
Quoted 5 lines · Anton Vorontsov
Quoted 2 lines · Anton Vorontsov
I don't see any better solution, should I just leave the core1's mdio node intact?
Ah. We also could change compatible entry to "fsl,gianfar-slave". This will prevent gianfar MAC driver to probe on core1.
Quoted 8 lines
Quoted 5 lines
Quoted 3 lines
...and also prevent it from probing the children, unless simple-bus is specified, or Linux is given special knowledge of the "fsl,gianfar-slave" name.
Yup. Do you see any problem with this?
Yes, the mdio node would not get probed. Why put it in the device tree at all then?
I mean do you see any problem with giving Linux knowledge of the -slave name?
p.s.
Actually, we can stay with status = ".." property, and if things ever change, it's always driver's duty to check for of_device_is_available(), and so the driver can simply check for
if (!strcmp(status, "disabled on core"))
probe_children_only().
Signature · 3 lines
Anton Vorontsov email: [email protected] irc://irc.freenode.net/bd2
Re: [PATCH v3 3/4] powerpc/85xx: Move gianfar mdio nodes under the ethernet nodes
Quoted 2 lines · Anton Vorontsov
I mean do you see any problem with giving Linux knowledge of the -slave name?
I guess I don't really see the point, compared with just having a naked mdio node. The power management issue in this case should be addressed by ensuring that core0 never puts ethernet@24000 to sleep.
-Scott
Re: [PATCH v3 3/4] powerpc/85xx: Move gianfar mdio nodes under the ethernet nodes
Quoted 7 lines · Scott Wood
Quoted 2 lines · Anton Vorontsov
I mean do you see any problem with giving Linux knowledge of the -slave name?
I guess I don't really see the point, compared with just having a naked mdio node. The power management issue in this case should be addressed by ensuring that core0 never puts ethernet@24000 to sleep.
Amen.
If there'll be no further issues, I'll resend the patch set tomorrow.
Thanks!
Signature · 3 lines
Anton Vorontsov email: [email protected] irc://irc.freenode.net/bd2
Re: [PATCH v2 2/2] powerpc/83xx: Move gianfar mdio nodes under the ethernet nodes
In reply to Scott WoodQuoted 8 lines · Scott Wood
Quoted 2 lines · Anton Vorontsov
It would be great to have #include <
gianfar_enet.dts> facility in .dts files. ;-) I heard some rumors about this, what was the consequence?..You can already do a raw include, but in most cases it needs parameterized templates/macros to make it useful. There were some patches floating around for that, but there was some disagreement about syntax and the discussion seems to have died out.
Yeah - basically Jon got busy with other things, so we no longer had critical mass to keep things moving. I have an idea for a partway step that will be enough for at least some applications without making life awkward for a more complete approach later. Basically the idea is just to have "weak" property assignments - you can have an include file which has a bunch of these, but they can be silently overriden by normal property assignments afterwards.
Signature · 4 lines
David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
Re: [PATCH 6/6] powerpc/fsl_soc: Isolate legacy fsl_spi support to mpc832x_rdb boards
In reply to Anton VorontsovQuoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line
Quoted 1 line
"Anton" == Anton Vorontsov <[email protected]> writes:
Hi,
Anton> The advantages of this:
Anton> - Don't encourage legacy support;
Anton> - Less external symbols, less code to compile-in for !MPC832x_RDB
Anton> platforms.
It's nice with your cleanups, but I wonder how to handle more complicated chip select handling than simply toggling a single gpio.
I have a board (or 2 actually, but they are similar in this regard) with a mpc8347 using SPI to a number of addon boards. For signal integrity reasons the SPI signals are routed to a MUX, so the chip select logic has to set the MUX in addition to controlling the CS line of the device.
I've been using code like this since late 2007, but this patch ofcourse breaks it:
static void thinx_spi_activate_cs(u8 cs, u8 polarity)
{
static u8 old_cs = 255;
if (cs != old_cs) {
/* mux setup (cs 2:1)*/
gpio_set_value(gpio1 + GPIO_SPI_MUX_NOE, 1);
gpio_set_value(gpio1 + GPIO_SPI_MUX_SEL0, cs&2);
gpio_set_value(gpio1 + GPIO_SPI_MUX_SEL1, cs&4);
gpio_set_value(gpio1 + GPIO_SPI_MUX_NOE, 0);
old_cs = cs;
}
switch (cs) {
case 0: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL1, polarity); break;
case 1: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL2, polarity); break;
case 2: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT1, polarity); break;
case 3: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT2, polarity); break;
}
}static void thinx_spi_deactivate_cs(u8 cs, u8 polarity)
{
switch (cs) {
case 0: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL1, !polarity); break;
case 1: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL2, !polarity); break;
case 2: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT1, !polarity); break;
case 3: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT2, !polarity); break;
}
}static __init int thinx_spi_init(void)
{
struct device_node *np;
struct of_gpio_chip *gc;
static const int gpios[] = {
GPIO_SPI_CS_BKL1,
GPIO_SPI_CS_BKL2,
GPIO_SPI_CS_OPT1,
GPIO_SPI_CS_OPT2,
GPIO_SPI_MUX_NOE,
GPIO_SPI_MUX_SEL0,
GPIO_SPI_MUX_SEL1
};
int i;
np = of_find_node_by_name(NULL, "gpio-controller");
if (!np || !np->data) {
printk(KERN_ERR
"gpio1 node not found or controller not registerred\n");
return -ENODEV;
}
gc = np->data;
gpio1 = gc->gc.base;
for (i=0; i<ARRAY_SIZE(gpios); i++) {
gpio_request(gpio1 + gpios[i], "spi");
gpio_direction_output(gpio1 + gpios[i], 1);
}
fsl_spi_init(thinx_spi_boardinfo, ARRAY_SIZE(thinx_spi_boardinfo),
thinx_spi_activate_cs, thinx_spi_deactivate_cs);
return 0;
}Now, I don't quite see how to handle this with the new OF bindings - Any ideas?
Signature · 1 line
Bye, Peter Korsgaard
Re: [PATCH 6/6] powerpc/fsl_soc: Isolate legacy fsl_spi support to mpc832x_rdb boards
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"Peter" == Peter Korsgaard <[email protected]> writes:
Anyone? I've locally reverted the commit, but most likely I'm not the only one using the spi_mpc83xx driver without direct gpio controlled chip select handling.
Anton> The advantages of this:
Anton> - Don't encourage legacy support;
Anton> - Less external symbols, less code to compile-in for !MPC832x_RDB Anton> platforms.
Peter> It's nice with your cleanups, but I wonder how to handle more Peter> complicated chip select handling than simply toggling a single gpio.
Peter> I have a board (or 2 actually, but they are similar in this regard) Peter> with a mpc8347 using SPI to a number of addon boards. For signal Peter> integrity reasons the SPI signals are routed to a MUX, so the chip Peter> select logic has to set the MUX in addition to controlling the CS line Peter> of the device.
Peter> I've been using code like this since late 2007, but this patch Peter> ofcourse breaks it:
Peter> static void thinx_spi_activate_cs(u8 cs, u8 polarity) Peter> {
Peter> static u8 old_cs = 255;
Peter> if (cs != old_cs) {
Peter> /* mux setup (cs 2:1)*/
Peter> gpio_set_value(gpio1 + GPIO_SPI_MUX_NOE, 1);
Peter> gpio_set_value(gpio1 + GPIO_SPI_MUX_SEL0, cs&2);
Peter> gpio_set_value(gpio1 + GPIO_SPI_MUX_SEL1, cs&4);
Peter> gpio_set_value(gpio1 + GPIO_SPI_MUX_NOE, 0);
Peter> old_cs = cs;
Peter> }
Peter> switch (cs) {
Peter> case 0: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL1, polarity); break;
Peter> case 1: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL2, polarity); break;
Peter> case 2: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT1, polarity); break;
Peter> case 3: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT2, polarity); break;
Peter> }
Peter> }
Peter> static void thinx_spi_deactivate_cs(u8 cs, u8 polarity) Peter> {
Peter> switch (cs) {
Peter> case 0: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL1, !polarity); break;
Peter> case 1: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL2, !polarity); break;
Peter> case 2: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT1, !polarity); break;
Peter> case 3: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT2, !polarity); break;
Peter> }
Peter> }
Peter> static __init int thinx_spi_init(void)
Peter> {
Peter> struct device_node *np;
Peter> struct of_gpio_chip *gc;
Peter> static const int gpios[] = {
Peter> GPIO_SPI_CS_BKL1,
Peter> GPIO_SPI_CS_BKL2,
Peter> GPIO_SPI_CS_OPT1,
Peter> GPIO_SPI_CS_OPT2,
Peter> GPIO_SPI_MUX_NOE,
Peter> GPIO_SPI_MUX_SEL0,
Peter> GPIO_SPI_MUX_SEL1
Peter> };
Peter> int i;
Peter> np = of_find_node_by_name(NULL, "gpio-controller");
Peter> if (!np || !np->data) {
Peter> printk(KERN_ERR
Peter> "gpio1 node not found or controller not registerred\n");
Peter> return -ENODEV;
Peter> }
Peter> gc = np->data;
Peter> gpio1 = gc->gc.base;
Peter> for (i=0; i<ARRAY_SIZE(gpios); i++) {
Peter> gpio_request(gpio1 + gpios[i], "spi");
Peter> gpio_direction_output(gpio1 + gpios[i], 1);
Peter> }
Peter> fsl_spi_init(thinx_spi_boardinfo, ARRAY_SIZE(thinx_spi_boardinfo),
Peter> thinx_spi_activate_cs, thinx_spi_deactivate_cs);
Peter> return 0;
Peter> }
Peter> Now, I don't quite see how to handle this with the new OF bindings - Peter> Any ideas?
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Bye, Peter Korsgaard
Re: [PATCH 6/6] powerpc/fsl_soc: Isolate legacy fsl_spi support to mpc832x_rdb boards
In reply to Peter KorsgaardHi Peter,
Sorry for the late response (and don't hesitate to ping me if I don't answer, some things get lost in my inbox traffic, sorry).
Quoted 9 lines · Peter Korsgaard
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"Anton" == Anton Vorontsov <[email protected]> writes:
Hi,
Anton> The advantages of this:
Anton> - Don't encourage legacy support;
Anton> - Less external symbols, less code to compile-in for !MPC832x_RDB
Anton> platforms.
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It's nice with your cleanups, but I wonder how to handle more complicated chip select handling than simply toggling a single gpio.
I have a board (or 2 actually, but they are similar in this regard) with a mpc8347 using SPI to a number of addon boards. For signal integrity reasons the SPI signals are routed to a MUX, so the chip select logic has to set the MUX in addition to controlling the CS line of the device.
So that's just a bit complicated GPIO controller. I believe you should describe it in the device tree and use it's muxed lines as usual GPIOs.
Something ling
muxed_pio: gpio-controller@.. {
#gpio-cells = <2>;
compatible = "..,<board>-muxed-gpios";
reg = <...>;
gpios = <...>; <- specify pure BLK1, BLK2, OPT1, OPT2 GPIOs
gpio-controller;
};And then,
Quoted 16 lines
I've been using code like this since late 2007, but this patch ofcourse breaks it:
static void
thinx_spi_activate_cs(u8 cs, u8 polarity){ static u8 old_cs = 255; if (cs != old_cs) { /* mux setup (cs 2:1)*/ gpio_set_value(gpio1 + GPIO_SPI_MUX_NOE, 1); gpio_set_value(gpio1 + GPIO_SPI_MUX_SEL0, cs&2); gpio_set_value(gpio1 + GPIO_SPI_MUX_SEL1, cs&4); gpio_set_value(gpio1 + GPIO_SPI_MUX_NOE, 0); old_cs = cs; }
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switch (cs) {
case 0: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL1, polarity); break;
case 1: gpio_set_value(gpio1 + GPIO_SPI_CS_BKL2, polarity); break;
case 2: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT1, polarity); break;
case 3: gpio_set_value(gpio1 + GPIO_SPI_CS_OPT2, polarity); break;
}
}^^^ Put this logic into the "<board>-muxed-gpios" GPIO controller driver.
Then spi node would look like this:
spi-controller@.. {
...
gpios = <&muxed_pio cs1 0 /* muxed CS_BLK1 */
&muxed_pio cs2 0 /* muxed CS_BLK2 */
&muxed_pio cs3 0 /* muxed CS_OPT1 */
&muxed_pio cs4 0>; /* muxed CS_OPT2 */
};Hope this helps,
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Anton Vorontsov email: [email protected] irc://irc.freenode.net/bd2