target-ppc: add integer Altivec instructions
PATCH 1/1 target-ppc: add integer Altivec instructions
This patch series adds support for integer Altivec instructions to QEMU, including element-wise loads and stores. It's rather long (42 individual patches), so to avoid patch-bombing the list, I've placed the patch series at:
http://www.method-combination.net/qemu/altivec-patches/
For easier viewing of the whole series, there's also one comprehensive patch:
http://www.method-combination.net/qemu/altivec-patches/0000-BIG-PATCH.patch
diffstat says:
target-ppc/cpu.h | 10 + target-ppc/helper.h | 127 +++++++ target-ppc/op_helper.c | 862 ++++++++++++++++++++++++++++++++++++++++++++++++ target-ppc/translate.c | 416 +++++++++++++++++++++++ 4 files changed, 1415 insertions(+), 0 deletions(-)
Why only the integer instructions? I originally wrote support for the whole instruction set, but I did it in the days of dyngen. So a straight forward-port was out of the question. The original patch also sloppily used native float, rather than float32, and used C99 math functions to implement some of the more exotic Altivec instructions. Both of these decisions mean that some care has to be taken in porting the floating-point instructions.
I figured it'd be better to push out the integer instructions now and the floating-point instructions later, rather than waiting for some unspecified time for full support. (After all, target-ppc has done just fine with only {l,st}vx{,l}, almost anything additional is an improvement!)
Comments and/or commits on my behalf welcome. :)
-Nathan
I get a 403 forbidden error when trying to access http://www.method-combination.net/qemu/altivec-patches/
Quoted 2 lines
Quoted 40 lines · Nathan Froyd
This patch series adds support for integer Altivec instructions to QEMU, including element-wise loads and stores. It's rather long (42 individual patches), so to avoid patch-bombing the list, I've placed the patch series at:
http://www.method-combination.net/qemu/altivec-patches/
For easier viewing of the whole series, there's also one comprehensive patch:
http://www.method-combination.net/qemu/altivec-patches/0000-BIG-PATCH.patch
diffstat says:
target-ppc/cpu.h | 10 + target-ppc/helper.h | 127 +++++++ target-ppc/op_helper.c | 862 +++++++++++++++++++++++++++++++++++++++ +++++++++ target-ppc/translate.c | 416 +++++++++++++++++++++++ 4 files changed, 1415 insertions(+), 0 deletions(-)Why only the integer instructions? I originally wrote support for the whole instruction set, but I did it in the days of dyngen. So a straight forward-port was out of the question. The original patch also sloppily used native float, rather than float32, and used C99 math functions to implement some of the more exotic Altivec instructions. Both of these decisions mean that some care has to be taken in porting the floating-point instructions.
I figured it'd be better to push out the integer instructions now and the floating-point instructions later, rather than waiting for some unspecified time for full support. (After all, target-ppc has done just fine with only {l,st}vx{,l}, almost anything additional is an improvement!)
Comments and/or commits on my behalf welcome. :)
-Nathan
Quoted 2 lines · C.W. Betts
I get a 403 forbidden error when trying to access
http://www.method-combination.net/qemu/altivec-patches/
Whoops, sorry about that. Fixed now. (Accessing files by name worked, of course, but that only helped for the big patch.)
-Nathan
Quoted 6 lines · Nathan Froyd
This patch series adds support for integer Altivec instructions to QEMU, including element-wise loads and stores. It's rather long (42 individual patches), so to avoid patch-bombing the list, I've placed the patch series at:
Please patch-bomb instead, so we have patch and related discussion (and signed-off lines) in the same mail archive.
Thiemo