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Driver for the Synopsys DesignWare SPI master

RFC PATCH New Baruch Siach 1 participant 1 message Jan 5, 2009 SPI

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RFC PATCH 1/1 Driver for the Synopsys DesignWare SPI master

This is a driver for the Synopsys DesignWare SPI master. This driver was tested with an SPI flash device (m25p32), and an SPI Ethernet interface (enc28j60), using their mainline drivers. spidev was also tested with a custom SPI device.

---

 drivers/spi/Kconfig            |    6 
 drivers/spi/Makefile           |    1 
 drivers/spi/designware_spi.c   |  678 ++++++++++++++++++++++++++++++++++++++++
 include/linux/spi/designware.h |   10 +
 4 files changed, 695 insertions(+), 0 deletions(-)
 create mode 100644 drivers/spi/designware_spi.c
 create mode 100644 include/linux/spi/designware.h
drivers/spi/Kconfig +6 -0
index b9d0efb..ece3d39 100644
@@ -100,6 +100,12 @@ config SPI_BUTTERFLY
 	  inexpensive battery powered microcontroller evaluation board.
 	  This same cable can be used to flash new firmware.
 
+config SPI_DESIGNWARE
+	tristate "Synopsys DesignWare SPI controller"
+	depends on ARCH_PVG610 && SPI_MASTER
+	help
+	  SPI controller driver for the Synopsys DesignWare DW_apb_ssi.
+
 config SPI_IMX
 	tristate "Freescale iMX SPI controller"
 	depends on ARCH_IMX && EXPERIMENTAL
drivers/spi/Makefile +1 -0
index ccf18de..b033105 100644
@@ -16,6 +16,7 @@ obj-$(CONFIG_SPI_BFIN)			+= spi_bfin5xx.o
 obj-$(CONFIG_SPI_BITBANG)		+= spi_bitbang.o
 obj-$(CONFIG_SPI_AU1550)		+= au1550_spi.o
 obj-$(CONFIG_SPI_BUTTERFLY)		+= spi_butterfly.o
+obj-$(CONFIG_SPI_DESIGNWARE)		+= designware_spi.o
 obj-$(CONFIG_SPI_IMX)			+= spi_imx.o
 obj-$(CONFIG_SPI_LM70_LLP)		+= spi_lm70llp.o
 obj-$(CONFIG_SPI_PXA2XX)		+= pxa2xx_spi.o
drivers/spi/designware_spi.c new file +678 -0

678 lines not on this page · raw message

include/linux/spi/designware.h new file +10 -0
new file mode 100644
index 0000000..26427cd
@@ -0,0 +1,10 @@
+/*
+ * designware.h - platform glue for the Synopsys DesignWare SPI controller
+ */
+
+struct designware_platform_data {
+	unsigned int	ssi_clk;	/* clock in Hz */
+	unsigned int	tx_fifo_depth;	/* bytes in TX FIFO */
+	unsigned int	rx_fifo_depth;	/* bytes in RX FIFO */
+	u16		num_chipselect;	/* number of CSs */
+};
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