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Omap fixes for 2.6.29-rc series, also one arm generic fix

PATCH In review Tony Lindgren 3 participants 24 messages Jan 28, 2009 – Jan 29, 2009

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Tony Lindgren

author maintainer
#0 lore raw

cover Omap fixes for 2.6.29-rc series, also one arm generic fix

Hi,

Here are few more fixes for omap. The first patch in the series "Do early I/O mapping if spinlock debugging is enabled" may also help other platforms.

Regards,

Tony

---

Aaro Koskinen (1):
ARM: OMAP: gptimer min_delta_ns corrected

Jarkko Nikula (1):
ARM: OMAP: DMA: Fix uninitialized channel flags

Juha Yrjola (2):
ARM: OMAP: Fix race in OMAP2/3 DMA IRQ handling
ARM: Do early I/O mapping if spinlock debugging is enabled

Kevin Hilman (1):
ARM: OMAP: fix fault in enter_full_retention()

Stanley.Miao (1):
ARM: OMAP: Fix McBSP spin_lock deadlock

Tony Lindgren (2):
ARM: OMAP: Fix hsmmc init
ARM: OMAP: Fix omap34xx revision detection for ES3.1

김규원 (1):
ARM: OMAP: Mask interrupts when disabling interrupts

 arch/arm/kernel/head.S                  |    2 
 arch/arm/mach-omap1/mcbsp.c             |   98 ++-------------------
 arch/arm/mach-omap2/id.c                |    6 +
 arch/arm/mach-omap2/irq.c               |    6 +
 arch/arm/mach-omap2/mcbsp.c             |  145 +++++--------------------------
 arch/arm/mach-omap2/sleep24xx.S         |    3 -
 arch/arm/mach-omap2/timer-gp.c          |    3 -
 arch/arm/plat-omap/devices.c            |    8 +-
 arch/arm/plat-omap/dma.c                |    5 +
 arch/arm/plat-omap/include/mach/cpu.h   |    1 
 arch/arm/plat-omap/include/mach/mcbsp.h |    6 +
 arch/arm/plat-omap/mcbsp.c              |   52 ++++++++---
 12 files changed, 104 insertions(+), 231 deletions(-)
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author maintainer
#1 lore raw

PATCH 1/9 ARM: Do early I/O mapping if spinlock debugging is enabled

From: Juha Yrjola <[email protected]>

At least on OMAP, sched_clock() requires the I/O maps to be initialized. Spinlock debugging invokes sched_clock() very early.

---
 arch/arm/kernel/head.S |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/kernel/head.S +1 -1
index 21e17dc..1bc918c 100644
@@ -282,7 +282,7 @@ __create_page_tables:
 	.endif
 	str	r6, [r0]
 
-#ifdef CONFIG_DEBUG_LL
+#if defined(CONFIG_DEBUG_LL) || defined(CONFIG_DEBUG_SPINLOCK)
 	ldr	r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags
 	/*
 	 * Map in IO space for serial debugging.
author maintainer
#5 lore raw

PATCH 2/9 ARM: OMAP: Fix McBSP spin_lock deadlock

In reply to Tony Lindgren

From: Stanley.Miao <[email protected]>

A spin_lock deadlock will occur when omap_mcbsp_request() is invoked.

omap_mcbsp_request()
\- clk_enable(mcbsp->clk) [takes and holds clockfw_lock]

    \- omap2_clk_enable()
       \- _omap2_clk_enable()
           \- omap_mcbsp_clk_enable()
              \- clk_enable(child clock)   [tries for clockfw_lock again]

mcbsp_clk is a virtual clock and it comprises several child clocks. when enable mcbsp_clk in omap_mcbsp_request(), the enable function of mcbsp_clk will enable its child clocks, then the deadlock occurs.

The solution is to remove the virtual clock and enable these child clocks in omap_mcbsp_request() directly.

---
 arch/arm/mach-omap1/mcbsp.c             |   98 ++-------------------
 arch/arm/mach-omap2/mcbsp.c             |  145 +++++--------------------------
 arch/arm/plat-omap/include/mach/mcbsp.h |    6 +
 arch/arm/plat-omap/mcbsp.c              |   52 ++++++++---
 4 files changed, 78 insertions(+), 223 deletions(-)
arch/arm/mach-omap1/mcbsp.c +10 -88
index ca7a0cc..575ba31 100644
@@ -28,81 +28,8 @@
 #define DPS_RSTCT2_PER_EN	(1 << 0)
 #define DSP_RSTCT2_WD_PER_EN	(1 << 1)
 
-struct mcbsp_internal_clk {
-	struct clk clk;
-	struct clk **childs;
-	int n_childs;
-};
-
 #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
-static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
-{
-	const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" };
-	int i;
-
-	mclk->n_childs = ARRAY_SIZE(clk_names);
-	mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *),
-				GFP_KERNEL);
-
-	for (i = 0; i < mclk->n_childs; i++) {
-		/* We fake a platform device to get correct device id */
-		struct platform_device pdev;
-
-		pdev.dev.bus = &platform_bus_type;
-		pdev.id = mclk->clk.id;
-		mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]);
-		if (IS_ERR(mclk->childs[i]))
-			printk(KERN_ERR "Could not get clock %s (%d).\n",
-				clk_names[i], mclk->clk.id);
-	}
-}
-
-static int omap_mcbsp_clk_enable(struct clk *clk)
-{
-	struct mcbsp_internal_clk *mclk = container_of(clk,
-					struct mcbsp_internal_clk, clk);
-	int i;
-
-	for (i = 0; i < mclk->n_childs; i++)
-		clk_enable(mclk->childs[i]);
-	return 0;
-}
-
-static void omap_mcbsp_clk_disable(struct clk *clk)
-{
-	struct mcbsp_internal_clk *mclk = container_of(clk,
-					struct mcbsp_internal_clk, clk);
-	int i;
-
-	for (i = 0; i < mclk->n_childs; i++)
-		clk_disable(mclk->childs[i]);
-}
-
-static struct mcbsp_internal_clk omap_mcbsp_clks[] = {
-	{
-		.clk = {
-			.name 		= "mcbsp_clk",
-			.id		= 1,
-			.enable		= omap_mcbsp_clk_enable,
-			.disable	= omap_mcbsp_clk_disable,
-		},
-	},
-	{
-		.clk = {
-			.name 		= "mcbsp_clk",
-			.id		= 3,
-			.enable		= omap_mcbsp_clk_enable,
-			.disable	= omap_mcbsp_clk_disable,
-		},
-	},
-};
-
-#define omap_mcbsp_clks_size	ARRAY_SIZE(omap_mcbsp_clks)
-#else
-#define omap_mcbsp_clks_size	0
-static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks;
-static inline void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk)
-{ }
+const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" };
 #endif
 
 static void omap1_mcbsp_request(unsigned int id)
@@ -167,8 +94,9 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
 		.rx_irq		= INT_McBSP1RX,
 		.tx_irq		= INT_McBSP1TX,
 		.ops		= &omap1_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
-		},
+		.clk_names	= clk_names,
+		.num_clks	= 3,
+	},
 	{
 		.phys_base	= OMAP1510_MCBSP2_BASE,
 		.dma_rx_sync	= OMAP_DMA_MCBSP2_RX,
@@ -184,7 +112,8 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
 		.rx_irq		= INT_McBSP3RX,
 		.tx_irq		= INT_McBSP3TX,
 		.ops		= &omap1_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.clk_names	= clk_names,
+		.num_clks	= 3,
 	},
 };
 #define OMAP15XX_MCBSP_PDATA_SZ		ARRAY_SIZE(omap15xx_mcbsp_pdata)
@@ -202,7 +131,8 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
 		.rx_irq		= INT_McBSP1RX,
 		.tx_irq		= INT_McBSP1TX,
 		.ops		= &omap1_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.clk_names	= clk_names,
+		.num_clks	= 3,
 	},
 	{
 		.phys_base	= OMAP1610_MCBSP2_BASE,
@@ -219,7 +149,8 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
 		.rx_irq		= INT_McBSP3RX,
 		.tx_irq		= INT_McBSP3TX,
 		.ops		= &omap1_mcbsp_ops,
-		.clk_name	= "mcbsp_clk",
+		.clk_names	= clk_names,
+		.num_clks	= 3,
 	},
 };
 #define OMAP16XX_MCBSP_PDATA_SZ		ARRAY_SIZE(omap16xx_mcbsp_pdata)
@@ -230,15 +161,6 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
 
 int __init omap1_mcbsp_init(void)
 {
-	int i;
-
-	for (i = 0; i < omap_mcbsp_clks_size; i++) {
-		if (cpu_is_omap15xx() || cpu_is_omap16xx()) {
-			omap_mcbsp_clk_init(&omap_mcbsp_clks[i]);
-			clk_register(&omap_mcbsp_clks[i].clk);
-		}
-	}
-
 	if (cpu_is_omap730())
 		omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ;
 	if (cpu_is_omap15xx())
arch/arm/mach-omap2/mcbsp.c +25 -120

229 lines not on this page · raw message

arch/arm/plat-omap/include/mach/mcbsp.h +4 -2
index eef873d..113c246 100644
@@ -344,7 +344,8 @@ struct omap_mcbsp_platform_data {
 	u8 dma_rx_sync, dma_tx_sync;
 	u16 rx_irq, tx_irq;
 	struct omap_mcbsp_ops *ops;
-	char const *clk_name;
+	char const **clk_names;
+	int num_clks;
 };
 
 struct omap_mcbsp {
@@ -376,7 +377,8 @@ struct omap_mcbsp {
 	/* Protect the field .free, while checking if the mcbsp is in use */
 	spinlock_t lock;
 	struct omap_mcbsp_platform_data *pdata;
-	struct clk *clk;
+	struct clk **clks;
+	int num_clks;
 };
 extern struct omap_mcbsp **mcbsp_ptr;
 extern int omap_mcbsp_count;
arch/arm/plat-omap/mcbsp.c +39 -13

109 lines not on this page · raw message

author maintainer
#11 lore raw

PATCH 3/9 ARM: OMAP: Fix race in OMAP2/3 DMA IRQ handling

In reply to Tony Lindgren

From: Juha Yrjola <[email protected]>

CSR must be cleared before invoking the callback.

If the callback function starts a new, fast DMA transfer on the same channel, the completion status might lost if CSR is cleared after the callback invocation.

---
 arch/arm/plat-omap/dma.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)
arch/arm/plat-omap/dma.c +2 -2
index e77373c..bec8e36 100644
@@ -1888,11 +1888,11 @@ static int omap2_dma_handle_ch(int ch)
 		status = dma_read(CSR(ch));
 	}
 
+	dma_write(status, CSR(ch));
+
 	if (likely(dma_chan[ch].callback != NULL))
 		dma_chan[ch].callback(ch, status, dma_chan[ch].data);
 
-	dma_write(status, CSR(ch));
-
 	return 0;
 }
 
author maintainer
#12 lore raw

PATCH 4/9 ARM: OMAP: DMA: Fix uninitialized channel flags

In reply to Tony Lindgren

From: Jarkko Nikula <[email protected]>

This has similar symptoms than 66c23551b1b774e2be3c7bdf91c0ebf2c7a3519e where just omap_request_dma, omap_dma_link_lch and omap_dma_unlink_lch can cause incorrect dump_stack(). Here it can happen if channel has been used before and the channel flags variable holds old status.

---
 arch/arm/plat-omap/dma.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)
arch/arm/plat-omap/dma.c +1 -0
index bec8e36..47ec77a 100644
@@ -709,6 +709,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
 	chan->dev_name = dev_name;
 	chan->callback = callback;
 	chan->data = data;
+	chan->flags = 0;
 
 #ifndef CONFIG_ARCH_OMAP1
 	if (cpu_class_is_omap2()) {
author maintainer
#13 lore raw

PATCH 5/9 ARM: OMAP: Fix omap34xx revision detection for ES3.1

In reply to Tony Lindgren

Fix omap34xx revision detection for ES3.1

---
 arch/arm/mach-omap2/id.c              |    6 +++++-
 arch/arm/plat-omap/include/mach/cpu.h |    1 +
 2 files changed, 6 insertions(+), 1 deletions(-)
arch/arm/mach-omap2/id.c +5 -1
index b0f8e7d..b52a02f 100644
@@ -172,9 +172,13 @@ void __init omap34xx_check_revision(void)
 			omap_revision = OMAP3430_REV_ES3_0;
 			rev_name = "ES3.0";
 			break;
+		case 4:
+			omap_revision = OMAP3430_REV_ES3_1;
+			rev_name = "ES3.1";
+			break;
 		default:
 			/* Use the latest known revision as default */
-			omap_revision = OMAP3430_REV_ES3_0;
+			omap_revision = OMAP3430_REV_ES3_1;
 			rev_name = "Unknown revision\n";
 		}
 	}
arch/arm/plat-omap/include/mach/cpu.h +1 -0
index b2062f1..a8e1178 100644
@@ -339,6 +339,7 @@ IS_OMAP_TYPE(3430, 0x3430)
 #define OMAP3430_REV_ES2_0	0x34301034
 #define OMAP3430_REV_ES2_1	0x34302034
 #define OMAP3430_REV_ES3_0	0x34303034
+#define OMAP3430_REV_ES3_1	0x34304034
 
 /*
  * omap_chip bits
author maintainer
#14 lore raw

PATCH 6/9 ARM: OMAP: Fix hsmmc init

In reply to Tony Lindgren

It accidentally broke while changing the name for the driver to not to conflict with the other mmc driver.

---
 arch/arm/plat-omap/devices.c |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)
arch/arm/plat-omap/devices.c +7 -1
index ac15c23..d22529c 100644
@@ -205,9 +205,15 @@ int __init omap_mmc_add(int id, unsigned long base, unsigned long size,
 {
 	struct platform_device *pdev;
 	struct resource res[OMAP_MMC_NR_RES];
+	char *name;
 	int ret;
 
-	pdev = platform_device_alloc("mmci-omap", id);
+	if (cpu_class_is_omap1() || cpu_is_omap242x())
+		name = "mmci-omap";
+	else
+		name = "mmci-omap-hs";
+
+	pdev = platform_device_alloc(name, id);
 	if (!pdev)
 		return -ENOMEM;
 
author maintainer
#17 lore raw

PATCH 7/9 ARM: OMAP: gptimer min_delta_ns corrected

In reply to Tony Lindgren

From: Aaro Koskinen <[email protected]>

When 32 kHz timer is used the min_delta_ns should be initialized so that it reflects the timer programming cost. A write to the timer device will be usually posted, but it takes roughly 3 cycles before it is effective. If the timer is reprogrammed before that, the CPU will stall until the previous write completes. This was pointed out by Richard Woodruff.

Since the lower bound for min_delta_ns is 1000, the change is visible only with tick rates less than 3 MHz.

Also note that the old value is incorrect for 32 kHz also due to a rounding error, and it can cause the timer queue to hang (due to clockevent code trying to program the timer with zero ticks).

---
 arch/arm/mach-omap2/timer-gp.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)
arch/arm/mach-omap2/timer-gp.c +2 -1
index ae60363..9fc13a2 100644
@@ -118,7 +118,8 @@ static void __init omap2_gp_clockevent_init(void)
 	clockevent_gpt.max_delta_ns =
 		clockevent_delta2ns(0xffffffff, &clockevent_gpt);
 	clockevent_gpt.min_delta_ns =
-		clockevent_delta2ns(1, &clockevent_gpt);
+		clockevent_delta2ns(3, &clockevent_gpt);
+		/* Timer internal resynch latency. */
 
 	clockevent_gpt.cpumask = cpumask_of(0);
 	clockevents_register_device(&clockevent_gpt);
author maintainer
#18 lore raw

PATCH 8/9 ARM: OMAP: Mask interrupts when disabling interrupts

In reply to Tony Lindgren

From: 김규원 <[email protected]>

By Ingo Molnar, interrupts are not masked by default. (refer to 76d2160147f43f982dfe881404cfde9fd0a9da21)

But if interrupts are not masked, the processor can wake up while in Suspend-to-RAM state by an external interrupt. For example, if an OMAP3 board is connected to Host PC by USB and entered to Suspend-to-RAM state, it wake up automatically by M_IRQ_92. The disable_irq() function can't disable the interrupt in H/W level, So I modified arch/arm/mach-omap2/irq.c

---
 arch/arm/mach-omap2/irq.c |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/irq.c +6 -0
index 636e282..52772f9 100644
@@ -123,6 +123,11 @@ static void omap_unmask_irq(unsigned int irq)
 	intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset);
 }
 
+static void omap_disable_irq(unsigned int irq)
+{
+	omap_mask_irq(irq);
+}
+
 static void omap_mask_ack_irq(unsigned int irq)
 {
 	omap_mask_irq(irq);
@@ -134,6 +139,7 @@ static struct irq_chip omap_irq_chip = {
 	.ack	= omap_mask_ack_irq,
 	.mask	= omap_mask_irq,
 	.unmask	= omap_unmask_irq,
+	.disable = omap_disable_irq,
 };
 
 static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)

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author maintainer
#21 lore raw

PATCH 9/9 ARM: OMAP: fix fault in enter_full_retention()

In reply to Tony Lindgren

From: Kevin Hilman <[email protected]>

In omap24xx_cpu_suspend assembly routine, the r2 register which holds the address of the SDRC_POWER reg is set to zero before the value is written back triggering a fault due to writing to address zero.

It's hard to tell where this change was introduced since this file has been moved and merged.

While this fix prevents a crash, suspend on my n810 is broken with current kernels. I never come out of suspend.

---
 arch/arm/mach-omap2/sleep24xx.S |    3 +--
 1 files changed, 1 insertions(+), 2 deletions(-)
arch/arm/mach-omap2/sleep24xx.S +1 -2
index 43336b9..bf9e961 100644
@@ -93,9 +93,8 @@ ENTRY(omap24xx_cpu_suspend)
 	orr	r4, r4, #0x40		@ enable self refresh on idle req
 	mov	r5, #0x2000		@ set delay (DPLL relock + DLL relock)
 	str	r4, [r2]		@ make it so
-	mov	r2, #0
 	nop
-	mcr	p15, 0, r2, c7, c0, 4	@ wait for interrupt
+	mcr	p15, 0, r3, c7, c0, 4	@ wait for interrupt
 	nop
 loop:
 	subs	r5, r5, #0x1		@ awake, wait just a bit
#2 lore raw

Re: [PATCH 1/9] ARM: Do early I/O mapping if spinlock debugging is enabled

In reply to Tony Lindgren
Quoted 4 lines · Tony Lindgren

From: Juha Yrjola <[email protected]>

At least on OMAP, sched_clock() requires the I/O maps to be initialized. Spinlock debugging invokes sched_clock() very early.

NAK. This doesn't and can't work on every platform out there. The only viable fix is that sched_clock() must NOT be used early.

If the kernel is using sched_clock() early, that's a bug.

#19 lore raw

Re: [PATCH 8/9] ARM: OMAP: Mask interrupts when disabling interrupts

In reply to Tony Lindgren
Quoted 35 lines · Tony Lindgren

From: 김규원 <[email protected]>

By Ingo Molnar, interrupts are not masked by default. (refer to 76d2160147f43f982dfe881404cfde9fd0a9da21)

But if interrupts are not masked, the processor can wake up while in Suspend-to-RAM state by an external interrupt. For example, if an OMAP3 board is connected to Host PC by USB and entered to Suspend-to-RAM state, it wake up automatically by M_IRQ_92. The disable_irq() function can't disable the interrupt in H/W level, So I modified arch/arm/mach-omap2/irq.c

---
 arch/arm/mach-omap2/irq.c |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/irq.c +5 -0
index 636e282..52772f9 100644
@@ -123,6 +123,11 @@ static void omap_unmask_irq(unsigned int irq)
 	intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset);
 }
 
+static void omap_disable_irq(unsigned int irq)
+{
+	omap_mask_irq(irq);
+}
+
 static void omap_mask_ack_irq(unsigned int irq)
 {
 	omap_mask_irq(irq);

arch/arm/mach-omap2/irq.c static struct irq_chip omap_irq_chip = { · line 142

Quoted 4 lines
arch/arm/mach-omap2/irq.c +1 -0
@@ -134,6 +139,7 @@ static struct irq_chip omap_irq_chip = {
 	.ack	= omap_mask_ack_irq,
 	.mask	= omap_mask_irq,
 	.unmask	= omap_unmask_irq,
+	.disable = omap_disable_irq,

There's no need for the indirection - omap_mask_irq() already has the required prototype for the .disable function. So this patch should just be adding:

.disable = omap_mask_irq,
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author maintainer
#20 lore raw

Re: [PATCH 8/9] ARM: OMAP: Mask interrupts when disabling interrupts, v2

Quoted 45 lines · Russell King - ARM Linux
Quoted 35 lines · Tony Lindgren

From: 김규원 <[email protected]>

By Ingo Molnar, interrupts are not masked by default. (refer to 76d2160147f43f982dfe881404cfde9fd0a9da21)

But if interrupts are not masked, the processor can wake up while in Suspend-to-RAM state by an external interrupt. For example, if an OMAP3 board is connected to Host PC by USB and entered to Suspend-to-RAM state, it wake up automatically by M_IRQ_92. The disable_irq() function can't disable the interrupt in H/W level, So I modified arch/arm/mach-omap2/irq.c

---
 arch/arm/mach-omap2/irq.c |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/irq.c +5 -0
index 636e282..52772f9 100644
@@ -123,6 +123,11 @@ static void omap_unmask_irq(unsigned int irq)
 	intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset);
 }
 
+static void omap_disable_irq(unsigned int irq)
+{
+	omap_mask_irq(irq);
+}
+
 static void omap_mask_ack_irq(unsigned int irq)
 {
 	omap_mask_irq(irq);

arch/arm/mach-omap2/irq.c static struct irq_chip omap_irq_chip = { · line 142

Quoted 4 lines
arch/arm/mach-omap2/irq.c +1 -0
@@ -134,6 +139,7 @@ static struct irq_chip omap_irq_chip = {
 	.ack	= omap_mask_ack_irq,
 	.mask	= omap_mask_irq,
 	.unmask	= omap_unmask_irq,
+	.disable = omap_disable_irq,

There's no need for the indirection - omap_mask_irq() already has the required prototype for the .disable function. So this patch should just be adding:

Quoted 1 line

.disable = omap_mask_irq,

OK, here's the updated patch.

Tony

Quoted 1 line

From 12db1a5a7e0de12b643c2666f95f4840942aad49 Mon Sep 17 00:00:00 2001

From: =?utf-8?q?=EA=B9=80=EA=B7=9C=EC=9B=90?= <[email protected]>
Date: Tue, 27 Jan 2009 12:58:16 -0800
Subject: [PATCH] ARM: OMAP: Mask interrupts when disabling interrupts, v2

By Ingo Molnar, interrupts are not masked by default. (refer to 76d2160147f43f982dfe881404cfde9fd0a9da21)

But if interrupts are not masked, the processor can wake up while in Suspend-to-RAM state by an external interrupt. For example, if an OMAP3 board is connected to Host PC by USB and entered to Suspend-to-RAM state, it wake up automatically by M_IRQ_92. The disable_irq() function can't disable the interrupt in H/W level, So I modified arch/arm/mach-omap2/irq.c

arch/arm/mach-omap2/irq.c +1 -0
index 636e282..9ba20d9 100644
@@ -134,6 +134,7 @@ static struct irq_chip omap_irq_chip = {
 	.ack	= omap_mask_ack_irq,
 	.mask	= omap_mask_irq,
 	.unmask	= omap_unmask_irq,
+	.disable = omap_mask_irq,
 };
 
 static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank)
#15 lore raw

Re: [PATCH 6/9] ARM: OMAP: Fix hsmmc init

In reply to Tony Lindgren
Quoted 19 lines · Tony Lindgren

It accidentally broke while changing the name for the driver to not to conflict with the other mmc driver.

---
 arch/arm/plat-omap/devices.c |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)
arch/arm/plat-omap/devices.c +1 -0
index ac15c23..d22529c 100644
@@ -205,9 +205,15 @@ int __init omap_mmc_add(int id, unsigned long base, unsigned long size,
 {
 	struct platform_device *pdev;
 	struct resource res[OMAP_MMC_NR_RES];
+	char *name;
 	int ret;
 

arch/arm/plat-omap/devices.c int __init omap_mmc_add(int id, unsigned long base, unsigned long size, · line 219

Quoted 10 lines
arch/arm/plat-omap/devices.c +6 -1
-	pdev = platform_device_alloc("mmci-omap", id);
+	if (cpu_class_is_omap1() || cpu_is_omap242x())
+		name = "mmci-omap";
+	else
+		name = "mmci-omap-hs";
+
+	pdev = platform_device_alloc(name, id);
 	if (!pdev)
 		return -ENOMEM;
 

This is error prone. I suggest instead:

int __init omap_mmc_add(const char *name, int id, unsigned long base,
unsigned long size, unsigned int irq, struct omap_mmc_platform_data *data)

and moving that conditional up a level - OMAP1 not having it conditional, and OMAP2 having the condition there along side the other in omap2_init_mmc.

And, it's already in error. Look at these two conditionals closely:

from plat-omap/devices.c:
+ if (cpu_class_is_omap1() || cpu_is_omap242x())
+ name = "mmci-omap";
+ else
+ name = "mmci-omap-hs";

and from mach-omap2/devices.c::omap2_init_mmc():

                if (cpu_is_omap2420())
                        size = OMAP2420_MMC_SIZE;
                else
                        size = HSMMC_SIZE;

These disagree about which CPUs have HSMMC and which don't.

#6 lore raw

Re: [PATCH 2/9] ARM: OMAP: Fix McBSP spin_lock deadlock

In reply to Tony Lindgren
Quoted 6 lines · Tony Lindgren

From: Stanley.Miao <[email protected]>

A spin_lock deadlock will occur when omap_mcbsp_request() is invoked.

omap_mcbsp_request()
\- clk_enable(mcbsp->clk) [takes and holds clockfw_lock]

Quoted 8 lines
    \- omap2_clk_enable()
       \- _omap2_clk_enable()
           \- omap_mcbsp_clk_enable()
              \- clk_enable(child clock)   [tries for clockfw_lock again]

mcbsp_clk is a virtual clock and it comprises several child clocks. when enable mcbsp_clk in omap_mcbsp_request(), the enable function of mcbsp_clk will enable its child clocks, then the deadlock occurs.

I'm debating about this. On one hand, it looks like this has been like this for approaching six months, so what's a few more months to wait for the clkdev stuff.

On the other hand, we probably need this fix. The question is, are there real problems being caused by this, or is this patch just the result of code analysis? And can these problems be produced with mainline (iow, do we have enough other code merged to expose this)?

author maintainer
#7 lore raw

Re: [PATCH 2/9] ARM: OMAP: Fix McBSP spin_lock deadlock

Quoted 12 lines · Russell King - ARM Linux
Quoted 11 lines · Tony Lindgren

From: Stanley.Miao <[email protected]>

A spin_lock deadlock will occur when omap_mcbsp_request() is invoked.

omap_mcbsp_request()
\- clk_enable(mcbsp->clk) [takes and holds clockfw_lock]

    \- omap2_clk_enable()
       \- _omap2_clk_enable()
           \- omap_mcbsp_clk_enable()
              \- clk_enable(child clock)   [tries for clockfw_lock again]
Quoted 7 lines
Quoted 3 lines

mcbsp_clk is a virtual clock and it comprises several child clocks. when enable mcbsp_clk in omap_mcbsp_request(), the enable function of mcbsp_clk will enable its child clocks, then the deadlock occurs.

I'm debating about this. On one hand, it looks like this has been like this for approaching six months, so what's a few more months to wait for the clkdev stuff.

Yeah that's why we've been going back and forth with this on the linux-omap list.

Quoted 4 lines

On the other hand, we probably need this fix. The question is, are there real problems being caused by this, or is this patch just the result of code analysis? And can these problems be produced with mainline (iow, do we have enough other code merged to expose this)?

AFAIK it happens in the mainline with CONFIG_PREMEPT and ASoC.

Tony

#3 lore raw

Re: [PATCH 1/9] ARM: Do early I/O mapping if spinlock debugging is enabled

In reply to Russell King - ARM Linux
Quoted 8 lines · Russell King - ARM Linux
Quoted 3 lines

At least on OMAP, sched_clock() requires the I/O maps to be initialized. Spinlock debugging invokes sched_clock() very early.

NAK.  This doesn't and can't work on every platform out there.  The only viable fix is that sched_clock() must NOT be used early.

If the kernel is using sched_clock() early, that's a bug.

So you're saying that spinlock debugging is buggy???

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#8 lore raw

Re: [PATCH 2/9] ARM: OMAP: Fix McBSP spin_lock deadlock

In reply to Tony Lindgren
Quoted 6 lines · Tony Lindgren
Quoted 4 lines

On the other hand, we probably need this fix.  The question is, are there real problems being caused by this, or is this patch just the result of code analysis?  And can these problems be produced with mainline (iow, do we have enough other code merged to expose this)?

AFAIK it happens in the mainline with CONFIG_PREMEPT and ASoC.

I thought it was just spinlock debugging, period.

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author maintainer
#9 lore raw

Re: [PATCH 2/9] ARM: OMAP: Fix McBSP spin_lock deadlock

Quoted 9 lines · David Brownell
Quoted 6 lines · Tony Lindgren
Quoted 4 lines

On the other hand, we probably need this fix.  The question is, are there real problems being caused by this, or is this patch just the result of code analysis?  And can these problems be produced with mainline (iow, do we have enough other code merged to expose this)?

AFAIK it happens in the mainline with CONFIG_PREMEPT and ASoC.

I thought it was just spinlock debugging, period.

Yeah right, that's all there is to it. Without ASoC there may not be any McBSP users.. And to see the warnings spinlock debugging is needed.

Tony
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#10 lore raw

Re: [PATCH 2/9] ARM: OMAP: Fix McBSP spin_lock deadlock

Quoted 4 lines · Tony Lindgren
Quoted 4 lines
Quoted 2 lines

AFAIK it happens in the mainline with CONFIG_PREMEPT and ASoC.

I thought it was just spinlock debugging, period.

... on top of ASoC, yes.

Quoted 2 lines

Yeah right, that's all there is to it. Without ASoC there may not be any McBSP users.. And to see the warnings spinlock debugging is needed.

And, as I understand, it works OK without spinlock debugging.

Some of us leave that on all the time though, which means that OMAP3 ALSA support is more heard "of" than heard. ;)

- Dave

author maintainer
#4 lore raw

Re: [PATCH 1/9] ARM: Do early I/O mapping if spinlock debugging is enabled

In reply to David Brownell
Quoted 11 lines · David Brownell
Quoted 8 lines · Russell King - ARM Linux
Quoted 3 lines

At least on OMAP, sched_clock() requires the I/O maps to be initialized. Spinlock debugging invokes sched_clock() very early.

NAK.  This doesn't and can't work on every platform out there.  The only viable fix is that sched_clock() must NOT be used early.

If the kernel is using sched_clock() early, that's a bug.

So you're saying that spinlock debugging is buggy???

It used to be that CONFIG_PRINTK_TIME had a similar issue.. Anyways, dropping this patch from omap-fixes, sounds like how to fix it needs to get sorted out on LKML.

Tony
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author maintainer
#16 lore raw

Re: [PATCH 6/9] ARM: OMAP: Fix hsmmc init, v2

In reply to Russell King - ARM Linux
Quoted 49 lines · Russell King - ARM Linux
Quoted 19 lines · Tony Lindgren

It accidentally broke while changing the name for the driver to not to conflict with the other mmc driver.

---
 arch/arm/plat-omap/devices.c |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletions(-)
arch/arm/plat-omap/devices.c +1 -0
index ac15c23..d22529c 100644
@@ -205,9 +205,15 @@ int __init omap_mmc_add(int id, unsigned long base, unsigned long size,
 {
 	struct platform_device *pdev;
 	struct resource res[OMAP_MMC_NR_RES];
+	char *name;
 	int ret;
 

arch/arm/plat-omap/devices.c int __init omap_mmc_add(int id, unsigned long base, unsigned long size, · line 219

Quoted 10 lines
arch/arm/plat-omap/devices.c +6 -1
-	pdev = platform_device_alloc("mmci-omap", id);
+	if (cpu_class_is_omap1() || cpu_is_omap242x())
+		name = "mmci-omap";
+	else
+		name = "mmci-omap-hs";
+
+	pdev = platform_device_alloc(name, id);
 	if (!pdev)
 		return -ENOMEM;
 

This is error prone. I suggest instead:

int __init omap_mmc_add(const char *name, int id, unsigned long base,
unsigned long size, unsigned int irq, struct omap_mmc_platform_data *data)

and moving that conditional up a level - OMAP1 not having it conditional, and OMAP2 having the condition there along side the other in omap2_init_mmc.

And, it's already in error. Look at these two conditionals closely:

from plat-omap/devices.c:

(quoted diff) +4 -0
+	if (cpu_class_is_omap1() || cpu_is_omap242x())
+		name = "mmci-omap";
+	else
+		name = "mmci-omap-hs";
Quoted 7 lines

and from mach-omap2/devices.c::omap2_init_mmc():

                if (cpu_is_omap2420())
                        size = OMAP2420_MMC_SIZE;
                else
                        size = HSMMC_SIZE;

These disagree about which CPUs have HSMMC and which don't.

OK, here's the updated version.

Tony

Quoted 1 line

From 0dffb5c57a1d76532e2f2c7398579bfce81c3e5c Mon Sep 17 00:00:00 2001

From: Tony Lindgren <[email protected]>
Date: Thu, 29 Jan 2009 08:57:16 -0800
Subject: [PATCH] ARM: OMAP: Fix hsmmc init, v2

The naming accidentally broke while changing the name for the driver to not to conflict with the other mmc driver.

arch/arm/mach-omap1/devices.c +1 -1
index 77382d8..ba5d7c0 100644
@@ -181,7 +181,7 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
 		}
 		size = OMAP1_MMC_SIZE;
 
-		omap_mmc_add(i, base, size, irq, mmc_data[i]);
+		omap_mmc_add("mmci-omap", i, base, size, irq, mmc_data[i]);
 	};
 }
 
arch/arm/mach-omap2/devices.c +7 -4
index 9d7216f..ce03fa7 100644
@@ -421,6 +421,7 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
 			int nr_controllers)
 {
 	int i;
+	char *name;
 
 	for (i = 0; i < nr_controllers; i++) {
 		unsigned long base, size;
@@ -450,12 +451,14 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
 			continue;
 		}
 
-		if (cpu_is_omap2420())
+		if (cpu_is_omap2420()) {
 			size = OMAP2420_MMC_SIZE;
-		else
+			name = "mmci-omap";
+		} else {
 			size = HSMMC_SIZE;
-
-		omap_mmc_add(i, base, size, irq, mmc_data[i]);
+			name = "mmci-omap-hs";
+		}
+		omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
 	};
 }
 
arch/arm/plat-omap/devices.c +4 -3
index ac15c23..208dbb1 100644
@@ -200,14 +200,15 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config,
 /*
  * Register MMC devices. Called from mach-omap1 and mach-omap2 device init.
  */
-int __init omap_mmc_add(int id, unsigned long base, unsigned long size,
-		unsigned int irq, struct omap_mmc_platform_data *data)
+int __init omap_mmc_add(const char *name, int id, unsigned long base,
+				unsigned long size, unsigned int irq,
+				struct omap_mmc_platform_data *data)
 {
 	struct platform_device *pdev;
 	struct resource res[OMAP_MMC_NR_RES];
 	int ret;
 
-	pdev = platform_device_alloc("mmci-omap", id);
+	pdev = platform_device_alloc(name, id);
 	if (!pdev)
 		return -ENOMEM;
 
arch/arm/plat-omap/include/mach/mmc.h +6 -4
index 031250f..73a9e15 100644
@@ -115,8 +115,9 @@ void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
 				int nr_controllers);
 void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
 				int nr_controllers);
-int omap_mmc_add(int id, unsigned long base, unsigned long size,
-			unsigned int irq, struct omap_mmc_platform_data *data);
+int omap_mmc_add(const char *name, int id, unsigned long base,
+				unsigned long size, unsigned int irq,
+				struct omap_mmc_platform_data *data);
 #else
 static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
 				int nr_controllers)
@@ -126,8 +127,9 @@ static inline void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
 				int nr_controllers)
 {
 }
-static inline int omap_mmc_add(int id, unsigned long base, unsigned long size,
-		unsigned int irq, struct omap_mmc_platform_data *data)
+static inline int omap_mmc_add(const char *name, int id, unsigned long base,
+				unsigned long size, unsigned int irq,
+				struct omap_mmc_platform_data *data)
 {
 	return 0;
 }
author maintainer
#23 lore raw

git pull request for omap-fixes (Re: [PATCH 0/9] Omap fixes for 2.6.29-rc series, also one arm generic fix)

In reply to Russell King - ARM Linux
Quoted 1 line · Russell King - ARM Linux

No other comments on 3,4,5,7 and 9.

Here's the pull request for you.

Tony

The following changes since commit 18e352e4a73465349711a9324767e1b2453383e2:
Linus Torvalds (1):

        Linux 2.6.29-rc3

are available in the git repository at:

git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git omap-fixes

Aaro Koskinen (1):
ARM: OMAP: gptimer min_delta_ns corrected

Jarkko Nikula (1):
ARM: OMAP: DMA: Fix uninitialized channel flags

Juha Yrjola (1):
ARM: OMAP: Fix race in OMAP2/3 DMA IRQ handling

Kevin Hilman (1):
ARM: OMAP: fix fault in enter_full_retention()

Stanley.Miao (1):
ARM: OMAP: Fix McBSP spin_lock deadlock

Tony Lindgren (2):
ARM: OMAP: Fix omap34xx revision detection for ES3.1
ARM: OMAP: Fix hsmmc init, v2

김규원 (1):
ARM: OMAP: Mask interrupts when disabling interrupts, v2

 arch/arm/mach-omap1/devices.c           |    2 +-
 arch/arm/mach-omap1/mcbsp.c             |   98 ++-------------------
 arch/arm/mach-omap2/devices.c           |   11 ++-
 arch/arm/mach-omap2/id.c                |    6 +-
 arch/arm/mach-omap2/irq.c               |    1 +
 arch/arm/mach-omap2/mcbsp.c             |  145 ++++++-------------------------
 arch/arm/mach-omap2/sleep24xx.S         |    3 +-
 arch/arm/mach-omap2/timer-gp.c          |    3 +-
 arch/arm/plat-omap/devices.c            |    7 +-
 arch/arm/plat-omap/dma.c                |    5 +-
 arch/arm/plat-omap/include/mach/cpu.h   |    1 +
 arch/arm/plat-omap/include/mach/mcbsp.h |    6 +-
 arch/arm/plat-omap/include/mach/mmc.h   |   10 ++-
 arch/arm/plat-omap/mcbsp.c              |   52 ++++++++---
 14 files changed, 109 insertions(+), 241 deletions(-)