ath5k: Add tx power calibration support
PATCH 3/3 ath5k: Add tx power calibration support
* Add tx power calibration support
* Add a few tx power limits
* Hardcode default power to 12.5dB
* Disable TPC for now
v2: Address Jiri's comments
--- drivers/net/wireless/ath5k/ath5k.h | 35 +- drivers/net/wireless/ath5k/attach.c | 2 + drivers/net/wireless/ath5k/base.c | 12 +- drivers/net/wireless/ath5k/desc.c | 4 + drivers/net/wireless/ath5k/phy.c | 1170 +++++++++++++++++++++++++++++++++-- drivers/net/wireless/ath5k/reg.h | 19 + drivers/net/wireless/ath5k/reset.c | 35 +- 7 files changed, 1180 insertions(+), 97 deletions(-)
drivers/net/wireless/ath5k/ath5k.h +24 -11
@@ -204,9 +204,9 @@#define AR5K_TUNE_CWMAX_11B 1023#define AR5K_TUNE_CWMAX_XR 7#define AR5K_TUNE_NOISE_FLOOR -72 -#define AR5K_TUNE_MAX_TXPOWER 60 -#define AR5K_TUNE_DEFAULT_TXPOWER 30 -#define AR5K_TUNE_TPC_TXPOWER true +#define AR5K_TUNE_MAX_TXPOWER 63 +#define AR5K_TUNE_DEFAULT_TXPOWER 25 +#define AR5K_TUNE_TPC_TXPOWER false#define AR5K_TUNE_ANT_DIVERSITY true#define AR5K_TUNE_HWTXTRIES 4
@@ -551,11 +551,11 @@ enum ath5k_pkt_type {*/ #define AR5K_TXPOWER_OFDM (_r, _v) ( \ ((0 & 1) << ((_v) + 6)) | \ - (((ah->ah_txpower.txp_rates[(_r)]) & 0x3f) << (_v)) \ + (((ah->ah_txpower.txp_rates_power_table[(_r)]) & 0x3f) << (_v)) \ )#define AR5K_TXPOWER_CCK (_r, _v) ( \ - (ah->ah_txpower.txp_rates[(_r)] & 0x3f) << (_v) \ + (ah->ah_txpower.txp_rates_power_table[(_r)] & 0x3f) << (_v) \ )/*
@@ -1085,13 +1085,25 @@ struct ath5k_hw {struct ath5k_gain ah_gain;u8 ah_offset[AR5K_MAX_RF_BANKS ]; +struct { -u16 txp_pcdac[AR5K_EEPROM_POWER_TABLE_SIZE ]; -u16 txp_rates[AR5K_MAX_RATES ]; -s16 txp_min; -s16 txp_max; +/* Temporary tables used for interpolation */ +u8 tmpL[AR5K_EEPROM_N_PD_GAINS ] + [AR5K_EEPROM_POWER_TABLE_SIZE ]; +u8 tmpR[AR5K_EEPROM_N_PD_GAINS ] + [AR5K_EEPROM_POWER_TABLE_SIZE ]; +u8 txp_pd_table[AR5K_EEPROM_POWER_TABLE_SIZE *2 ]; +u16 txp_rates_power_table[AR5K_MAX_RATES ]; +u8 txp_min_idx;bool txp_tpc; +/* Values in 0.25dB units */ +s16 txp_min_pwr; +s16 txp_max_pwr; +s16 txp_offset;s16 txp_ofdm; +/* Values in dB units */ +s16 txp_cck_ofdm_pwr_delta; +s16 txp_cck_ofdm_gainf_delta; } ah_txpower;struct {
@@ -1161,6 +1173,7 @@ extern void ath5k_hw_update_mib_counters(struct ath5k_hw *ah, struct ieee80211_l/* EEPROM access functions */ extern int ath5k_eeprom_init (struct ath5k_hw *ah); +extern void ath5k_eeprom_detach (struct ath5k_hw *ah);extern int ath5k_eeprom_read_mac (struct ath5k_hw *ah,u8 *mac);extern bool ath5k_eeprom_is_hb63 (struct ath5k_hw *ah);
@@ -1256,8 +1269,8 @@ extern void ath5k_hw_set_def_antenna(struct ath5k_hw *ah, unsigned int ant);extern unsigned int ath5k_hw_get_def_antenna (struct ath5k_hw *ah);extern int ath5k_hw_phy_disable (struct ath5k_hw *ah);/* TX power setup */ -extern int ath5k_hw_txpower (struct ath5k_hw *ah,struct ieee80211_channel *channel,unsigned int txpower); -extern int ath5k_hw_set_txpower_limit (struct ath5k_hw *ah,unsigned int power); +extern int ath5k_hw_txpower (struct ath5k_hw *ah,struct ieee80211_channel *channel,u8 ee_mode,u8 txpower); +extern int ath5k_hw_set_txpower_limit (struct ath5k_hw *ah,u8 ee_mode,u8 txpower);/* * Functions used internaly
drivers/net/wireless/ath5k/attach.c +2 -0
@@ -341,6 +341,8 @@ void ath5k_hw_detach(struct ath5k_hw *ah)if (ah->ah_rf_banks !=NULL )kfree (ah->ah_rf_banks); +ath5k_eeprom_detach (ah); +/* assume interrupts are down */ kfree (ah); }
drivers/net/wireless/ath5k/base.c +6 -6
@@ -1216,6 +1216,9 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf) pktlen = skb->len; +/* FIXME: If we are in g mode and rate is a CCK rate +* subtract ah->ah_txpower.txp_cck_ofdm_pwr_delta +* from tx power (value is in dB units already) */ if (info->control.hw_key) { keyidx = info->control.hw_key->hw_key_idx; pktlen += info->control.hw_key->icv_len;
@@ -2044,6 +2047,9 @@ ath5k_beacon_setup(struct ath5k_softc *sc, struct ath5k_buf *bf) antenna = sc->bsent &4 ?2 :1 ; } +/* FIXME: If we are in g mode and rate is a CCK rate +* subtract ah->ah_txpower.txp_cck_ofdm_pwr_delta +* from tx power (value is in dB units already) */ ds->ds_data = bf->skbaddr; ret = ah->ah_setup_tx_desc(ah, ds, skb->len, ieee80211_get_hdrlen_from_skb(skb),
@@ -2608,12 +2614,6 @@ ath5k_reset(struct ath5k_softc *sc, bool stop, bool change_channel) goto err; } -/* -* This is needed only to setup initial state -* but it's best done after a reset. -*/ -ath5k_hw_set_txpower_limit (sc->ah,0 ); - ret =ath5k_rx_start (sc);if (ret) {ATH5K_ERR (sc,"can't start recv logic\n" );
drivers/net/wireless/ath5k/desc.c +4 -0
@@ -194,6 +194,10 @@ static int ath5k_hw_setup_4word_tx_desc(struct ath5k_hw *ah,return -EINVAL ; } + tx_power += ah->ah_txpower.txp_offset; +if (tx_power >AR5K_TUNE_MAX_TXPOWER ) + tx_power =AR5K_TUNE_MAX_TXPOWER ; +/* Clear descriptor */ memset (&desc->ud.ds_tx5212,0 ,sizeof (struct ath5k_hw_5212_tx_desc ));
drivers/net/wireless/ath5k/phy.c +1104 -66
1,236 lines not on this page · raw message
drivers/net/wireless/ath5k/reg.h +19 -0
@@ -1554,6 +1554,19 @@/*===5212 Specific PCU registers===*/ /* +* Transmit power control register +*/ +#define AR5K_TPC 0x80e8 +#define AR5K_TPC_ACK 0x0000003f/* ack frames */ +#define AR5K_TPC_ACK_S 0 +#define AR5K_TPC_CTS 0x00003f00/* cts frames */ +#define AR5K_TPC_CTS_S 8 +#define AR5K_TPC_CHIRP 0x003f0000/* chirp frames */ +#define AR5K_TPC_CHIRP_S 16 +#define AR5K_TPC_DOPPLER 0x0f000000/* doppler chirp span */ +#define AR5K_TPC_DOPPLER_S 24 + +/* * XR (eXtended Range) mode register */ #define AR5K_XRMODE 0x80c0/* Register Address */
@@ -2550,6 +2563,12 @@#define AR5K_PHY_TPC_RG1 0xa258#define AR5K_PHY_TPC_RG1_NUM_PD_GAIN 0x0000c000#define AR5K_PHY_TPC_RG1_NUM_PD_GAIN_S 14 +#define AR5K_PHY_TPC_RG1_PDGAIN_1 0x00030000 +#define AR5K_PHY_TPC_RG1_PDGAIN_1_S 16 +#define AR5K_PHY_TPC_RG1_PDGAIN_2 0x000c0000 +#define AR5K_PHY_TPC_RG1_PDGAIN_2_S 18 +#define AR5K_PHY_TPC_RG1_PDGAIN_3 0x00300000 +#define AR5K_PHY_TPC_RG1_PDGAIN_3_S 20#define AR5K_PHY_TPC_RG5 0xa26C#define AR5K_PHY_TPC_RG5_PD_GAIN_OVERLAP 0x0000000F
drivers/net/wireless/ath5k/reset.c +21 -14
@@ -664,29 +664,35 @@ static void ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah, struct ieee80211_channel *channel, u8 *ant, u8 ee_mode) { struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; +s16 cck_ofdm_pwr_delta; -/* Set CCK to OFDM power delta */ -if (ah->ah_phy_revision >=AR5K_SREV_PHY_5212A ) { -int16_t cck_ofdm_pwr_delta; - -/* Adjust power delta for channel 14 */ -if (channel->center_freq ==2484 ) - cck_ofdm_pwr_delta = - ((ee->ee_cck_ofdm_power_delta - - ee->ee_scaled_cck_delta) *2 ) /10 ; -else - cck_ofdm_pwr_delta = - (ee->ee_cck_ofdm_power_delta *2 ) /10 ; +/* Adjust power delta for channel 14 */ +if (channel->center_freq ==2484 ) + cck_ofdm_pwr_delta = + ((ee->ee_cck_ofdm_power_delta - + ee->ee_scaled_cck_delta) *2 ) /10 ; +else + cck_ofdm_pwr_delta = + (ee->ee_cck_ofdm_power_delta *2 ) /10 ; +/* Set CCK to OFDM power delta on tx power +* adjustment register */ +if (ah->ah_phy_revision >=AR5K_SREV_PHY_5212A ) {if (channel->hw_value ==CHANNEL_G )ath5k_hw_reg_write (ah, -AR5K_REG_SM ((ee->ee_cck_ofdm_power_delta *-1 ), +AR5K_REG_SM ((ee->ee_cck_ofdm_gain_delta *-1 ),AR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DELTA ) |AR5K_REG_SM ((cck_ofdm_pwr_delta *-1 ),AR5K_PHY_TX_PWR_ADJ_CCK_PCDAC_INDEX ),AR5K_PHY_TX_PWR_ADJ );else ath5k_hw_reg_write (ah,0 ,AR5K_PHY_TX_PWR_ADJ ); + }else { +/* For older revs we scale power on sw during tx power +* setup */ + ah->ah_txpower.txp_cck_ofdm_pwr_delta = cck_ofdm_pwr_delta; + ah->ah_txpower.txp_cck_ofdm_gainf_delta = + ee->ee_cck_ofdm_gain_delta; }/* Set antenna idle switch table */
@@ -994,7 +1000,8 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,/* * Set TX power (FIXME) */ - ret =ath5k_hw_txpower (ah, channel,AR5K_TUNE_DEFAULT_TXPOWER ); + ret =ath5k_hw_txpower (ah, channel, ee_mode, +AR5K_TUNE_DEFAULT_TXPOWER );if (ret)return ret;
Quoted 8 lines · Nick Kossifidis
* Add tx power calibration support
* Add a few tx power limits
* Hardcode default power to 12.5dB
* Disable TPC for nowv2: Address Jiri's comments
Signed-off-by Nick Kossifidis <[email protected]>
After bisecting I have found that this patch causes a regression with my wireless PCI board:
0:0b.0 Ethernet controller: 3Com Corporation AR5212 802.11abg NIC (3CRDAG675) (rev 01)
Subsystem: 3Com Corporation 3CRDAG675 11a/b/g Wireless PCI Adapter
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr-
Stepping- SERR- FastB2B- DisINTx-
Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort-
<TAbort- <MAbort- >SERR- <PERR- INTx-
Latency: 168 (2500ns min, 7000ns max), Cache Line Size: 32 bytes
Interrupt: pin A routed to IRQ 10
Region 0: Memory at d6800000 (32-bit, non-prefetchable) [size=64K]
Capabilities: [44] Power Management version 2
Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mAPME(D0-,D1-,D2-,D3hot-,D3cold-)
Status: D0 PME-Enable- DSel=0 DScale=2 PME-
Kernel driver in use: ath5k
Kernel modules: ath5k
Before applying the patch I can associate with my access point without problems. After giving the "iwconfig essid" command I can see the frequency sweep in the .11G and .11A bands until the authentication-association process ends successfully. I get the following diagnostic from dmesg:
Mar 29 11:29:50 kernel: ath5k 0000:00:0b.0: enabling device (0014 -> 0016) Mar 29 11:29:50 kernel: ath5k 0000:00:0b.0: PCI INT A -> Link[LNKB] -> GSI 10 (level, low) -> IRQ 10 Mar 29 11:29:50 kernel: ath5k 0000:00:0b.0: registered as 'phy0' Mar 29 11:29:50 kernel: phy0: Selected rate control algorithm 'minstrel' Mar 29 11:29:50 kernel: ath5k phy0: Atheros AR5212 chip found (MAC: 0x56, PHY: 0x41) Mar 29 11:29:50 kernel: ath5k phy0: RF5112B multiband radio found (0x36) Mar 29 11:29:50 kernel: udev: renamed network interface wlan0 to ath0 Mar 29 11:31:29 kernel: ath0: authenticate with AP 00:0c:f6:xx:xx:xx Mar 29 11:31:29 kernel: ath0: authenticated Mar 29 11:31:29 kernel: ath0: associate with AP 00:0c:f6:xx:xx:xx Mar 29 11:31:29 kernel: ath0: RX AssocResp from 00:0c:f6:xx:xx:xx (capab=0x411 status=0 aid=2) Mar 29 11:31:29 kernel: ath0: associated Mar 29 11:31:29 kernel: phy0: Allocated STA 00:0c:f6:xx:xx:xx Mar 29 11:31:29 kernel: phy0: Inserted STA 00:0c:f6:xx:xx:xx Mar 29 11:31:29 kernel: ath0: switched to short slot time
(BSSID=00:0c:f6:xx:xx:xx)
and with "modprobe -r ath5k"
Mar 29 11:32:23 kernel: ath0: deauthenticating by local choice (reason=3) Mar 29 11:32:23 kernel: phy0: Removed STA 00:0c:f6:xx:xx:xx Mar 29 11:32:23 kernel: phy0: Destroyed STA 00:0c:f6:xx:xx:xx Mar 29 11:32:23 kernel: ath5k 0000:00:0b.0: PCI INT A disabled
With the problematic patch there is no frequency sweep after the "iwconfig essid" command and I can't associate anymore (the frequency remains stuck to 5.18GHz but I work with 802.11G)
Mar 29 11:08:45 kernel: cfg80211: Calling CRDA to update world regulatory domain Mar 29 11:08:45 kernel: ath5k 0000:00:0b.0: PCI INT A -> Link[LNKB] -> GSI 10 (level, low) -> IRQ 10 Mar 29 11:08:45 kernel: ath5k 0000:00:0b.0: registered as 'phy0' Mar 29 11:08:45 kernel: phy0: Selected rate control algorithm 'minstrel' Mar 29 11:08:45 kernel: ath5k phy0: Atheros AR5212 chip found (MAC: 0x56, PHY: 0x41) Mar 29 11:08:45 kernel: ath5k phy0: RF5112B multiband radio found (0x36) Mar 29 11:08:45 kernel: udev: renamed network interface wlan0 to ath0 Mar 29 11:09:03 kernel: ath5k phy0: noise floor calibration timeout (5180MHz) Mar 29 11:09:36 last message repeated 3 times Mar 29 11:10:43 last message repeated 6 times Mar 29 11:11:48 last message repeated 6 times Mar 29 11:12:54 last message repeated 6 times Mar 29 11:14:00 last message repeated 6 times Mar 29 11:15:06 last message repeated 6 times Mar 29 11:16:12 last message repeated 6 times
and with "modprobe -r ath5k"
Mar 29 11:23:59 kernel: ath0: deauthenticating by local choice (reason=3) Mar 29 11:24:05 kernel: ath5k phy0: noise floor calibration timeout (5180MHz) Mar 29 11:24:38 last message repeated 3 times Mar 29 11:24:49 kernel: ath5k phy0: noise floor calibration timeout (5180MHz)
(I can't understand the deauthenticating line when before I don't see an authenticate line). At this point it's impossible to remove the module and the execution of a top session identifies a "phy0" program which runs forever with high CPU usage (I need to reboot the system)
PID USER PR NI VIRT RES SHR S %CPU %MEM TIME+ COMMAND 21548 root 15 -5 0 0 0 R 68.5 0.0 2:25.68 phy0
Fabio
2009/3/29 Fabio Rossi <[email protected]>:
Quoted 7 lines · Nick Kossifidis
Quoted 6 lines
=C2=A0* Add tx power calibration support
=C2=A0* Add a few tx power limits
=C2=A0* Hardcode default power to 12.5dB
=C2=A0* Disable TPC for now
Quoted 5 lines
Quoted 3 lines
=C2=A0v2: Address Jiri's comments
=C2=A0Signed-off-by: Nick Kossifidis <[email protected]>
After bisecting I have found that this patch causes a regression with=
my
Quoted 1 line
wireless PCI board:
[...]
Quoted 2 lines
With the problematic patch there is no frequency sweep after the "iwc=
onfig
Quoted 1 line
essid" command and I can't associate anymore (the frequency remains s=
tuck to
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5.18GHz but I work with 802.11G)
Mar 29 11:08:45 kernel: cfg80211: Calling CRDA to update world regula=
tory
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domain
Mar 29 11:08:45 kernel: ath5k 0000:00:0b.0: PCI INT A -> Link[LNKB] -= GSI 10 (level, low) -> IRQ 10 Mar 29 11:08:45 kernel: ath5k 0000:00:0b.0: registered as 'phy0' Mar 29 11:08:45 kernel: phy0: Selected rate control algorithm 'minstr=
el'
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Mar 29 11:08:45 kernel: ath5k phy0: Atheros AR5212 chip found (MAC: 0=
x56, PHY:
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0x41)Mar 29 11:08:45 kernel: ath5k phy0: RF5112B multiband radio found (0x=
36)
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Mar 29 11:08:45 kernel: udev: renamed network interface wlan0 to ath0 Mar 29 11:09:03 kernel: ath5k phy0: noise floor calibration timeout (=
5180MHz)
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Mar 29 11:09:36 last message repeated 3 times Mar 29 11:10:43 last message repeated 6 times Mar 29 11:11:48 last message repeated 6 times Mar 29 11:12:54 last message repeated 6 times Mar 29 11:14:00 last message repeated 6 times Mar 29 11:15:06 last message repeated 6 times Mar 29 11:16:12 last message repeated 6 times
I can understand how this patch may have resulted a noise floor calibration timeout but i can't understand how it broke everything else. I've tested it with a very similar card (same MAC and PHY chips but from a different vendor) and it worked just fine. Also i know there is still something more to fix for RF5112 while setting rf buffer settings and we have 2 curves but i don't think that's related.
Quoted 3 lines
and with "modprobe -r ath5k"
Mar 29 11:23:59 kernel: ath0: deauthenticating by local choice (reaso=
n=3D3)
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Mar 29 11:24:05 kernel: ath5k phy0: noise floor calibration timeout (=
5180MHz)
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Mar 29 11:24:38 last message repeated 3 times Mar 29 11:24:49 kernel: ath5k phy0: noise floor calibration timeout (=
5180MHz)
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(I can't understand the deauthenticating line when before I don't see=
an
Quoted 1 line
authenticate line). At this point it's impossible to remove the modul=
e and
Quoted 1 line
the execution of a top session identifies a "phy0" program which runs=
forever
Quoted 3 lines
with high CPU usage (I need to reboot the system)
=C2=A0PID USER =C2=A0 =C2=A0 =C2=A0PR =C2=A0NI =C2=A0VIRT =C2=A0RES =C2=
=A0SHR S %CPU %MEM =C2=A0 =C2=A0TIME+ =C2=A0COMMAND
Quoted 1 line
21548 root =C2=A0 =C2=A0 =C2=A015 =C2=A0-5 =C2=A0 =C2=A0 0 =C2=A0 =C2=
=A00 =C2=A0 =C2=A00 R 68.5 =C2=A00.0 =C2=A0 2:25.68 phy0
Quoted 1 line
This is even more weird, do you have an SMP system ? That warning you get is from the periodic calibration function, it seems you run this function too often...
--=20
GPG ID: 0xD21DB2DB
As you read this post global entropy rises. Have Fun ;-) Nick
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Quoted 6 lines · Nick Kossifidis
I can understand how this patch may have resulted a noise floor calibration timeout but i can't understand how it broke everything else. I've tested it with a very similar card (same MAC and PHY chips but from a different vendor) and it worked just fine. Also i know there is still something more to fix for RF5112 while setting rf buffer settings and we have 2 curves but i don't think that's related=
=2E
I was using wireless-testing when I have experienced the problem. Then = after=20
the bisectioning procedure I removed the entire patch solving the probl= em with=20
the authentication-association process.
Does also your board support 802.11abg? I don't understand why the nois= e=20
calibration process remains stuck @ 5.18GHz.
Is it possible to split your patch in shorter pieces to isolate the pro= blem?
Quoted 3 lines
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and with "modprobe -r ath5k"
Mar 29 11:23:59 kernel: ath0: deauthenticating by local choice (rea=
son=3D3)
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Mar 29 11:24:05 kernel: ath5k phy0: noise floor calibration timeout (5180MHz) Mar 29 11:24:38 last message repeated 3 times Mar 29 11:24:49 kernel: ath5k phy0: noise floor calibration timeout(5180MHz)
(I can't understand the deauthenticating line when before I don't s=
ee an
Quoted 1 line
Quoted 1 line
authenticate line). At this point it's impossible to remove the mod=
ule
Quoted 1 line
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and the execution of a top session identifies a "phy0" program whic=
h runs
Quoted 3 lines
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forever with high CPU usage (I need to reboot the system)
=C2=A0PID USER =C2=A0 =C2=A0 =C2=A0PR =C2=A0NI =C2=A0VIRT =C2=A0RES=
=C2=A0SHR S %CPU %MEM =C2=A0 =C2=A0TIME+ =C2=A0COMMAND
Quoted 1 line
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21548 root =C2=A0 =C2=A0 =C2=A015 =C2=A0-5 =C2=A0 =C2=A0 0 =C2=A0 =C2=
=A00 =C2=A0 =C2=A00 R 68.5 =C2=A00.0 =C2=A0 2:25.68 phy0
Quoted 4 lines
This is even more weird, do you have an SMP system ? That warning you get is from the periodic calibration function, it seems you run this function too often...
Unfortunately I don't have a SMP system but a very old processor, an At= hlon=20
Thunderbird 900MHz :-( I have to manually reboot the system (hardware b= utton,=20
the software procedure doesn't work).
Tell me if you need other information, I'll test possible patches to so= lve the=20
problem.
=46abio
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2009/3/29 Fabio Rossi <[email protected]>:
Quoted 9 lines · Nick Kossifidis
Quoted 7 lines
I can understand how this patch may have resulted a noise floor calibration timeout but i can't understand how it broke everything else. I've tested it with a very similar card (same MAC and PHY chips but from a different vendor) and it worked just fine. Also i know there is still something more to fix for RF5112 while setting rf buffer settings and we have 2 curves but i don't think that's related.
Quoted 7 lines
I was using wireless-testing when I have experienced the problem. Then after the bisectioning procedure I removed the entire patch solving the problem with the authentication-association process.
Does also your board support 802.11abg? I don't understand why the noise calibration process remains stuck @ 5.18GHz.
Yup i have exactly the same phy chip as you.
Quoted 2 lines
Is it possible to split your patch in shorter pieces to isolate the problem?
This patch introduces a function (and some helpers) to set 2 tables on hardware, it doesn't mess with the rest of the driver. I've tested it both on sta and ap scenarios with all the cards i have available and it worked fine. If you want to make more tests just disable parts of hw_txpower on phy.c, you can start by commenting out everything below
ath5k_setup_rate_powertable(ah, txpower, &rate_info, ee_mode);
to skip the setting of tx power, if you comment out the whole function you'll disable the functionality that this patch adds.
Quoted 8 lines
Quoted 3 lines
This is even more weird, do you have an SMP system ? That warning you get is from the periodic calibration function, it seems you run this function too often...
Unfortunately I don't have a SMP system but a very old processor, an Athlon Thunderbird 900MHz :-( I have to manually reboot the system (hardware button, the software procedure doesn't work).
My initial thought was that one of the cpus was stuck, running the calibration function again and again which would result what you describe.
Check this out...
Mar 29 11:08:45 kernel: udev: renamed network interface wlan0 to ath0 Mar 29 11:09:03 kernel: ath5k phy0: noise floor calibration timeout (5180MHz) Mar 29 11:09:36 last message repeated 3 times Mar 29 11:10:43 last message repeated 6 times Mar 29 11:11:48 last message repeated 6 times Mar 29 11:12:54 last message repeated 6 times Mar 29 11:14:00 last message repeated 6 times Mar 29 11:15:06 last message repeated 6 times Mar 29 11:16:12 last message repeated 6 times
Calibration functions runs almost 6 times /min which makes sense (we run it each 10 secs) but...
a) It always fails
b) It's always called with the same channel
Quoted 2 lines
Tell me if you need other information, I'll test possible patches to solve the problem.
How about scanning or monitor mode, does it work ?
Signature · 3 lines
GPG ID: 0xD21DB2DB As you read this post global entropy rises. Have Fun ;-) Nick
Quoted 3 lines
Quoted 3 lines
Does also your board support 802.11abg? I don't understand why the noise calibration process remains stuck @ 5.18GHz.
5.18 is the first channel on 5GHz band and 5GHz band is the band we start with, so it's the first channel the driver sets.
Quoted 3 lines
My initial thought was that one of the cpus was stuck, running the calibration function again and again which would result what you describe.
Well that's of course extreme, but i can't explain why you can't unload the module or why you get higher cpu utilization. I mean it seems only the calibration function gets called (if reset function got called then we would have more than 6 nf timeout failures since reset also performs a nf calibration) and nothing else works. It could be an interrupt storm but i don't understand why this patch triggers it.
Signature · 3 lines
GPG ID: 0xD21DB2DB As you read this post global entropy rises. Have Fun ;-) Nick
Quoted 10 lines · Nick Kossifidis
This patch introduces a function (and some helpers) to set 2 tables on hardware, it doesn't mess with the rest of the driver. I've tested it both on sta and ap scenarios with all the cards i have available and it worked fine. If you want to make more tests just disable parts of
hw_txpoweronphy.c, you can start by commenting out everything below
ath5k_setup_rate_powertable(ah, txpower, &rate_info, ee_mode);to skip the setting of tx power, if you comment out the whole function you'll disable the functionality that this patch adds.
I have discovered the problem. Inside ath5k_hx_txpower() it's called ath5k_setup_channel_powertable() where the gain curves of frequency piers are scanned (if I have understood correctly) to extract the data for the calibration of the current channel.
In particular, for the 5180MHz channel (the first of the A band), the function ath5k_get_linear_pcdac_min() is called with some critical data which generate an endless while loop.
Here are the bad numbers passed to ath5k_get_linear_pcdac_min():
* pwrL[0] = 4
* pwrL[1] = 4
* stepL[0] = 20
* stepL[1] = 35
and with this configuration the variable 'tmp' is never decremented inside the first while loop.
I suppose the data comes from the EEPROM. Is there an easy way to read the contents of the EEPROM regarding the calibration data for all the channels?
Fabio
2009/3/30 Fabio Rossi <[email protected]>:
Quoted 3 lines · Nick Kossifidis
Quoted 2 lines
This patch introduces a function (and some helpers) to set 2 tables =
on
Quoted 1 line
Quoted 1 line
hardware, it doesn't mess with the rest of the driver. I've tested i=
t
Quoted 3 lines
Quoted 3 lines
both on sta and ap scenarios with all the cards i have available and it worked fine. If you want to make more tests just disable parts of
hw_txpoweronphy.c, you can start by commenting out everything =C2=A0=
below
Quoted 4 lines
Quoted 4 lines
ath5k_setup_rate_powertable(ah, txpower, &rate_info, ee_mode);to skip the setting of tx power, if you comment out the whole functi=
on
Quoted 5 lines
Quoted 1 line
you'll disable the functionality that this patch adds.
I have discovered the problem. Inside
ath5k_hx_txpower()it's calledath5k_setup_channel_powertable()where the gain curves of frequency piers are scanned (if I have understood correctly) to extract the dat=
a for
Quoted 3 lines
the calibration of the current channel.
In particular, for the 5180MHz channel (the first of the A band), the=
function
Quoted 1 line
ath5k_get_linear_pcdac_min()is called with some critical data which =
generate
Quoted 8 lines
an endless while loop.
Here are the bad numbers passed to
ath5k_get_linear_pcdac_min():
* pwrL[0] =3D 4
* pwrL[1] =3D 4
* stepL[0] =3D 20
* stepL[1] =3D 35
and with this configuration the variable 'tmp' is never decremented i=
nside the
Quoted 3 lines
first while loop.
I suppose the data comes from the EEPROM. Is there an easy way to rea=
d the
Quoted 1 line
contents of the EEPROM regarding the calibration data for all the cha=
nnels?
Quoted 3 lines
Fabio
Nice catch ;-)
It's weird that your EEPROM contains a value twice, both pwrL[0] and pwrL[1] are 4 so interpolation always returns 4 and tmp is always > 1 so you have an endless loop. This is not what we expect to have on EEPROM (we are supposed to have a monotonicaly increasing curve and in your case it should be almost linear). Anyway since we have such cards we just need to put a check there and where pwrL[0] =3D=3D pwrL[1], we = set
tmp =3D stepL[0] or if pwrR[0] =3D=3D pwrR[1], we set tmp =3D stepR[0].=
Try
this out and see how it goes...
--=20
GPG ID: 0xD21DB2DB
As you read this post global entropy rises. Have Fun ;-) Nick
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2009/3/31 Nick Kossifidis <[email protected]>:
Quoted 4 lines
It's weird that your EEPROM contains a value twice, both pwrL[0] and pwrL[1] are 4 so interpolation always returns 4 and tmp is always > 1 so you have an endless loop.
(still sleeping) it doesn't return 4 (that's the pwr lvl) but the same pcdac step :P
Signature · 3 lines
GPG ID: 0xD21DB2DB As you read this post global entropy rises. Have Fun ;-) Nick
2009/3/31 Nick Kossifidis <[email protected]>:
Quoted 5 lines
Anyway since we have such cards
we just need to put a check there and where pwrL[0] == pwrL[1], we set tmp = stepL[0] or if pwrR[0] == pwrR[1], we set tmp = stepR[0]. Try this out and see how it goes...
(almost there :P) no need to do this, if we get pwrL[0] == pwrL[1] then we just set min_pwrL = pwrL[0] and skip the loop, same for min_pwrR.
Signature · 3 lines
GPG ID: 0xD21DB2DB As you read this post global entropy rises. Have Fun ;-) Nick
Quoted 26 lines · Nick Kossifidis
Quoted 18 lines
2009/3/30 Fabio Rossi <[email protected]>:
I have discovered the problem. Insideath5k_hx_txpower()it's calledath5k_setup_channel_powertable()where the gain curves of frequency piers are scanned (if I have understood correctly) to extract the data for the calibration of the current channel.In particular, for the 5180MHz channel (the first of the A band), the function
ath5k_get_linear_pcdac_min()is called with some critical data which generate an endless while loop.Here are the bad numbers passed to
ath5k_get_linear_pcdac_min():
* pwrL[0] = 4
* pwrL[1] = 4
* stepL[0] = 20
* stepL[1] = 35
and with this configuration the variable 'tmp' is never decremented inside the first while loop.Quoted 5 lines
I suppose the data comes from the EEPROM. Is there an easy way to read the contents of the EEPROM regarding the calibration data for all the channels?
Fabio
Nice catch ;-)
Quoted 8 lines
It's weird that your EEPROM contains a value twice, both pwrL[0] and pwrL[1] are 4 so interpolation always returns 4 and tmp is always > 1 so you have an endless loop. This is not what we expect to have on EEPROM (we are supposed to have a monotonicaly increasing curve and in your case it should be almost linear). Anyway since we have such cards we just need to put a check there and where pwrL[0] == pwrL[1], we set tmp = stepL[0] or if pwrR[0] == pwrR[1], we set tmp = stepR[0]. Try this out and see how it goes...
Here is the full dump of the power levels inside my board EEPROM:
channel freq 2412,ath5k_get_linear_pcdac_min pwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=-119, pwrR[1]=-96, stepR[0]=20, stepR[1]=35 channel freq 2417,ath5k_get_linear_pcdac_min pwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2422,ath5k_get_linear_pcdac_min pwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2427,ath5k_get_linear_pcdac_min pwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2432,ath5k_get_linear_pcdac_min pwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2437,ath5k_get_linear_pcdac_min pwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2442,ath5k_get_linear_pcdac_min pwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2447,ath5k_get_linear_pcdac_min pwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2452,ath5k_get_linear_pcdac_min pwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2457,ath5k_get_linear_pcdac_min pwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2462,ath5k_get_linear_pcdac_min pwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2467,ath5k_get_linear_pcdac_min pwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2472,ath5k_get_linear_pcdac_min pwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2484,ath5k_get_linear_pcdac_min pwrL[0]=-106, pwrL[1]=-58, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 5180,ath5k_get_linear_pcdac_min pwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5185,ath5k_get_linear_pcdac_min pwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5190,ath5k_get_linear_pcdac_min pwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5195,ath5k_get_linear_pcdac_min pwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5200,ath5k_get_linear_pcdac_min pwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5205,ath5k_get_linear_pcdac_min pwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5210,ath5k_get_linear_pcdac_min pwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5215,ath5k_get_linear_pcdac_min pwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5220,ath5k_get_linear_pcdac_min pwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5225,ath5k_get_linear_pcdac_min pwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5230,ath5k_get_linear_pcdac_min pwrL[0]=13, pwrL[1]=13, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5235,ath5k_get_linear_pcdac_min pwrL[0]=13, pwrL[1]=13, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=8, pwrR[1]=9, stepR[0]=20, stepR[1]=35 channel freq 5240,ath5k_get_linear_pcdac_min pwrL[0]=13, pwrL[1]=13, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=8, pwrR[1]=9, stepR[0]=20, stepR[1]=35 channel freq 5745,ath5k_get_linear_pcdac_min pwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5750,ath5k_get_linear_pcdac_min pwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5755,ath5k_get_linear_pcdac_min pwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5760,ath5k_get_linear_pcdac_min pwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5765,ath5k_get_linear_pcdac_min pwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5770,ath5k_get_linear_pcdac_min pwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5775,ath5k_get_linear_pcdac_min pwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5780,ath5k_get_linear_pcdac_min pwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5785,ath5k_get_linear_pcdac_min pwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5790,ath5k_get_linear_pcdac_min pwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5795,ath5k_get_linear_pcdac_min pwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5800,ath5k_get_linear_pcdac_min pwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5805,ath5k_get_linear_pcdac_min pwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5810,ath5k_get_linear_pcdac_min pwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5815,ath5k_get_linear_pcdac_min pwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5820,ath5k_get_linear_pcdac_min pwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5825,ath5k_get_linear_pcdac_min pwrL[0]=11, pwrL[1]=28, stepL[0]=20, stepL[1]=35 ath5k_get_linear_pcdac_min pwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35
As you can see the problem is related only to the frequency range 5180-5240MHz. I'll post a separate patch to solve the issue, please add your favourite tag.
Fabio
2009/3/31 Fabio Rossi <[email protected]>:
Quoted 172 lines · Nick Kossifidis
Quoted 27 lines
Quoted 19 lines
2009/3/30 Fabio Rossi <[email protected]>:
I have discovered the problem. Insideath5k_hx_txpower()it's calledath5k_setup_channel_powertable()where the gain curves of frequency piers are scanned (if I have understood correctly) to extract the data for the calibration of the current channel.In particular, for the 5180MHz channel (the first of the A band), the function
ath5k_get_linear_pcdac_min()is called with some critical data which generate an endless while loop.Here are the bad numbers passed to
ath5k_get_linear_pcdac_min():
* pwrL[0] = 4
* pwrL[1] = 4
* stepL[0] = 20
* stepL[1] = 35
and with this configuration the variable 'tmp' is never decremented inside the first while loop.Quoted 5 lines
I suppose the data comes from the EEPROM. Is there an easy way to read the contents of the EEPROM regarding the calibration data for all the channels?
Fabio
Nice catch ;-)
Quoted 8 lines
It's weird that your EEPROM contains a value twice, both pwrL[0] and pwrL[1] are 4 so interpolation always returns 4 and tmp is always > 1 so you have an endless loop. This is not what we expect to have on EEPROM (we are supposed to have a monotonicaly increasing curve and in your case it should be almost linear). Anyway since we have such cards we just need to put a check there and where pwrL[0] == pwrL[1], we set tmp = stepL[0] or if pwrR[0] == pwrR[1], we set tmp = stepR[0]. Try this out and see how it goes...
Here is the full dump of the power levels inside my board EEPROM:
channel freq 2412,
ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-119, pwrR[1]=-96, stepR[0]=20, stepR[1]=35 channel freq 2417,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2422,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2427,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2432,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2437,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2442,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2447,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2452,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2457,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2462,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2467,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2472,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2484,ath5k_get_linear_pcdac_minpwrL[0]=-106, pwrL[1]=-58, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 5180,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5185,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5190,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5195,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5200,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5205,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5210,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5215,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5220,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5225,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5230,ath5k_get_linear_pcdac_minpwrL[0]=13, pwrL[1]=13, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5235,ath5k_get_linear_pcdac_minpwrL[0]=13, pwrL[1]=13, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=8, pwrR[1]=9, stepR[0]=20, stepR[1]=35 channel freq 5240,ath5k_get_linear_pcdac_minpwrL[0]=13, pwrL[1]=13, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=8, pwrR[1]=9, stepR[0]=20, stepR[1]=35 channel freq 5745,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5750,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5755,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5760,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5765,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5770,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5775,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5780,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5785,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5790,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5795,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5800,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5805,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5810,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5815,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5820,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5825,ath5k_get_linear_pcdac_minpwrL[0]=11, pwrL[1]=28, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35
Quoted 6 lines
As you can see the problem is related only to the frequency range 5180-5240MHz. I'll post a separate patch to solve the issue, please add your favourite tag.
Fabio
Any other issues after the patch ?
Signature · 3 lines
GPG ID: 0xD21DB2DB As you read this post global entropy rises. Have Fun ;-) Nick
Quoted 173 lines · Nick Kossifidis
2009/3/31 Fabio Rossi <[email protected]>:
Quoted 172 lines · Nick Kossifidis
Quoted 26 lines
Quoted 18 lines
2009/3/30 Fabio Rossi <[email protected]>:
I have discovered the problem. Insideath5k_hx_txpower()it's calledath5k_setup_channel_powertable()where the gain curves of frequency piers are scanned (if I have understood correctly) to extract the data for the calibration of the current channel.In particular, for the 5180MHz channel (the first of the A band), the function
ath5k_get_linear_pcdac_min()is called with some critical data which generate an endless while loop.Here are the bad numbers passed to
ath5k_get_linear_pcdac_min():
* pwrL[0] = 4
* pwrL[1] = 4
* stepL[0] = 20
* stepL[1] = 35
and with this configuration the variable 'tmp' is never decremented inside the first while loop.Quoted 5 lines
I suppose the data comes from the EEPROM. Is there an easy way to read the contents of the EEPROM regarding the calibration data for all the channels?
Fabio
Nice catch ;-)
Quoted 8 lines
It's weird that your EEPROM contains a value twice, both pwrL[0] and pwrL[1] are 4 so interpolation always returns 4 and tmp is always > 1 so you have an endless loop. This is not what we expect to have on EEPROM (we are supposed to have a monotonicaly increasing curve and in your case it should be almost linear). Anyway since we have such cards we just need to put a check there and where pwrL[0] == pwrL[1], we set tmp = stepL[0] or if pwrR[0] == pwrR[1], we set tmp = stepR[0]. Try this out and see how it goes...
Here is the full dump of the power levels inside my board EEPROM:
channel freq 2412,
ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-119, pwrR[1]=-96, stepR[0]=20, stepR[1]=35 channel freq 2417,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2422,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2427,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2432,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2437,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2442,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2447,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2452,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2457,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2462,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2467,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2472,ath5k_get_linear_pcdac_minpwrL[0]=-119, pwrL[1]=-96, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 2484,ath5k_get_linear_pcdac_minpwrL[0]=-106, pwrL[1]=-58, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=-106, pwrR[1]=-58, stepR[0]=20, stepR[1]=35 channel freq 5180,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5185,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5190,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5195,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5200,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5205,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5210,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5215,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5220,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5225,ath5k_get_linear_pcdac_minpwrL[0]=4, pwrL[1]=4, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5230,ath5k_get_linear_pcdac_minpwrL[0]=13, pwrL[1]=13, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=13, pwrR[1]=13, stepR[0]=20, stepR[1]=35 channel freq 5235,ath5k_get_linear_pcdac_minpwrL[0]=13, pwrL[1]=13, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=8, pwrR[1]=9, stepR[0]=20, stepR[1]=35 channel freq 5240,ath5k_get_linear_pcdac_minpwrL[0]=13, pwrL[1]=13, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=8, pwrR[1]=9, stepR[0]=20, stepR[1]=35 channel freq 5745,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5750,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5755,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5760,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5765,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5770,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5775,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5780,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5785,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5790,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5795,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5800,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5805,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5810,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5815,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5820,ath5k_get_linear_pcdac_minpwrL[0]=8, pwrL[1]=26, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35 channel freq 5825,ath5k_get_linear_pcdac_minpwrL[0]=11, pwrL[1]=28, stepL[0]=20, stepL[1]=35ath5k_get_linear_pcdac_minpwrR[0]=11, pwrR[1]=28, stepR[0]=20, stepR[1]=35
Quoted 7 lines
Quoted 5 lines
As you can see the problem is related only to the frequency range 5180-5240MHz. I'll post a separate patch to solve the issue, please add your favourite tag.
Fabio
Any other issues after the patch ?
I have other issues regarding the "stability" of the connection getting this log
cfg80211: Calling CRDA to update world regulatory domain
ath5k 0000:00:0b.0: PCI INT A -> Link[LNKB] -> GSI 10 (level, low) -> IRQ 10 ath5k 0000:00:0b.0: registered as 'phy0'
phy0: Selected rate control algorithm 'minstrel'
ath5k phy0: Atheros AR5212 chip found (MAC: 0x56, PHY: 0x41) ath5k phy0: RF5112B multiband radio found (0x36)
udev: renamed network interface wlan0 to ath0
ath0: authenticate with AP 00:0c:f6:xx:xx:xx
ath0: authenticated
ath0: associate with AP 00:0c:f6:xx:xx:xx
ath0: RX AssocResp from 00:0c:f6:xx:xx:xx (capab=0x411 status=0 aid=2)
ath0: associated
phy0: Allocated STA 00:0c:f6:xx:xx:xx
phy0: Inserted STA 00:0c:f6:xx:xx:xx
ath0: switched to short slot time (BSSID=00:0c:f6:xx:xx:xx)
ath0: no probe response from AP 00:0c:f6:xx:xx:xx - disassociating
phy0: Removed STA 00:0c:f6:xx:xx:xx
phy0: Destroyed STA 00:0c:f6:xx:xx:xx
i.e. soon after the association with the AP I'm also disassociated. The problem is that I cannot associate anymore with the "iwconfig ath0 essid" command, I have to remove and load again the ath5k module. I haven't investigated about this problem yet but it doesn't seem strictly related to your tx power calibration patch.
Fabio