sh: shared clock framework code for SuperH Mobile

PATCH New Magnus Damm 1 participant 2 messages May 20, 2009 SuperH

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Magnus Damm

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2009-05-20 14:18 UTC #0 lore raw

PATCH 1/1 sh: shared clock framework code for SuperH Mobile

From: Magnus Damm <[email protected]>

This patch adds new and improved clock framework code for SuperH Mobile processors. Only shared code is included in this patch, processor specific patches are required on top of this to make use of the new features.

With this rewrite the clock framework becomes aware of which CPG divisors combinations that are valid. The cpu specific code flags which divisor bits that are supported and a callback is used to validate divisor combinations. Maximum per divisor clock ratings are also supported.

The divisors are kept in groups. One group is a bunch of divisors that have complex dependencies. The shared code will make sure that all divisors are kept valid and informs the cpu specific code to update the divisors in the group atomically.

PLL modification is not supported. Only divisor modification with sh_mobile_div_optimize() is supported for now. The PLL should be read out during boot and will be kept constant during run-time.

Setting rates from the clock framework needs a bit more work, but should be fairly easy to add on top of this.

Hint: state_dump() gives you all valid divisor combinations.

Signed-off-by Magnus Damm <[email protected]>

---

Apply on top of the clkfwk topic branch.

 arch/sh/include/cpu-common/cpu/clock-sh_mobile.h |   89 +++
 arch/sh/kernel/cpu/shmobile/Makefile             |    2 
 arch/sh/kernel/cpu/shmobile/clock.c              |  569 ++++++++++++++++++++++
 3 files changed, 659 insertions(+), 1 deletion(-)

arch/sh/include/cpu-common/cpu/clock-sh_mobile.h new file +89 -0

@@ -0,0 +1,89 @@
+#ifndef __CLOCK_SH_MOBILE_H__
+#define __CLOCK_SH_MOBILE_H__
+
+#define SH_MOBILE_DIVISOR_NR 0 /* override with cpu specific value */
+#define SH_MOBILE_MSTP_NR 0 /* override with cpu specific value */
+#define SH_MOBILE_ALLOWED_NR 16 /* 4-bit fields is enough for now */
+
+/* system clock modes */
+#define CLK_MODE_N_1 0
+#define CLK_MODE_3_2 1
+#define CLK_MODE_5_2 2
+#define CLK_MODE_1_N 3
+#define CLK_MODE_4_3 4
+#define CLK_MODE_5_4 5
+#define CLK_MODE_1_1 6
+#define CLK_MODE_2_1 7
+#define CLK_MODE_3_1 8
+#define CLK_MODE_4_1 9
+
+/* per-divisor run time state */
+struct sh_mobile_div_state {
+	int mode;
+	int selected;
+	int cnt;
+	int forced_min;
+	int forced_max;
+	int best;
+};
+
+/* run time state */
+struct sh_mobile_cpg_state {
+	int cnt;
+	struct sh_mobile_div_state div_state[SH_MOBILE_DIVISOR_NR];
+};
+
+/* per-divisor hardware configuration (write-once) */
+struct sh_mobile_div_hw_cfg {
+	char *name;
+	int div;
+	int grp;
+	unsigned long max_mhz;
+	DECLARE_BITMAP(allowed, SH_MOBILE_ALLOWED_NR);
+};
+
+/* per-mstp hardware configuration (write-once) */
+struct sh_mobile_mstp_hw_cfg {
+	char *name;
+	int parent;
+	unsigned long reg;
+	unsigned char bitnr, enable_on_init, use_cpg, use_ram;
+};
+
+/* hardware configuration (write-once) */
+struct sh_mobile_cpg_hw_cfg {
+	int pll_mult; /* fixed PLL multiplier for now */
+	int (*check_div)(struct sh_mobile_cpg_hw_cfg *h, int div, int bit,
+			 struct sh_mobile_cpg_state *cs);
+	int (*set_div)(struct sh_mobile_cpg_hw_cfg *h, int grp,
+		       struct sh_mobile_cpg_state *cs);
+	int (*get_div)(struct sh_mobile_cpg_hw_cfg *h, int div);
+	void (*enable_disable)(struct sh_mobile_cpg_hw_cfg *h, int div, int on);
+	struct sh_mobile_div_hw_cfg div[SH_MOBILE_DIVISOR_NR];
+	int *multipliers;
+	int *divisors;
+	struct sh_mobile_mstp_hw_cfg mstp[SH_MOBILE_MSTP_NR];
+};
+
+int sh_mobile_div_check(struct sh_mobile_cpg_hw_cfg *h, int prev_div,
+			int mode, int this,
+			struct sh_mobile_cpg_state *cs);
+
+struct sh_mobile_div_hw_cfg *sh_mobile_div(struct sh_mobile_cpg_hw_cfg *h,
+					   int nr, char *name, int clk,
+					   int grp, unsigned long max_mhz);
+
+void sh_mobile_div_ok(struct sh_mobile_div_hw_cfg *d, int bit);
+void sh_mobile_div_ng(struct sh_mobile_div_hw_cfg *d, int bit);
+
+int sh_mobile_div_optimize(struct sh_mobile_cpg_hw_cfg *fhcp, char *div_str);
+
+int sh_mobile_mstp(struct sh_mobile_cpg_hw_cfg *h,
+		   int nr, char *name, int parent,
+		   unsigned long reg, int bitnr,
+		   int enable_on_init, int use_cpg, int use_ram);
+
+
+int __init sh_mobile_clk_register(struct sh_mobile_cpg_hw_cfg *h);
+
+#endif /* __CLOCK_SH_MOBILE_H__ */

arch/sh/kernel/cpu/shmobile/Makefile +1 -1

@@ -3,4 +3,4 @@
 #
 
 # Power Management & Sleep mode
-obj-$(CONFIG_PM)	+= pm.o sleep.o
+obj-$(CONFIG_PM)	+= pm.o sleep.o clock.o

arch/sh/kernel/cpu/shmobile/clock.c new file +569 -0

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Magnus Damm

author

2009-05-20 14:23 UTC #1 lore raw

PATCH 1/1 sh: shared clock framework code for sh7723

From: Magnus Damm <[email protected]>

This patch hooks up the sh7723 processor to make use of the new and improved clock framework code for SuperH Mobile.

Signed-off-by Magnus Damm <[email protected]>

---

Tested on ap325. Apply on top of the clkfwk topic branch.

 arch/sh/Kconfig                                  |    1 
 arch/sh/include/cpu-common/cpu/clock-sh_mobile.h |    6 
 arch/sh/kernel/cpu/sh4a/Makefile                 |    2 
 arch/sh/kernel/cpu/sh4a/clock-sh7722.c           |   57 ---
 arch/sh/kernel/cpu/sh4a/clock-sh7723.c           |  361 ++++++++++++++++++++++
 5 files changed, 370 insertions(+), 57 deletions(-)

arch/sh/Kconfig +1 -0

@@ -365,6 +365,7 @@ config CPU_SUBTYPE_SH7723
 	select ARCH_SHMOBILE
 	select ARCH_SPARSEMEM_ENABLE
 	select SYS_SUPPORTS_CMT
+	select SH_CLK_DISABLE_LEGACY
 	help
 	  Select SH7723 if you have an SH-MobileR2 CPU.

arch/sh/include/cpu-common/cpu/clock-sh_mobile.h +6 -0

@@ -1,8 +1,14 @@
 #ifndef __CLOCK_SH_MOBILE_H__
 #define __CLOCK_SH_MOBILE_H__
 
+#ifdef CONFIG_CPU_SUBTYPE_SH7723
+#define SH_MOBILE_DIVISOR_NR 9
+#define SH_MOBILE_MSTP_NR 48
+#else
 #define SH_MOBILE_DIVISOR_NR 0 /* override with cpu specific value */
 #define SH_MOBILE_MSTP_NR 0 /* override with cpu specific value */
+#endif
+
 #define SH_MOBILE_ALLOWED_NR 16 /* 4-bit fields is enough for now */
 
 /* system clock modes */

arch/sh/kernel/cpu/sh4a/Makefile +1 -1

@@ -26,7 +26,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7785)	:= cl
 clock-$(CONFIG_CPU_SUBTYPE_SH7786)	:= clock-sh7786.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7343)	:= clock-sh7722.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7722)	:= clock-sh7722.o
-clock-$(CONFIG_CPU_SUBTYPE_SH7723)	:= clock-sh7722.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7723)	:= clock-sh7723.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7724)	:= clock-sh7722.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7366)	:= clock-sh7722.o
 clock-$(CONFIG_CPU_SUBTYPE_SHX3)	:= clock-shx3.o

arch/sh/kernel/cpu/sh4a/clock-sh7722.c +1 ~~-56~~

75 lines not on this page · raw message

arch/sh/kernel/cpu/sh4a/clock-sh7723.c new file +361 -0

361 lines not on this page · raw message