pci: is reset incomplete?
Subsystems (2)
Michael S. Tsirkin
maintainerHi!
pci bus reset does not seem to clear pci config registers, such as BAR registers, or memory space enable, of the attached devices: it only clears the interrupt state.
This seems wrong, but easy to fix.
Comments?
Signature · 1 line
MST
Quoted 7 lines · Michael S. Tsirkin
Hi!
pci bus reset does not seem to clear pci config registers, such as BAR registers, or memory space enable, of the attached devices: it only clears the interrupt state.This seems wrong, but easy to fix.
I don't think most pci devices reset their config space in their reset callbacks.
I would think that making most of the config space (if not the entire) qdev properties would make sense. You can then get reset for free and it's possible for users to tweak things like class codes universally.
Regards,
Anthony Liguori
Quoted 3 lines
Comments?
Quoted 7 lines · Michael S. Tsirkin
Hi!
pci bus reset does not seem to clear pci config registers, such as BAR registers, or memory space enable, of the attached devices: it only clears the interrupt state.This seems wrong, but easy to fix.
I don't think most pci devices reset their config space in their reset callbacks.
I would think that making most of the config space (if not the entire) qdev properties would make sense. You can then get reset for free and it's possible for users to tweak things like class codes universally.
Regards,
Anthony Liguori
Quoted 3 lines
Comments?
Michael S. Tsirkin
maintainerQuoted 11 lines · Anthony Liguori
Quoted 7 lines · Michael S. Tsirkin
Hi!
pci bus reset does not seem to clear pci config registers, such as BAR registers, or memory space enable, of the attached devices: it only clears the interrupt state.This seems wrong, but easy to fix.
I don't think most pci devices reset their config space in their reset callbacks.
For things like BAR registers, they really must.
The PCI spec is quite specific on this point.
Quoted 3 lines
I would think that making most of the config space (if not the entire) qdev properties would make sense. You can then get reset for free and it's possible for users to tweak things like class codes universally.
class codes are read only registers. Your proposal might be correct for some of these. But PCI registers that are reset, change as a result of guest activity, and reset values are typically specified by guest spec. So I don't think we should let users tweak these.
Quoted 7 lines
Regards,
Anthony Liguori
Quoted 3 lines
Comments?
Michael S. Tsirkin
maintainerQuoted 11 lines · Anthony Liguori
Quoted 7 lines · Michael S. Tsirkin
Hi!
pci bus reset does not seem to clear pci config registers, such as BAR registers, or memory space enable, of the attached devices: it only clears the interrupt state.This seems wrong, but easy to fix.
I don't think most pci devices reset their config space in their reset callbacks.
For things like BAR registers, they really must.
The PCI spec is quite specific on this point.
Quoted 3 lines
I would think that making most of the config space (if not the entire) qdev properties would make sense. You can then get reset for free and it's possible for users to tweak things like class codes universally.
class codes are read only registers. Your proposal might be correct for some of these. But PCI registers that are reset, change as a result of guest activity, and reset values are typically specified by guest spec. So I don't think we should let users tweak these.
Quoted 7 lines
Regards,
Anthony Liguori
Quoted 3 lines
Comments?
Quoted 9 lines · Michael S. Tsirkin
Quoted 7 lines · Anthony Liguori
Quoted 5 lines · Michael S. Tsirkin
Hi!
pci bus reset does not seem to clear pci config registers, such as BAR registers, or memory space enable, of the attached devices: it only clears the interrupt state.
Quoted 9 lines
Quoted 6 lines
Quoted 3 lines
This seems wrong, but easy to fix.
I don't think most pci devices reset their config space in their reset callbacks.
For things like BAR registers, they really must.
BARs should be registered via pci_register_bar so you should be able to centralize their reset.
Quoted 5 lines
class codes are read only registers. Your proposal might be correct for some of these. But PCI registers that are reset, change as a result of guest activity, and reset values are typically specified by guest spec. So I don't think we should let users tweak these.
Well, I guess my general point was that it would be good to add more structure to how config space is initialized. I think a natural consequence of that is that it becomes easier to automatically fix the values on reset.
Regards,
Anthony Liguori
Quoted 9 lines · Michael S. Tsirkin
Quoted 7 lines · Anthony Liguori
Quoted 5 lines · Michael S. Tsirkin
Hi!
pci bus reset does not seem to clear pci config registers, such as BAR registers, or memory space enable, of the attached devices: it only clears the interrupt state.
Quoted 8 lines
Quoted 5 lines
Quoted 3 lines
This seems wrong, but easy to fix.
I don't think most pci devices reset their config space in their reset callbacks.
For things like BAR registers, they really must.
BARs should be registered via pci_register_bar so you should be able to centralize their reset.
Quoted 5 lines
class codes are read only registers. Your proposal might be correct for some of these. But PCI registers that are reset, change as a result of guest activity, and reset values are typically specified by guest spec. So I don't think we should let users tweak these.
Well, I guess my general point was that it would be good to add more structure to how config space is initialized. I think a natural consequence of that is that it becomes easier to automatically fix the values on reset.
Regards,
Anthony Liguori