Use ioremap for omap, split OMAP2_IO_ADDRESS for more space

PATCH New Tony Lindgren 4 participants 30 messages Oct 16, 2009 – Oct 20, 2009

Subsystems (8)

Arm (32-bit) Arm sub-architectures Framebuffer layer OMAP2+ support +4 more subsystems

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Tony Lindgren

author maintainer

2009-10-16 23:40 UTC #0 lore raw

cover Use ioremap for omap, split OMAP2_IO_ADDRESS for more space

Hi all,

This series intended for the merge window after 2.6.32 removes OMAP2_IO_ADDRESS to reclaim more address space.

OMAP2_IO_ADDRESS is replaced with ioremap where possible, and the remaining usage is split into OMAP2_L3_IO_ADDRESS and OMAP2_L4_IO_ADDRESS.

Some usage still remains in *.S files and headers. Eventually we should be able to remove the usage and only define it locally.

Note that after this series omap4 no longer uses these macros. Other omaps will need more work still.

Regards,

Tony

---

Santosh Shilimkar (5):
omap: Add OMAP4 L3 and L4 peripherals.
omap: Fix DEBUG_LL UART io address
omap: Move SRAM map to claim more io space
omap: Remap L3, L4 to get more kernel io address space
omap: Split OMAP2_IO_ADDRESS to L3 and L4

Tony Lindgren (9):
omap: Use ioremap in dispc.c
omap: Use ioremap for omap4 L4 code
omap: Use getnstimeofday for omap_device
omap: Use ioremap in omap_hwmod.c
omap: Use ioremap in gpio.c
omap: Use ioremap in dmtimer.c
omap: Use ioremap in dma.c
omap: Use ioremap in irq.c
omap: Change low-level serial init to use ioremap

 arch/arm/mach-omap1/serial.c                  |   11 +
 arch/arm/mach-omap2/board-2430sdp.c           |    2 
 arch/arm/mach-omap2/board-3430sdp.c           |    2 
 arch/arm/mach-omap2/board-4430sdp.c           |   15 +-
 arch/arm/mach-omap2/board-apollon.c           |    2 
 arch/arm/mach-omap2/board-generic.c           |    2 
 arch/arm/mach-omap2/board-h4.c                |    2 
 arch/arm/mach-omap2/board-ldp.c               |    2 
 arch/arm/mach-omap2/board-n8x0.c              |    6 -
 arch/arm/mach-omap2/board-omap3beagle.c       |    2 
 arch/arm/mach-omap2/board-omap3evm.c          |    2 
 arch/arm/mach-omap2/board-omap3pandora.c      |    2 
 arch/arm/mach-omap2/board-overo.c             |    2 
 arch/arm/mach-omap2/board-rx51.c              |    2 
 arch/arm/mach-omap2/board-zoom2.c             |    2 
 arch/arm/mach-omap2/cm.h                      |    6 -
 arch/arm/mach-omap2/io.c                      |   18 ++
 arch/arm/mach-omap2/irq.c                     |   12 +
 arch/arm/mach-omap2/omap-smp.c                |   28 ++-
 arch/arm/mach-omap2/omap_hwmod.c              |   18 +-
 arch/arm/mach-omap2/pm-debug.c                |    3 
 arch/arm/mach-omap2/prm.h                     |    6 -
 arch/arm/mach-omap2/sdrc.h                    |    9 +
 arch/arm/mach-omap2/serial.c                  |   15 +-
 arch/arm/mach-omap2/sram242x.S                |    4 
 arch/arm/mach-omap2/sram243x.S                |    4 
 arch/arm/mach-omap2/timer-gp.c                |    3 
 arch/arm/plat-omap/common.c                   |   44 ++---
 arch/arm/plat-omap/dma.c                      |   34 +++-
 arch/arm/plat-omap/dmtimer.c                  |   16 +-
 arch/arm/plat-omap/gpio.c                     |  222 ++++++++++++++-----------
 arch/arm/plat-omap/include/mach/control.h     |   15 +-
 arch/arm/plat-omap/include/mach/debug-macro.S |    4 
 arch/arm/plat-omap/include/mach/entry-macro.S |    6 -
 arch/arm/plat-omap/include/mach/io.h          |  124 ++++++++++----
 arch/arm/plat-omap/include/mach/omap44xx.h    |    8 -
 arch/arm/plat-omap/include/mach/sdrc.h        |    6 -
 arch/arm/plat-omap/include/mach/vmalloc.h     |    2 
 arch/arm/plat-omap/io.c                       |   20 ++
 arch/arm/plat-omap/omap_device.c              |   50 ++----
 arch/arm/plat-omap/sram.c                     |   24 +--
 drivers/video/omap/dispc.c                    |   20 ++
 42 files changed, 479 insertions(+), 298 deletions(-)

Signature · 1 line

Signature

Tony Lindgren

author maintainer

2009-10-16 23:40 UTC #1 lore raw

PATCH 1/14 omap: Change low-level serial init to use ioremap

Change low-level serial init to use ioremap

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/mach-omap1/serial.c |   11 ++++++++---
 arch/arm/mach-omap2/serial.c |   15 ++++++++++-----
 2 files changed, 18 insertions(+), 8 deletions(-)

arch/arm/mach-omap1/serial.c +8 -3

index ed07af1..cab4171 100644
@@ -64,7 +64,6 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p)
 
 static struct plat_serial8250_port serial_platform_data[] = {
 	{
-		.membase	= OMAP1_IO_ADDRESS(OMAP_UART1_BASE),
 		.mapbase	= OMAP_UART1_BASE,
 		.irq		= INT_UART1,
 		.flags		= UPF_BOOT_AUTOCONF,

@@ -73,7 +72,6 @@ static struct plat_serial8250_port serial_platform_data[] = {
 		.uartclk	= OMAP16XX_BASE_BAUD * 16,
 	},
 	{
-		.membase	= OMAP1_IO_ADDRESS(OMAP_UART2_BASE),
 		.mapbase	= OMAP_UART2_BASE,
 		.irq		= INT_UART2,
 		.flags		= UPF_BOOT_AUTOCONF,

@@ -82,7 +80,6 @@ static struct plat_serial8250_port serial_platform_data[] = {
 		.uartclk	= OMAP16XX_BASE_BAUD * 16,
 	},
 	{
-		.membase	= OMAP1_IO_ADDRESS(OMAP_UART3_BASE),
 		.mapbase	= OMAP_UART3_BASE,
 		.irq		= INT_UART3,
 		.flags		= UPF_BOOT_AUTOCONF,

@@ -126,6 +123,14 @@ void __init omap_serial_init(void)
 	for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
 		unsigned char reg;
 
+		/* Static mapping, never released */
+		serial_platform_data[i].membase =
+			ioremap(serial_platform_data[i].mapbase, SZ_2K);
+		if (!serial_platform_data[i].membase) {
+			printk(KERN_ERR "Could not ioremap uart%i\n", i);
+			continue;
+		}
+
 		switch (i) {
 		case 0:
 			uart1_ck = clk_get(NULL, "uart1_ck");

arch/arm/mach-omap2/serial.c +10 -5

index ae21868..9b6c403 100644
@@ -73,7 +73,6 @@ static LIST_HEAD(uart_list);
 
 static struct plat_serial8250_port serial_platform_data0[] = {
 	{
-		.membase	= OMAP2_IO_ADDRESS(OMAP_UART1_BASE),
 		.mapbase	= OMAP_UART1_BASE,
 		.irq		= 72,
 		.flags		= UPF_BOOT_AUTOCONF,

@@ -87,7 +86,6 @@ static struct plat_serial8250_port serial_platform_data0[] = {
 
 static struct plat_serial8250_port serial_platform_data1[] = {
 	{
-		.membase	= OMAP2_IO_ADDRESS(OMAP_UART2_BASE),
 		.mapbase	= OMAP_UART2_BASE,
 		.irq		= 73,
 		.flags		= UPF_BOOT_AUTOCONF,

@@ -101,7 +99,6 @@ static struct plat_serial8250_port serial_platform_data1[] = {
 
 static struct plat_serial8250_port serial_platform_data2[] = {
 	{
-		.membase	= OMAP2_IO_ADDRESS(OMAP_UART3_BASE),
 		.mapbase	= OMAP_UART3_BASE,
 		.irq		= 74,
 		.flags		= UPF_BOOT_AUTOCONF,

@@ -110,7 +107,6 @@ static struct plat_serial8250_port serial_platform_data2[] = {
 		.uartclk	= OMAP24XX_BASE_BAUD * 16,
 	}, {
 #ifdef CONFIG_ARCH_OMAP4
-		.membase	= OMAP2_IO_ADDRESS(OMAP_UART4_BASE),
 		.mapbase	= OMAP_UART4_BASE,
 		.irq		= 70,
 		.flags		= UPF_BOOT_AUTOCONF,

@@ -126,7 +122,6 @@ static struct plat_serial8250_port serial_platform_data2[] = {
 #ifdef CONFIG_ARCH_OMAP4
 static struct plat_serial8250_port serial_platform_data3[] = {
 	{
-		.membase	= OMAP2_IO_ADDRESS(OMAP_UART4_BASE),
 		.mapbase	= OMAP_UART4_BASE,
 		.irq		= 70,
 		.flags		= UPF_BOOT_AUTOCONF,

@@ -605,6 +600,16 @@ void __init omap_serial_early_init(void)
 		struct device *dev = &pdev->dev;
 		struct plat_serial8250_port *p = dev->platform_data;
 
+		/*
+		 * Module 4KB + L4 interconnect 4KB
+		 * Static mapping, never released
+		 */
+		p->membase = ioremap(p->mapbase, SZ_8K);
+		if (!p->membase) {
+			printk(KERN_ERR "ioremap failed for uart%i\n", i + 1);
+			continue;
+		}
+
 		sprintf(name, "uart%d_ick", i+1);
 		uart->ick = clk_get(NULL, name);
 		if (IS_ERR(uart->ick)) {

Tony Lindgren

author maintainer

2009-10-16 23:40 UTC #2 lore raw

PATCH 2/14 omap: Use ioremap in irq.c

In reply to Tony Lindgren

Use ioremap in irq.c

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/mach-omap2/irq.c |   12 ++++++++++--
 1 files changed, 10 insertions(+), 2 deletions(-)

arch/arm/mach-omap2/irq.c +10 -2

index b828638..1db121f 100644
@@ -178,12 +178,20 @@ void __init omap_init_irq(void)
 	int i;
 
 	for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
+		unsigned long base;
 		struct omap_irq_bank *bank = irq_banks + i;
 
 		if (cpu_is_omap24xx())
-			bank->base_reg = OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE);
+			base = OMAP24XX_IC_BASE;
 		else if (cpu_is_omap34xx())
-			bank->base_reg = OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE);
+			base = OMAP34XX_IC_BASE;
+
+		/* Static mapping, never released */
+		bank->base_reg = ioremap(base, SZ_4K);
+		if (!bank->base_reg) {
+			printk(KERN_ERR "Could not ioremap irq bank%i\n", i);
+			continue;
+		}
 
 		omap_irq_bank_init_one(bank);

Tony Lindgren

author maintainer

2009-10-16 23:40 UTC #3 lore raw

PATCH 3/14 omap: Use ioremap in dma.c

In reply to Tony Lindgren

Use ioremap in dma.c

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/plat-omap/dma.c |   34 ++++++++++++++++++++++++----------
 1 files changed, 24 insertions(+), 10 deletions(-)

arch/arm/plat-omap/dma.c +24 ~~-10~~

index 0eb676d..034686d 100644
@@ -2347,40 +2347,46 @@ EXPORT_SYMBOL(omap_stop_lcd_dma);
 
 static int __init omap_init_dma(void)
 {
+	unsigned long base;
 	int ch, r;
 
 	if (cpu_class_is_omap1()) {
-		omap_dma_base = OMAP1_IO_ADDRESS(OMAP1_DMA_BASE);
+		base = OMAP1_DMA_BASE;
 		dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT;
 	} else if (cpu_is_omap24xx()) {
-		omap_dma_base = OMAP2_IO_ADDRESS(OMAP24XX_DMA4_BASE);
+		base = OMAP24XX_DMA4_BASE;
 		dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
 	} else if (cpu_is_omap34xx()) {
-		omap_dma_base = OMAP2_IO_ADDRESS(OMAP34XX_DMA4_BASE);
+		base = OMAP34XX_DMA4_BASE;
 		dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
 	} else if (cpu_is_omap44xx()) {
-		omap_dma_base = OMAP2_IO_ADDRESS(OMAP44XX_DMA4_BASE);
+		base = OMAP44XX_DMA4_BASE;
 		dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
 	} else {
 		pr_err("DMA init failed for unsupported omap\n");
 		return -ENODEV;
 	}
 
+	omap_dma_base = ioremap(base, SZ_4K);
+	BUG_ON(!omap_dma_base);
+
 	if (cpu_class_is_omap2() && omap_dma_reserve_channels
 			&& (omap_dma_reserve_channels <= dma_lch_count))
 		dma_lch_count = omap_dma_reserve_channels;
 
 	dma_chan = kzalloc(sizeof(struct omap_dma_lch) * dma_lch_count,
 				GFP_KERNEL);
-	if (!dma_chan)
-		return -ENOMEM;
+	if (!dma_chan) {
+		r = -ENOMEM;
+		goto out_unmap;
+	}
 
 	if (cpu_class_is_omap2()) {
 		dma_linked_lch = kzalloc(sizeof(struct dma_link_info) *
 						dma_lch_count, GFP_KERNEL);
 		if (!dma_linked_lch) {
-			kfree(dma_chan);
-			return -ENOMEM;
+			r = -ENOMEM;
+			goto out_free;
 		}
 	}

@@ -2454,7 +2460,7 @@ static int __init omap_init_dma(void)
 				for (i = 0; i < ch; i++)
 					free_irq(omap1_dma_irq[i],
 						 (void *) (i + 1));
-				return r;
+				goto out_free;
 			}
 		}
 	}

@@ -2496,11 +2502,19 @@ static int __init omap_init_dma(void)
 			       "(error %d)\n", r);
 			for (i = 0; i < dma_chan_count; i++)
 				free_irq(omap1_dma_irq[i], (void *) (i + 1));
-			return r;
+			goto out_free;
 		}
 	}
 
 	return 0;
+
+out_free:
+	kfree(dma_chan);
+
+out_unmap:
+	iounmap(omap_dma_base);
+
+	return r;
 }
 
 arch_initcall(omap_init_dma);

Tony Lindgren

author maintainer

2009-10-16 23:40 UTC #4 lore raw

PATCH 4/14 omap: Use ioremap in dmtimer.c

In reply to Tony Lindgren

Use ioremap in dmtimer.c

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/plat-omap/dmtimer.c |   16 +++++++++-------
 1 files changed, 9 insertions(+), 7 deletions(-)

arch/arm/plat-omap/dmtimer.c +9 -7

index d325b54..e4e848e 100644
@@ -742,16 +742,17 @@ EXPORT_SYMBOL_GPL(omap_dm_timers_active);
 int __init omap_dm_timer_init(void)
 {
 	struct omap_dm_timer *timer;
-	int i;
+	int i, map_size = SZ_8K;	/* Module 4KB + L4 4KB except on omap1 */
 
 	if (!(cpu_is_omap16xx() || cpu_class_is_omap2()))
 		return -ENODEV;
 
 	spin_lock_init(&dm_timer_lock);
 
-	if (cpu_class_is_omap1())
+	if (cpu_class_is_omap1()) {
 		dm_timers = omap1_dm_timers;
-	else if (cpu_is_omap24xx()) {
+		map_size = SZ_2K;
+	} else if (cpu_is_omap24xx()) {
 		dm_timers = omap2_dm_timers;
 		dm_source_names = omap2_dm_source_names;
 		dm_source_clocks = omap2_dm_source_clocks;

@@ -774,10 +775,11 @@ int __init omap_dm_timer_init(void)
 
 	for (i = 0; i < dm_timer_count; i++) {
 		timer = &dm_timers[i];
-		if (cpu_class_is_omap1())
-			timer->io_base = OMAP1_IO_ADDRESS(timer->phys_base);
-		else
-			timer->io_base = OMAP2_IO_ADDRESS(timer->phys_base);
+
+		/* Static mapping, never released */
+		timer->io_base = ioremap(timer->phys_base, map_size);
+		BUG_ON(!timer->io_base);
+
 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
 					defined(CONFIG_ARCH_OMAP4)
 		if (cpu_class_is_omap2()) {

Tony Lindgren

author maintainer

2009-10-16 23:41 UTC #5 lore raw

PATCH 5/14 omap: Use ioremap in gpio.c

In reply to Tony Lindgren

Use ioremap in gpio.c

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/plat-omap/gpio.c |  222 ++++++++++++++++++++++++++-------------------
 1 files changed, 128 insertions(+), 94 deletions(-)

arch/arm/plat-omap/gpio.c +128 ~~-94~~

index b0c7361..30b93ff 100644
@@ -45,10 +45,10 @@
 /*
  * OMAP1610 specific GPIO registers
  */
-#define OMAP1610_GPIO1_BASE		OMAP1_IO_ADDRESS(0xfffbe400)
-#define OMAP1610_GPIO2_BASE		OMAP1_IO_ADDRESS(0xfffbec00)
-#define OMAP1610_GPIO3_BASE		OMAP1_IO_ADDRESS(0xfffbb400)
-#define OMAP1610_GPIO4_BASE		OMAP1_IO_ADDRESS(0xfffbbc00)
+#define OMAP1610_GPIO1_BASE		0xfffbe400
+#define OMAP1610_GPIO2_BASE		0xfffbec00
+#define OMAP1610_GPIO3_BASE		0xfffbb400
+#define OMAP1610_GPIO4_BASE		0xfffbbc00
 #define OMAP1610_GPIO_REVISION		0x0000
 #define OMAP1610_GPIO_SYSCONFIG		0x0010
 #define OMAP1610_GPIO_SYSSTATUS		0x0014

@@ -70,12 +70,12 @@
 /*
  * OMAP7XX specific GPIO registers
  */
-#define OMAP7XX_GPIO1_BASE		OMAP1_IO_ADDRESS(0xfffbc000)
-#define OMAP7XX_GPIO2_BASE		OMAP1_IO_ADDRESS(0xfffbc800)
-#define OMAP7XX_GPIO3_BASE		OMAP1_IO_ADDRESS(0xfffbd000)
-#define OMAP7XX_GPIO4_BASE		OMAP1_IO_ADDRESS(0xfffbd800)
-#define OMAP7XX_GPIO5_BASE		OMAP1_IO_ADDRESS(0xfffbe000)
-#define OMAP7XX_GPIO6_BASE		OMAP1_IO_ADDRESS(0xfffbe800)
+#define OMAP7XX_GPIO1_BASE		0xfffbc000
+#define OMAP7XX_GPIO2_BASE		0xfffbc800
+#define OMAP7XX_GPIO3_BASE		0xfffbd000
+#define OMAP7XX_GPIO4_BASE		0xfffbd800
+#define OMAP7XX_GPIO5_BASE		0xfffbe000
+#define OMAP7XX_GPIO6_BASE		0xfffbe800
 #define OMAP7XX_GPIO_DATA_INPUT		0x00
 #define OMAP7XX_GPIO_DATA_OUTPUT	0x04
 #define OMAP7XX_GPIO_DIR_CONTROL	0x08

@@ -83,21 +83,21 @@
 #define OMAP7XX_GPIO_INT_MASK		0x10
 #define OMAP7XX_GPIO_INT_STATUS		0x14
 
-#define OMAP1_MPUIO_VBASE		OMAP1_IO_ADDRESS(OMAP1_MPUIO_BASE)
+#define OMAP1_MPUIO_VBASE		OMAP1_MPUIO_BASE
 
 /*
  * omap24xx specific GPIO registers
  */
-#define OMAP242X_GPIO1_BASE		OMAP2_IO_ADDRESS(0x48018000)
-#define OMAP242X_GPIO2_BASE		OMAP2_IO_ADDRESS(0x4801a000)
-#define OMAP242X_GPIO3_BASE		OMAP2_IO_ADDRESS(0x4801c000)
-#define OMAP242X_GPIO4_BASE		OMAP2_IO_ADDRESS(0x4801e000)
+#define OMAP242X_GPIO1_BASE		0x48018000
+#define OMAP242X_GPIO2_BASE		0x4801a000
+#define OMAP242X_GPIO3_BASE		0x4801c000
+#define OMAP242X_GPIO4_BASE		0x4801e000
 
-#define OMAP243X_GPIO1_BASE		OMAP2_IO_ADDRESS(0x4900C000)
-#define OMAP243X_GPIO2_BASE		OMAP2_IO_ADDRESS(0x4900E000)
-#define OMAP243X_GPIO3_BASE		OMAP2_IO_ADDRESS(0x49010000)
-#define OMAP243X_GPIO4_BASE		OMAP2_IO_ADDRESS(0x49012000)
-#define OMAP243X_GPIO5_BASE		OMAP2_IO_ADDRESS(0x480B6000)
+#define OMAP243X_GPIO1_BASE		0x4900C000
+#define OMAP243X_GPIO2_BASE		0x4900E000
+#define OMAP243X_GPIO3_BASE		0x49010000
+#define OMAP243X_GPIO4_BASE		0x49012000
+#define OMAP243X_GPIO5_BASE		0x480B6000
 
 #define OMAP24XX_GPIO_REVISION		0x0000
 #define OMAP24XX_GPIO_SYSCONFIG		0x0010

@@ -154,24 +154,25 @@
  * omap34xx specific GPIO registers
  */
 
-#define OMAP34XX_GPIO1_BASE		OMAP2_IO_ADDRESS(0x48310000)
-#define OMAP34XX_GPIO2_BASE		OMAP2_IO_ADDRESS(0x49050000)
-#define OMAP34XX_GPIO3_BASE		OMAP2_IO_ADDRESS(0x49052000)
-#define OMAP34XX_GPIO4_BASE		OMAP2_IO_ADDRESS(0x49054000)
-#define OMAP34XX_GPIO5_BASE		OMAP2_IO_ADDRESS(0x49056000)
-#define OMAP34XX_GPIO6_BASE		OMAP2_IO_ADDRESS(0x49058000)
+#define OMAP34XX_GPIO1_BASE		0x48310000
+#define OMAP34XX_GPIO2_BASE		0x49050000
+#define OMAP34XX_GPIO3_BASE		0x49052000
+#define OMAP34XX_GPIO4_BASE		0x49054000
+#define OMAP34XX_GPIO5_BASE		0x49056000
+#define OMAP34XX_GPIO6_BASE		0x49058000
 
 /*
  * OMAP44XX  specific GPIO registers
  */
-#define OMAP44XX_GPIO1_BASE             OMAP2_IO_ADDRESS(0x4a310000)
-#define OMAP44XX_GPIO2_BASE             OMAP2_IO_ADDRESS(0x48055000)
-#define OMAP44XX_GPIO3_BASE             OMAP2_IO_ADDRESS(0x48057000)
-#define OMAP44XX_GPIO4_BASE             OMAP2_IO_ADDRESS(0x48059000)
-#define OMAP44XX_GPIO5_BASE             OMAP2_IO_ADDRESS(0x4805B000)
-#define OMAP44XX_GPIO6_BASE             OMAP2_IO_ADDRESS(0x4805D000)
+#define OMAP44XX_GPIO1_BASE             0x4a310000
+#define OMAP44XX_GPIO2_BASE             0x48055000
+#define OMAP44XX_GPIO3_BASE             0x48057000
+#define OMAP44XX_GPIO4_BASE             0x48059000
+#define OMAP44XX_GPIO5_BASE             0x4805B000
+#define OMAP44XX_GPIO6_BASE             0x4805D000
 
 struct gpio_bank {
+	unsigned long pbase;
 	void __iomem *base;
 	u16 irq;
 	u16 virtual_irq_start;

@@ -204,77 +205,106 @@ struct gpio_bank {
 
 #ifdef CONFIG_ARCH_OMAP16XX
 static struct gpio_bank gpio_bank_1610[5] = {
-	{ OMAP1_MPUIO_VBASE,    INT_MPUIO,	    IH_MPUIO_BASE,     METHOD_MPUIO},
-	{ OMAP1610_GPIO1_BASE, INT_GPIO_BANK1,	    IH_GPIO_BASE,      METHOD_GPIO_1610 },
-	{ OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 },
-	{ OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 },
-	{ OMAP1610_GPIO4_BASE, INT_1610_GPIO_BANK4, IH_GPIO_BASE + 48, METHOD_GPIO_1610 },
+	{ OMAP1_MPUIO_VBASE, 0, INT_MPUIO, IH_MPUIO_BASE,
+		METHOD_MPUIO },
+	{ OMAP1610_GPIO1_BASE, 0, INT_GPIO_BANK1, IH_GPIO_BASE,
+		METHOD_GPIO_1610 },
+	{ OMAP1610_GPIO2_BASE, 0, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16,
+		METHOD_GPIO_1610 },
+	{ OMAP1610_GPIO3_BASE, 0, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32,
+		METHOD_GPIO_1610 },
+	{ OMAP1610_GPIO4_BASE, 0, INT_1610_GPIO_BANK4, IH_GPIO_BASE + 48,
+		METHOD_GPIO_1610 },
 };
 #endif
 
 #ifdef CONFIG_ARCH_OMAP15XX
 static struct gpio_bank gpio_bank_1510[2] = {
-	{ OMAP1_MPUIO_VBASE,   INT_MPUIO,      IH_MPUIO_BASE, METHOD_MPUIO },
-	{ OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE,  METHOD_GPIO_1510 }
+	{ OMAP1_MPUIO_VBASE, 0, INT_MPUIO, IH_MPUIO_BASE,
+		METHOD_MPUIO },
+	{ OMAP1510_GPIO_BASE, 0, INT_GPIO_BANK1, IH_GPIO_BASE,
+		METHOD_GPIO_1510 }
 };
 #endif
 
 #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
 static struct gpio_bank gpio_bank_7xx[7] = {
-	{ OMAP1_MPUIO_VBASE,    INT_7XX_MPUIO,	    IH_MPUIO_BASE,	METHOD_MPUIO },
-	{ OMAP7XX_GPIO1_BASE,  INT_7XX_GPIO_BANK1,  IH_GPIO_BASE,	METHOD_GPIO_7XX },
-	{ OMAP7XX_GPIO2_BASE,  INT_7XX_GPIO_BANK2,  IH_GPIO_BASE + 32,	METHOD_GPIO_7XX },
-	{ OMAP7XX_GPIO3_BASE,  INT_7XX_GPIO_BANK3,  IH_GPIO_BASE + 64,	METHOD_GPIO_7XX },
-	{ OMAP7XX_GPIO4_BASE,  INT_7XX_GPIO_BANK4,  IH_GPIO_BASE + 96,	METHOD_GPIO_7XX },
-	{ OMAP7XX_GPIO5_BASE,  INT_7XX_GPIO_BANK5,  IH_GPIO_BASE + 128, METHOD_GPIO_7XX },
-	{ OMAP7XX_GPIO6_BASE,  INT_7XX_GPIO_BANK6,  IH_GPIO_BASE + 160, METHOD_GPIO_7XX },
+	{ OMAP1_MPUIO_VBASE, 0, INT_7XX_MPUIO, IH_MPUIO_BASE,
+		METHOD_MPUIO },
+	{ OMAP7XX_GPIO1_BASE, 0, INT_7XX_GPIO_BANK1, IH_GPIO_BASE,
+		METHOD_GPIO_7XX },
+	{ OMAP7XX_GPIO2_BASE, 0, INT_7XX_GPIO_BANK2, IH_GPIO_BASE + 32,
+		METHOD_GPIO_7XX },
+	{ OMAP7XX_GPIO3_BASE, 0, INT_7XX_GPIO_BANK3, IH_GPIO_BASE + 64,
+		METHOD_GPIO_7XX },
+	{ OMAP7XX_GPIO4_BASE, 0, INT_7XX_GPIO_BANK4,  IH_GPIO_BASE + 96,
+		METHOD_GPIO_7XX },
+	{ OMAP7XX_GPIO5_BASE, 0, INT_7XX_GPIO_BANK5,  IH_GPIO_BASE + 128,
+		METHOD_GPIO_7XX },
+	{ OMAP7XX_GPIO6_BASE, 0, INT_7XX_GPIO_BANK6,  IH_GPIO_BASE + 160,
+		METHOD_GPIO_7XX },
 };
 #endif
 
 #ifdef CONFIG_ARCH_OMAP24XX
 
 static struct gpio_bank gpio_bank_242x[4] = {
-	{ OMAP242X_GPIO1_BASE, INT_24XX_GPIO_BANK1, IH_GPIO_BASE,	METHOD_GPIO_24XX },
-	{ OMAP242X_GPIO2_BASE, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32,	METHOD_GPIO_24XX },
-	{ OMAP242X_GPIO3_BASE, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64,	METHOD_GPIO_24XX },
-	{ OMAP242X_GPIO4_BASE, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96,	METHOD_GPIO_24XX },
+	{ OMAP242X_GPIO1_BASE, 0, INT_24XX_GPIO_BANK1, IH_GPIO_BASE,
+		METHOD_GPIO_24XX },
+	{ OMAP242X_GPIO2_BASE, 0, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32,
+		METHOD_GPIO_24XX },
+	{ OMAP242X_GPIO3_BASE, 0, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64,
+		METHOD_GPIO_24XX },
+	{ OMAP242X_GPIO4_BASE, 0, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96,
+		METHOD_GPIO_24XX },
 };
 
 static struct gpio_bank gpio_bank_243x[5] = {
-	{ OMAP243X_GPIO1_BASE, INT_24XX_GPIO_BANK1, IH_GPIO_BASE,	METHOD_GPIO_24XX },
-	{ OMAP243X_GPIO2_BASE, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32,	METHOD_GPIO_24XX },
-	{ OMAP243X_GPIO3_BASE, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64,	METHOD_GPIO_24XX },
-	{ OMAP243X_GPIO4_BASE, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96,	METHOD_GPIO_24XX },
-	{ OMAP243X_GPIO5_BASE, INT_24XX_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_24XX },
+	{ OMAP243X_GPIO1_BASE, 0, INT_24XX_GPIO_BANK1, IH_GPIO_BASE,
+		METHOD_GPIO_24XX },
+	{ OMAP243X_GPIO2_BASE, 0, INT_24XX_GPIO_BANK2, IH_GPIO_BASE + 32,
+		METHOD_GPIO_24XX },
+	{ OMAP243X_GPIO3_BASE, 0, INT_24XX_GPIO_BANK3, IH_GPIO_BASE + 64,
+		METHOD_GPIO_24XX },
+	{ OMAP243X_GPIO4_BASE, 0, INT_24XX_GPIO_BANK4, IH_GPIO_BASE + 96,
+		METHOD_GPIO_24XX },
+	{ OMAP243X_GPIO5_BASE, 0, INT_24XX_GPIO_BANK5, IH_GPIO_BASE + 128,
+		METHOD_GPIO_24XX },
 };
 
 #endif
 
 #ifdef CONFIG_ARCH_OMAP34XX
 static struct gpio_bank gpio_bank_34xx[6] = {
-	{ OMAP34XX_GPIO1_BASE, INT_34XX_GPIO_BANK1, IH_GPIO_BASE,	METHOD_GPIO_24XX },
-	{ OMAP34XX_GPIO2_BASE, INT_34XX_GPIO_BANK2, IH_GPIO_BASE + 32,	METHOD_GPIO_24XX },
-	{ OMAP34XX_GPIO3_BASE, INT_34XX_GPIO_BANK3, IH_GPIO_BASE + 64,	METHOD_GPIO_24XX },
-	{ OMAP34XX_GPIO4_BASE, INT_34XX_GPIO_BANK4, IH_GPIO_BASE + 96,	METHOD_GPIO_24XX },
-	{ OMAP34XX_GPIO5_BASE, INT_34XX_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_24XX },
-	{ OMAP34XX_GPIO6_BASE, INT_34XX_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_24XX },
+	{ OMAP34XX_GPIO1_BASE, 0, INT_34XX_GPIO_BANK1, IH_GPIO_BASE,
+		METHOD_GPIO_24XX },
+	{ OMAP34XX_GPIO2_BASE, 0, INT_34XX_GPIO_BANK2, IH_GPIO_BASE + 32,
+		METHOD_GPIO_24XX },
+	{ OMAP34XX_GPIO3_BASE, 0, INT_34XX_GPIO_BANK3, IH_GPIO_BASE + 64,
+		METHOD_GPIO_24XX },
+	{ OMAP34XX_GPIO4_BASE, 0, INT_34XX_GPIO_BANK4, IH_GPIO_BASE + 96,
+		METHOD_GPIO_24XX },
+	{ OMAP34XX_GPIO5_BASE, 0, INT_34XX_GPIO_BANK5, IH_GPIO_BASE + 128,
+		METHOD_GPIO_24XX },
+	{ OMAP34XX_GPIO6_BASE, 0, INT_34XX_GPIO_BANK6, IH_GPIO_BASE + 160,
+		METHOD_GPIO_24XX },
 };
 
 #endif
 
 #ifdef CONFIG_ARCH_OMAP4
 static struct gpio_bank gpio_bank_44xx[6] = {
-	{ OMAP44XX_GPIO1_BASE, INT_44XX_GPIO_BANK1, IH_GPIO_BASE,	\
+	{ OMAP44XX_GPIO1_BASE, 0, INT_44XX_GPIO_BANK1, IH_GPIO_BASE,
 		METHOD_GPIO_24XX },
-	{ OMAP44XX_GPIO2_BASE, INT_44XX_GPIO_BANK2, IH_GPIO_BASE + 32,	\
+	{ OMAP44XX_GPIO2_BASE, 0, INT_44XX_GPIO_BANK2, IH_GPIO_BASE + 32,
 		METHOD_GPIO_24XX },
-	{ OMAP44XX_GPIO3_BASE, INT_44XX_GPIO_BANK3, IH_GPIO_BASE + 64,	\
+	{ OMAP44XX_GPIO3_BASE, 0, INT_44XX_GPIO_BANK3, IH_GPIO_BASE + 64,
 		METHOD_GPIO_24XX },
-	{ OMAP44XX_GPIO4_BASE, INT_44XX_GPIO_BANK4, IH_GPIO_BASE + 96,	\
+	{ OMAP44XX_GPIO4_BASE, 0, INT_44XX_GPIO_BANK4, IH_GPIO_BASE + 96,
 		METHOD_GPIO_24XX },
-	{ OMAP44XX_GPIO5_BASE, INT_44XX_GPIO_BANK5, IH_GPIO_BASE + 128, \
+	{ OMAP44XX_GPIO5_BASE, 0, INT_44XX_GPIO_BANK5, IH_GPIO_BASE + 128,
 		METHOD_GPIO_24XX },
-	{ OMAP44XX_GPIO6_BASE, INT_44XX_GPIO_BANK6, IH_GPIO_BASE + 160, \
+	{ OMAP44XX_GPIO6_BASE, 0, INT_44XX_GPIO_BANK6, IH_GPIO_BASE + 160,
 		METHOD_GPIO_24XX },
 };

@@ -1511,6 +1541,23 @@ static struct clk * gpio5_fck;
 static struct clk *gpio_iclks[OMAP34XX_NR_GPIOS];
 #endif
 
+static void __init omap_gpio_show_rev(void)
+{
+	u32 rev;
+
+	if (cpu_is_omap16xx())
+		rev = __raw_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION);
+	else if (cpu_is_omap24xx() || cpu_is_omap34xx())
+		rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
+	else if (cpu_is_omap44xx())
+		rev = __raw_readl(gpio_bank[0].base + OMAP4_GPIO_REVISION);
+	else
+		return;
+
+	printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n",
+		(rev >> 4) & 0x0f, rev & 0x0f);
+}
+
 /* This lock class tells lockdep that GPIO irqs are in a different
  * category than their parents, so it won't report false recursion.
  */

@@ -1521,6 +1568,7 @@ static int __init _omap_gpio_init(void)
 	int i;
 	int gpio = 0;
 	struct gpio_bank *bank;
+	int bank_size = SZ_8K;	/* Module 4KB + L4 4KB except on omap1 */
 	char clk_name[11];
 
 	initialized = 1;

@@ -1583,69 +1631,45 @@ static int __init _omap_gpio_init(void)
 
 #ifdef CONFIG_ARCH_OMAP15XX
 	if (cpu_is_omap15xx()) {
-		printk(KERN_INFO "OMAP1510 GPIO hardware\n");
 		gpio_bank_count = 2;
 		gpio_bank = gpio_bank_1510;
+		bank_size = SZ_2K;
 	}
 #endif
 #if defined(CONFIG_ARCH_OMAP16XX)
 	if (cpu_is_omap16xx()) {
-		u32 rev;
-
 		gpio_bank_count = 5;
 		gpio_bank = gpio_bank_1610;
-		rev = __raw_readw(gpio_bank[1].base + OMAP1610_GPIO_REVISION);
-		printk(KERN_INFO "OMAP GPIO hardware version %d.%d\n",
-		       (rev >> 4) & 0x0f, rev & 0x0f);
+		bank_size = SZ_2K;
 	}
 #endif
 #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
 	if (cpu_is_omap7xx()) {
-		printk(KERN_INFO "OMAP7XX GPIO hardware\n");
 		gpio_bank_count = 7;
 		gpio_bank = gpio_bank_7xx;
+		bank_size = SZ_2K;
 	}
 #endif
 #ifdef CONFIG_ARCH_OMAP24XX
 	if (cpu_is_omap242x()) {
-		int rev;
-
 		gpio_bank_count = 4;
 		gpio_bank = gpio_bank_242x;
-		rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
-		printk(KERN_INFO "OMAP242x GPIO hardware version %d.%d\n",
-			(rev >> 4) & 0x0f, rev & 0x0f);
 	}
 	if (cpu_is_omap243x()) {
-		int rev;
-
 		gpio_bank_count = 5;
 		gpio_bank = gpio_bank_243x;
-		rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
-		printk(KERN_INFO "OMAP243x GPIO hardware version %d.%d\n",
-			(rev >> 4) & 0x0f, rev & 0x0f);
 	}
 #endif
 #ifdef CONFIG_ARCH_OMAP34XX
 	if (cpu_is_omap34xx()) {
-		int rev;
-
 		gpio_bank_count = OMAP34XX_NR_GPIOS;
 		gpio_bank = gpio_bank_34xx;
-		rev = __raw_readl(gpio_bank[0].base + OMAP24XX_GPIO_REVISION);
-		printk(KERN_INFO "OMAP34xx GPIO hardware version %d.%d\n",
-			(rev >> 4) & 0x0f, rev & 0x0f);
 	}
 #endif
 #ifdef CONFIG_ARCH_OMAP4
 	if (cpu_is_omap44xx()) {
-		int rev;
-
 		gpio_bank_count = OMAP34XX_NR_GPIOS;
 		gpio_bank = gpio_bank_44xx;
-		rev = __raw_readl(gpio_bank[0].base + OMAP4_GPIO_REVISION);
-		printk(KERN_INFO "OMAP44xx GPIO hardware version %d.%d\n",
-			(rev >> 4) & 0x0f, rev & 0x0f);
 	}
 #endif
 	for (i = 0; i < gpio_bank_count; i++) {

@@ -1653,6 +1677,14 @@ static int __init _omap_gpio_init(void)
 
 		bank = &gpio_bank[i];
 		spin_lock_init(&bank->lock);
+
+		/* Static mapping, never released */
+		bank->base = ioremap(bank->pbase, bank_size);
+		if (!bank->base) {
+			printk(KERN_ERR "Could not ioremap gpio bank%i\n", i);
+			continue;
+		}
+
 		if (bank_is_mpuio(bank))
 			__raw_writew(0xffff, bank->base + OMAP_MPUIO_GPIO_MASKIT);
 		if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) {

@@ -1758,6 +1790,8 @@ static int __init _omap_gpio_init(void)
 	if (cpu_is_omap34xx())
 		omap_writel(1 << 0, 0x48306814);
 
+	omap_gpio_show_rev();
+
 	return 0;
 }

Russell King - ARM Linux

2009-10-17 08:10 UTC #6 lore raw

PATCH 5/14 omap: Use ioremap in gpio.c

Review

Quoted 1 line · Tony Lindgren

(quoted diff) +1 -0

+	{ OMAP1_MPUIO_VBASE, 0, INT_MPUIO, IH_MPUIO_BASE,

That 0 should be NULL - it's a pointer.

Tony Lindgren

author maintainer

2009-10-17 16:13 UTC #7 lore raw

PATCH 5/14 omap: Use ioremap in gpio.c

Quoted 4 lines · Russell King - ARM Linux

Review
Quoted 1 line · Tony Lindgren
(quoted diff) +1 -0
+	{ OMAP1_MPUIO_VBASE, 0, INT_MPUIO, IH_MPUIO_BASE,
That 0 should be NULL - it's a pointer.

Right, thanks, will update.

Tony

Tony Lindgren

author maintainer

2009-10-19 00:19 UTC #8 lore raw

PATCH 5/14 omap: Use ioremap in gpio.c

Quoted 7 lines · Tony Lindgren

Quoted 4 lines · Russell King - ARM Linux
Review
Quoted 1 line · Tony Lindgren
(quoted diff) +1 -0
+	{ OMAP1_MPUIO_VBASE, 0, INT_MPUIO, IH_MPUIO_BASE,
That 0 should be NULL - it's a pointer.
Right, thanks, will update.

Here's this one updated.

Tony

Tony Lindgren

author maintainer

2009-10-16 23:41 UTC #9 lore raw

PATCH 6/14 omap: Use ioremap in omap_hwmod.c

In reply to Tony Lindgren

Use ioremap in omap_hwmod.c

Acked-by Paul Walmsley <[email protected]>

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/mach-omap2/omap_hwmod.c |   18 ++++++++++++------
 1 files changed, 12 insertions(+), 6 deletions(-)

arch/arm/mach-omap2/omap_hwmod.c +12 -6

index d2e0f1c..8ac8798 100644
@@ -496,6 +496,7 @@ static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
 	struct omap_hwmod_addr_space *mem;
 	int i;
 	int found = 0;
+	void __iomem *va_start;
 
 	if (!oh || oh->slaves_cnt == 0)
 		return NULL;

@@ -509,16 +510,20 @@ static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
 		}
 	}
 
-	/* XXX use ioremap() instead? */
-
-	if (found)
+	if (found) {
+		va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
+		if (!va_start) {
+			pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
+			return NULL;
+		}
 		pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
-			 oh->name, OMAP2_IO_ADDRESS(mem->pa_start));
-	else
+			 oh->name, va_start);
+	} else {
 		pr_debug("omap_hwmod: %s: no MPU register target found\n",
 			 oh->name);
+	}
 
-	return (found) ? OMAP2_IO_ADDRESS(mem->pa_start) : NULL;
+	return (found) ? va_start : NULL;
 }
 
 /**

@@ -1148,6 +1153,7 @@ int omap_hwmod_unregister(struct omap_hwmod *oh)
 	pr_debug("omap_hwmod: %s: unregistering\n", oh->name);
 
 	mutex_lock(&omap_hwmod_mutex);
+	iounmap(oh->_rt_va);
 	list_del(&oh->node);
 	mutex_unlock(&omap_hwmod_mutex);

Tony Lindgren

author maintainer

2009-10-16 23:41 UTC #10 lore raw

PATCH 7/14 omap: Use getnstimeofday for omap_device

In reply to Tony Lindgren

Use getnstimeofday for omap_device

Acked-by Paul Walmsley <[email protected]>

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/plat-omap/omap_device.c |   50 ++++++++++++++------------------------
 1 files changed, 19 insertions(+), 31 deletions(-)

arch/arm/plat-omap/omap_device.c +19 ~~-31~~

index 2c409fc..12513f4 100644
@@ -103,21 +103,6 @@
 /* Private functions */
 
 /**
- * _read_32ksynct - read the OMAP 32K sync timer
- *
- * Returns the current value of the 32KiHz synchronization counter.
- * XXX this should be generalized to simply read the system clocksource.
- * XXX this should be moved to a separate synctimer32k.c file
- */
-static u32 _read_32ksynct(void)
-{
-	if (!cpu_class_is_omap2())
-		BUG();
-
-	return __raw_readl(OMAP2_IO_ADDRESS(OMAP_32KSYNCT_BASE + 0x010));
-}
-
-/**
  * _omap_device_activate - increase device readiness
  * @od: struct omap_device *
  * @ignore_lat: increase to latency target (0) or full readiness (1)?

@@ -133,13 +118,13 @@ static u32 _read_32ksynct(void)
  */
 static int _omap_device_activate(struct omap_device *od, u8 ignore_lat)
 {
-	u32 a, b;
+	struct timespec a, b, c;
 
 	pr_debug("omap_device: %s: activating\n", od->pdev.name);
 
 	while (od->pm_lat_level > 0) {
 		struct omap_device_pm_latency *odpl;
-		int act_lat = 0;
+		unsigned long long act_lat = 0;
 
 		od->pm_lat_level--;

@@ -149,20 +134,22 @@ static int _omap_device_activate(struct omap_device *od, u8 ignore_lat)
 		    (od->dev_wakeup_lat <= od->_dev_wakeup_lat_limit))
 			break;
 
-		a = _read_32ksynct();
+		getnstimeofday(&a);
 
 		/* XXX check return code */
 		odpl->activate_func(od);
 
-		b = _read_32ksynct();
+		getnstimeofday(&b);
 
-		act_lat = (b - a) >> 15; /* 32KiHz cycles to microseconds */
+		c = timespec_sub(b, a);
+		act_lat = timespec_to_ns(&c) * NSEC_PER_USEC;
 
 		pr_debug("omap_device: %s: pm_lat %d: activate: elapsed time "
-			 "%d usec\n", od->pdev.name, od->pm_lat_level, act_lat);
+			 "%llu usec\n", od->pdev.name, od->pm_lat_level,
+			 act_lat);
 
 		WARN(act_lat > odpl->activate_lat, "omap_device: %s.%d: "
-		     "activate step %d took longer than expected (%d > %d)\n",
+		     "activate step %d took longer than expected (%llu > %d)\n",
 		     od->pdev.name, od->pdev.id, od->pm_lat_level,
 		     act_lat, odpl->activate_lat);

@@ -188,13 +175,13 @@ static int _omap_device_activate(struct omap_device *od, u8 ignore_lat)
  */
 static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat)
 {
-	u32 a, b;
+	struct timespec a, b, c;
 
 	pr_debug("omap_device: %s: deactivating\n", od->pdev.name);
 
 	while (od->pm_lat_level < od->pm_lats_cnt) {
 		struct omap_device_pm_latency *odpl;
-		int deact_lat = 0;
+		unsigned long long deact_lat = 0;
 
 		odpl = od->pm_lats + od->pm_lat_level;

@@ -203,23 +190,24 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat)
 		     od->_dev_wakeup_lat_limit))
 			break;
 
-		a = _read_32ksynct();
+		getnstimeofday(&a);
 
 		/* XXX check return code */
 		odpl->deactivate_func(od);
 
-		b = _read_32ksynct();
+		getnstimeofday(&b);
 
-		deact_lat = (b - a) >> 15; /* 32KiHz cycles to microseconds */
+		c = timespec_sub(b, a);
+		deact_lat = timespec_to_ns(&c) * NSEC_PER_USEC;
 
 		pr_debug("omap_device: %s: pm_lat %d: deactivate: elapsed time "
-			 "%d usec\n", od->pdev.name, od->pm_lat_level,
+			 "%llu usec\n", od->pdev.name, od->pm_lat_level,
 			 deact_lat);
 
 		WARN(deact_lat > odpl->deactivate_lat, "omap_device: %s.%d: "
-		     "deactivate step %d took longer than expected (%d > %d)\n",
-		     od->pdev.name, od->pdev.id, od->pm_lat_level,
-		     deact_lat, odpl->deactivate_lat);
+		     "deactivate step %d took longer than expected "
+		     "(%llu > %d)\n", od->pdev.name, od->pdev.id,
+		     od->pm_lat_level, deact_lat, odpl->deactivate_lat);
 
 		od->dev_wakeup_lat += odpl->activate_lat;

Tony Lindgren

author maintainer

2009-10-16 23:41 UTC #11 lore raw

PATCH 8/14 omap: Use ioremap for omap4 L4 code

In reply to Tony Lindgren

Use ioremap for omap4 L4 code

Cc Santosh Shilimkar <[email protected]>

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/mach-omap2/board-4430sdp.c           |   13 ++++++++++--
 arch/arm/mach-omap2/omap-smp.c                |   28 ++++++++++++++++++++-----
 arch/arm/mach-omap2/timer-gp.c                |    3 ++-
 arch/arm/plat-omap/include/mach/entry-macro.S |    2 ++
 arch/arm/plat-omap/include/mach/omap44xx.h    |    5 ----
 5 files changed, 37 insertions(+), 14 deletions(-)

arch/arm/mach-omap2/board-4430sdp.c +11 -2

index eb37c40..2a7b901 100644
@@ -52,8 +52,17 @@ static struct omap_board_config_kernel sdp4430_config[] __initdata = {
 
 static void __init gic_init_irq(void)
 {
-	gic_dist_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29);
-	gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
+	void __iomem *base;
+
+	/* Static mapping, never released */
+	base = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
+	BUG_ON(!base);
+	gic_dist_init(0, base, 29);
+
+	/* Static mapping, never released */
+	base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_256);
+	BUG_ON(!base);
+	gic_cpu_init(0, OMAP44XX_GIC_CPU_BASE);
 }
 
 static void __init omap_4430sdp_init_irq(void)

arch/arm/mach-omap2/omap-smp.c +22 -6

index 48ee295..a1b618c 100644
@@ -26,11 +26,11 @@
 #include <mach/hardware.h>
 
 /* Registers used for communicating startup information */
-#define OMAP4_AUXCOREBOOT_REG0		(OMAP44XX_VA_WKUPGEN_BASE + 0x800)
-#define OMAP4_AUXCOREBOOT_REG1		(OMAP44XX_VA_WKUPGEN_BASE + 0x804)
+static void __iomem *omap4_auxcoreboot_reg0;
+static void __iomem *omap4_auxcoreboot_reg1;
 
 /* SCU base address */
-static void __iomem *scu_base = OMAP44XX_VA_SCU_BASE;
+static void __iomem *scu_base;
 
 /*
  * Use SCU config register to count number of cores

@@ -46,6 +46,8 @@ static DEFINE_SPINLOCK(boot_lock);
 
 void __cpuinit platform_secondary_init(unsigned int cpu)
 {
+	void __iomem *gic_cpu_base;
+
 	trace_hardirqs_off();
 
 	/*

@@ -54,7 +56,10 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
 	 * for us: do so
 	 */
 
-	gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
+	/* Static mapping, never released */
+	gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_256);
+	BUG_ON(!gic_cpu_base);
+	gic_cpu_init(0, gic_cpu_base);
 
 	/*
 	 * Synchronise with the boot thread.

@@ -79,7 +84,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
 	 * the AuxCoreBoot1 register is updated with cpu state
 	 * A barrier is added to ensure that write buffer is drained
 	 */
-	__raw_writel(cpu, OMAP4_AUXCOREBOOT_REG1);
+	__raw_writel(cpu, omap4_auxcoreboot_reg1);
 	smp_wmb();
 
 	timeout = jiffies + (1 * HZ);

@@ -104,7 +109,7 @@ static void __init wakeup_secondary(void)
 	 * A barrier is added to ensure that write buffer is drained
 	 */
 	__raw_writel(virt_to_phys(omap_secondary_startup),	   \
-					OMAP4_AUXCOREBOOT_REG0);
+					omap4_auxcoreboot_reg0);
 	smp_wmb();
 
 	/*

@@ -130,6 +135,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
 {
 	unsigned int ncores = get_core_count();
 	unsigned int cpu = smp_processor_id();
+	void __iomem *omap4_wkupgen_base;
 	int i;
 
 	/* sanity check */

@@ -161,6 +167,16 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
 	for (i = 0; i < max_cpus; i++)
 		set_cpu_present(i, true);
 
+	/* Never released */
+	omap4_wkupgen_base = ioremap(OMAP44XX_WKUPGEN_BASE, SZ_4K);
+	BUG_ON(!omap4_wkupgen_base);
+	omap4_auxcoreboot_reg0 = omap4_wkupgen_base + 0x800;
+	omap4_auxcoreboot_reg0 = omap4_wkupgen_base + 0x804;
+
+	/* Never released */
+	scu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_256);
+	BUG_ON(!scu_base);
+
 	if (max_cpus > 1) {
 		/*
 		 * Enable the local timer or broadcast device for the

arch/arm/mach-omap2/timer-gp.c +2 -1

index e2338c0..cd72970 100644
@@ -231,7 +231,8 @@ static void __init omap2_gp_clocksource_init(void)
 static void __init omap2_gp_timer_init(void)
 {
 #ifdef CONFIG_LOCAL_TIMERS
-	twd_base = OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE);
+	twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);
+	BUG_ON(!twd_base);
 #endif
 	omap_dm_timer_init();

arch/arm/plat-omap/include/mach/entry-macro.S +2 -0

index abe0864..3bad928 100644
@@ -104,6 +104,8 @@
 
 		.endm
 #else
+#define OMAP44XX_VA_GIC_CPU_BASE	OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
+
 		/*
 		 * The interrupt numbering scheme is defined in the
 		 * interrupt controller spec.  To wit:

arch/arm/plat-omap/include/mach/omap44xx.h +0 -5

index b3ba5ac..8b4a578 100644
@@ -33,14 +33,9 @@
 #define IRQ_SIR_IRQ			0x0040
 #define OMAP44XX_GIC_DIST_BASE		0x48241000
 #define OMAP44XX_GIC_CPU_BASE		0x48240100
-#define OMAP44XX_VA_GIC_CPU_BASE	OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
 #define OMAP44XX_SCU_BASE		0x48240000
-#define OMAP44XX_VA_SCU_BASE		OMAP2_IO_ADDRESS(OMAP44XX_SCU_BASE)
 #define OMAP44XX_LOCAL_TWD_BASE		0x48240600
-#define OMAP44XX_VA_LOCAL_TWD_BASE	OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE)
-#define OMAP44XX_LOCAL_TWD_SIZE		0x00000100
 #define OMAP44XX_WKUPGEN_BASE		0x48281000
-#define OMAP44XX_VA_WKUPGEN_BASE	OMAP2_IO_ADDRESS(OMAP44XX_WKUPGEN_BASE)
 
 #endif /* __ASM_ARCH_OMAP44XX_H */

Tony Lindgren

author maintainer

2009-10-16 23:46 UTC #12 lore raw

PATCH 8/14 omap: Use ioremap for omap4 L4 code

Quoted 1 line · Tony Lindgren

Use ioremap for omap4 L4 code

Santosh, can you please check and ack this patch?

Especially some of the ioremap sizes may be wrong. Also, this one I cannot boot test, so it's just compile tested.

Regards,

Tony

Quoted 168 lines

Cc Santosh Shilimkar <[email protected]>

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/mach-omap2/board-4430sdp.c           |   13 ++++++++++--
 arch/arm/mach-omap2/omap-smp.c                |   28 ++++++++++++++++++++-----
 arch/arm/mach-omap2/timer-gp.c                |    3 ++-
 arch/arm/plat-omap/include/mach/entry-macro.S |    2 ++
 arch/arm/plat-omap/include/mach/omap44xx.h    |    5 ----
 5 files changed, 37 insertions(+), 14 deletions(-)

arch/arm/mach-omap2/board-4430sdp.c +11 -2

index eb37c40..2a7b901 100644
@@ -52,8 +52,17 @@ static struct omap_board_config_kernel sdp4430_config[] __initdata = {
 
 static void __init gic_init_irq(void)
 {
-	gic_dist_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29);
-	gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
+	void __iomem *base;
+
+	/* Static mapping, never released */
+	base = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
+	BUG_ON(!base);
+	gic_dist_init(0, base, 29);
+
+	/* Static mapping, never released */
+	base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_256);
+	BUG_ON(!base);
+	gic_cpu_init(0, OMAP44XX_GIC_CPU_BASE);
 }
 
 static void __init omap_4430sdp_init_irq(void)

arch/arm/mach-omap2/omap-smp.c +22 -6

index 48ee295..a1b618c 100644
@@ -26,11 +26,11 @@
 #include <mach/hardware.h>
 
 /* Registers used for communicating startup information */
-#define OMAP4_AUXCOREBOOT_REG0		(OMAP44XX_VA_WKUPGEN_BASE + 0x800)
-#define OMAP4_AUXCOREBOOT_REG1		(OMAP44XX_VA_WKUPGEN_BASE + 0x804)
+static void __iomem *omap4_auxcoreboot_reg0;
+static void __iomem *omap4_auxcoreboot_reg1;
 
 /* SCU base address */
-static void __iomem *scu_base = OMAP44XX_VA_SCU_BASE;
+static void __iomem *scu_base;
 
 /*
  * Use SCU config register to count number of cores

@@ -46,6 +46,8 @@ static DEFINE_SPINLOCK(boot_lock);
 
 void __cpuinit platform_secondary_init(unsigned int cpu)
 {
+	void __iomem *gic_cpu_base;
+
 	trace_hardirqs_off();
 
 	/*

@@ -54,7 +56,10 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
 	 * for us: do so
 	 */
 
-	gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
+	/* Static mapping, never released */
+	gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_256);
+	BUG_ON(!gic_cpu_base);
+	gic_cpu_init(0, gic_cpu_base);
 
 	/*
 	 * Synchronise with the boot thread.

@@ -79,7 +84,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
 	 * the AuxCoreBoot1 register is updated with cpu state
 	 * A barrier is added to ensure that write buffer is drained
 	 */
-	__raw_writel(cpu, OMAP4_AUXCOREBOOT_REG1);
+	__raw_writel(cpu, omap4_auxcoreboot_reg1);
 	smp_wmb();
 
 	timeout = jiffies + (1 * HZ);

@@ -104,7 +109,7 @@ static void __init wakeup_secondary(void)
 	 * A barrier is added to ensure that write buffer is drained
 	 */
 	__raw_writel(virt_to_phys(omap_secondary_startup),	   \
-					OMAP4_AUXCOREBOOT_REG0);
+					omap4_auxcoreboot_reg0);
 	smp_wmb();
 
 	/*

@@ -130,6 +135,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
 {
 	unsigned int ncores = get_core_count();
 	unsigned int cpu = smp_processor_id();
+	void __iomem *omap4_wkupgen_base;
 	int i;
 
 	/* sanity check */

@@ -161,6 +167,16 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
 	for (i = 0; i < max_cpus; i++)
 		set_cpu_present(i, true);
 
+	/* Never released */
+	omap4_wkupgen_base = ioremap(OMAP44XX_WKUPGEN_BASE, SZ_4K);
+	BUG_ON(!omap4_wkupgen_base);
+	omap4_auxcoreboot_reg0 = omap4_wkupgen_base + 0x800;
+	omap4_auxcoreboot_reg0 = omap4_wkupgen_base + 0x804;
+
+	/* Never released */
+	scu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_256);
+	BUG_ON(!scu_base);
+
 	if (max_cpus > 1) {
 		/*
 		 * Enable the local timer or broadcast device for the

arch/arm/mach-omap2/timer-gp.c +2 -1

index e2338c0..cd72970 100644
@@ -231,7 +231,8 @@ static void __init omap2_gp_clocksource_init(void)
 static void __init omap2_gp_timer_init(void)
 {
 #ifdef CONFIG_LOCAL_TIMERS
-	twd_base = OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE);
+	twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);
+	BUG_ON(!twd_base);
 #endif
 	omap_dm_timer_init();

arch/arm/plat-omap/include/mach/entry-macro.S +2 -0

index abe0864..3bad928 100644
@@ -104,6 +104,8 @@
 
 		.endm
 #else
+#define OMAP44XX_VA_GIC_CPU_BASE	OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
+
 		/*
 		 * The interrupt numbering scheme is defined in the
 		 * interrupt controller spec.  To wit:

arch/arm/plat-omap/include/mach/omap44xx.h +0 -6

index b3ba5ac..8b4a578 100644
@@ -33,14 +33,9 @@
 #define IRQ_SIR_IRQ			0x0040
 #define OMAP44XX_GIC_DIST_BASE		0x48241000
 #define OMAP44XX_GIC_CPU_BASE		0x48240100
-#define OMAP44XX_VA_GIC_CPU_BASE	OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
 #define OMAP44XX_SCU_BASE		0x48240000
-#define OMAP44XX_VA_SCU_BASE		OMAP2_IO_ADDRESS(OMAP44XX_SCU_BASE)
 #define OMAP44XX_LOCAL_TWD_BASE		0x48240600
-#define OMAP44XX_VA_LOCAL_TWD_BASE	OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE)
-#define OMAP44XX_LOCAL_TWD_SIZE		0x00000100
 #define OMAP44XX_WKUPGEN_BASE		0x48281000
-#define OMAP44XX_VA_WKUPGEN_BASE	OMAP2_IO_ADDRESS(OMAP44XX_WKUPGEN_BASE)
 
 #endif /* __ASM_ARCH_OMAP44XX_H */
 
 
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Shilimkar, Santosh

2009-10-17 10:48 UTC #13 lore raw

PATCH 8/14 omap: Use ioremap for omap4 L4 code

Thanks Tony for this ioremap series!!

Quoted 7 lines

-----Original Message-----
From: Tony Lindgren [mailto:tony at atomide.com]
Sent: Saturday, October 17, 2009 5:16 AM
To: linux-arm-kernel at lists.infradead.org
Cc: linux-omap at vger.kernel.org; Shilimkar, Santosh
Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code

Quoted 7 lines

Quoted 1 line · Tony Lindgren
Use ioremap for omap4 L4 code
Santosh, can you please check and ack this patch?
Especially some of the ioremap sizes may be wrong. Also, this one I cannot boot test, so it's just compile tested.

I have checked the patch and it looks all right except few typo. Also the scu_base is needed bit earlier.

Quoted 20 lines

Quoted 6 lines
Cc Santosh Shilimkar <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
---
 arch/arm/mach-omap2/board-4430sdp.c           |   13 ++++++++++--
 arch/arm/mach-omap2/omap-smp.c                |   28
++++++++++++++++++++-----
arch/arm/mach-
Quoted 6 lines
 arch/arm/mach-omap2/timer-gp.c                |    3 ++-
 arch/arm/plat-omap/include/mach/entry-macro.S |    2 ++
 arch/arm/plat-omap/include/mach/omap44xx.h    |    5 ----
 5 files changed, 37 insertions(+), 14 deletions(-)
arch/arm/mach- renamed from arch/arm/mach-omap2/board-4430sdp.c +0 -0
omap2/board-4430sdp.c
arch/arm/mach-omap2/board-4430sdp.c static struct omap_board_config_kernel
Quoted 4 lines
index eb37c40..2a7b901 100644
arch/arm/mach-omap2/board-4430sdp.c +0 -0
@@ -52,8 +52,17 @@ static struct omap_board_config_kernel
sdp4430_config[] __initdata = {
Quoted 1 line

Quoted 13 lines

arch/arm/mach-omap2/board-4430sdp.c static struct omap_board_config_kernel sdp4430_config[] __initdata = { · line 63
Quoted 13 lines
static void __init gic_init_irq(void)
{
arch/arm/mach-omap2/board-4430sdp.c +9 -2
-	gic_dist_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29);
-	gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
+	void __iomem *base;
+
+	/* Static mapping, never released */
+	base = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
+	BUG_ON(!base);
+	gic_dist_init(0, base, 29);
+
+	/* Static mapping, never released */
+	base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_256);

Should be "SZ_512"

Quoted 2 lines

arch/arm/mach-omap2/board-4430sdp.c
Quoted 2 lines
arch/arm/mach-omap2/board-4430sdp.c +2 -0
+	BUG_ON(!base);
+	gic_cpu_init(0, OMAP44XX_GIC_CPU_BASE);

This should be gic_cpu_init(0, base);

Quoted 36 lines

arch/arm/mach-omap2/omap-
Quoted 4 lines
}
static void __init omap_4430sdp_init_irq(void)
arch/arm/mach-omap2/omap- renamed from arch/arm/mach-omap2/omap-smp.c +0 -0
smp.c
arch/arm/mach-omap2/omap-smp.c line 29
Quoted 8 lines
index 48ee295..a1b618c 100644
arch/arm/mach-omap2/omap-smp.c +0 -1
@@ -26,11 +26,11 @@
 #include <mach/hardware.h>
 
 /* Registers used for communicating startup information */
-#define OMAP4_AUXCOREBOOT_REG0		(OMAP44XX_VA_WKUPGEN_BASE +
0x800)
arch/arm/mach-omap2/omap-smp.c line 30
Quoted 1 line
arch/arm/mach-omap2/omap-smp.c +0 -1
-#define OMAP4_AUXCOREBOOT_REG1		(OMAP44XX_VA_WKUPGEN_BASE +
0x804)
arch/arm/mach-omap2/omap-smp.c void __cpuinit platform_secondary_init(unsigned int
Quoted 19 lines
arch/arm/mach-omap2/omap-smp.c +5 -1
+static void __iomem *omap4_auxcoreboot_reg0;
+static void __iomem *omap4_auxcoreboot_reg1;
 
 /* SCU base address */
-static void __iomem *scu_base = OMAP44XX_VA_SCU_BASE;
+static void __iomem *scu_base;
 
 /*
  * Use SCU config register to count number of cores
@@ -46,6 +46,8 @@ static DEFINE_SPINLOCK(boot_lock);
 
 void __cpuinit platform_secondary_init(unsigned int cpu)
 {
+	void __iomem *gic_cpu_base;
+
 	trace_hardirqs_off();
 
 	/*
@@ -54,7 +56,10 @@ void __cpuinit platform_secondary_init(unsigned int
cpu)

Quoted 6 lines

arch/arm/mach-omap2/omap-smp.c void __cpuinit platform_secondary_init(unsigned int cpu) · line 60
Quoted 6 lines
arch/arm/mach-omap2/omap-smp.c +2 -1
 	 * for us: do so
 	 */
 
-	gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
+	/* Static mapping, never released */
+	gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_256);

Although underneath static mapping will take care of not doing dual mapping, we can map this ones in gic_init_irq() and use the same variable here.

Quoted 23 lines

arch/arm/mach-omap2/omap-smp.c int __cpuinit boot_secondary(unsigned int cpu, struct

Quoted 6 lines

arch/arm/mach-omap2/omap-smp.c +2 -0

+	BUG_ON(!gic_cpu_base);
+	gic_cpu_init(0, gic_cpu_base);
 
 	/*
 	 * Synchronise with the boot thread.

@@ -79,7 +84,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct

task_struct *idle)

Quoted 16 lines

arch/arm/mach-omap2/omap-smp.c +2 -2

 	 * the AuxCoreBoot1 register is updated with cpu state
 	 * A barrier is added to ensure that write buffer is drained
 	 */
-	__raw_writel(cpu, OMAP4_AUXCOREBOOT_REG1);
+	__raw_writel(cpu, omap4_auxcoreboot_reg1);
 	smp_wmb();
 
 	timeout = jiffies + (1 * HZ);

@@ -104,7 +109,7 @@ static void __init wakeup_secondary(void)
 	 * A barrier is added to ensure that write buffer is drained
 	 */
 	__raw_writel(virt_to_phys(omap_secondary_startup),	   \
-					OMAP4_AUXCOREBOOT_REG0);
+					omap4_auxcoreboot_reg0);
 	smp_wmb();

Quoted 4 lines

arch/arm/mach-omap2/omap-smp.c void __init smp_prepare_cpus(unsigned int max_cpus) · line 136
Quoted 4 lines
arch/arm/mach-omap2/omap-smp.c +0 -0
 	/*
@@ -130,6 +135,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
 {
 	unsigned int ncores = get_core_count();

This call will not give correct count. Also there is one more call earlier and hence scu_base ioremaps needs to be done earlier.

Quoted 9 lines

arch/arm/mach-omap2/omap-smp.c +1 -0

 	unsigned int cpu = smp_processor_id();
+	void __iomem *omap4_wkupgen_base;
 	int i;
 
 	/* sanity check */

@@ -161,6 +167,16 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
 	for (i = 0; i < max_cpus; i++)
 		set_cpu_present(i, true);

Quoted 5 lines

arch/arm/mach-omap2/omap-smp.c void __init smp_prepare_cpus(unsigned int max_cpus) · line 174
Quoted 5 lines
arch/arm/mach-omap2/omap-smp.c +5 -0
+	/* Never released */
+	omap4_wkupgen_base = ioremap(OMAP44XX_WKUPGEN_BASE, SZ_4K);
+	BUG_ON(!omap4_wkupgen_base);
+	omap4_auxcoreboot_reg0 = omap4_wkupgen_base + 0x800;
+	omap4_auxcoreboot_reg0 = omap4_wkupgen_base + 0x804;

Should be "omap4_auxcoreboot_reg1 = omap4_wkupgen_base + 0x804;"

Quoted 51 lines

arch/arm/mach-omap2/timer-
Quoted 9 lines
arch/arm/mach-omap2/omap-smp.c +5 -0
+
+	/* Never released */
+	scu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_256);
+	BUG_ON(!scu_base);
+
 	if (max_cpus > 1) {
 		/*
 		 * Enable the local timer or broadcast device for the
arch/arm/mach-omap2/timer- renamed from arch/arm/mach-omap2/timer-gp.c +0 -0
gp.c
Review
Quoted 14 lines
index e2338c0..cd72970 100644
arch/arm/mach-omap2/timer-gp.c +2 -1
@@ -231,7 +231,8 @@ static void __init omap2_gp_clocksource_init(void)
 static void __init omap2_gp_timer_init(void)
 {
 #ifdef CONFIG_LOCAL_TIMERS
-	twd_base = OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE);
+	twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);
+	BUG_ON(!twd_base);
 #endif
 	omap_dm_timer_init();
 
(quoted diff) +0 -0
b/arch/arm/plat-omap/include/mach/entry-macro.S
arch/arm/plat-omap/include/mach/entry-macro.S line 107
Quoted 8 lines
index abe0864..3bad928 100644
arch/arm/plat-omap/include/mach/entry-macro.S +1 -0
@@ -104,6 +104,8 @@
 
 		.endm
 #else
+#define OMAP44XX_VA_GIC_CPU_BASE
	OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
arch/arm/plat-
Quoted 5 lines
arch/arm/plat-omap/include/mach/entry-macro.S +1 -0
+
 		/*
 		 * The interrupt numbering scheme is defined in the
 		 * interrupt controller spec.  To wit:
arch/arm/plat- renamed from arch/arm/plat-omap/include/mach/omap44xx.h +0 -0
omap/include/mach/omap44xx.h
arch/arm/plat-omap/include/mach/omap44xx.h line 36
Quoted 8 lines
index b3ba5ac..8b4a578 100644
arch/arm/plat-omap/include/mach/omap44xx.h +0 -1
@@ -33,14 +33,9 @@
 #define IRQ_SIR_IRQ			0x0040
 #define OMAP44XX_GIC_DIST_BASE		0x48241000
 #define OMAP44XX_GIC_CPU_BASE		0x48240100
-#define OMAP44XX_VA_GIC_CPU_BASE
	OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
arch/arm/plat-omap/include/mach/omap44xx.h line 38
Quoted 2 lines
arch/arm/plat-omap/include/mach/omap44xx.h +0 -1
 #define OMAP44XX_SCU_BASE		0x48240000
-#define OMAP44XX_VA_SCU_BASE

Quoted 10 lines

	OMAP2_IO_ADDRESS(OMAP44XX_SCU_BASE)
arch/arm/plat-omap/include/mach/omap44xx.h line 40
Quoted 2 lines
arch/arm/plat-omap/include/mach/omap44xx.h +0 -1
 #define OMAP44XX_LOCAL_TWD_BASE		0x48240600
-#define OMAP44XX_VA_LOCAL_TWD_BASE
OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE)
arch/arm/plat-omap/include/mach/omap44xx.h
Quoted 3 lines
arch/arm/plat-omap/include/mach/omap44xx.h +0 -2
-#define OMAP44XX_LOCAL_TWD_SIZE		0x00000100
 #define OMAP44XX_WKUPGEN_BASE		0x48281000
-#define OMAP44XX_VA_WKUPGEN_BASE
OMAP2_IO_ADDRESS(OMAP44XX_WKUPGEN_BASE)
Quoted 2 lines
arch/arm/plat-omap/include/mach/omap44xx.h +0 -0
 #endif /* __ASM_ARCH_OMAP44XX_H */

Here is the patch on top of ioremap series which should fix above mentioned things. With below patch + two serial related patches the kernel boots on OMAP4430.

Tony Lindgren

author maintainer

2009-10-17 16:19 UTC #14 lore raw

PATCH 8/14 omap: Use ioremap for omap4 L4 code

Quoted 10 lines · Shilimkar, Santosh

Thanks Tony for this ioremap series!!
Quoted 8 lines
-----Original Message-----
From: Tony Lindgren [mailto:tony at atomide.com]
Sent: Saturday, October 17, 2009 5:16 AM
To: linux-arm-kernel at lists.infradead.org
Cc: linux-omap at vger.kernel.org; Shilimkar, Santosh
Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code
* Tony Lindgren <[email protected]> [091016 16:42]:

Quoted 8 lines

Quoted 6 lines
Quoted 1 line
Use ioremap for omap4 L4 code
Santosh, can you please check and ack this patch?
Especially some of the ioremap sizes may be wrong. Also, this one I cannot boot test, so it's just compile tested.
I have checked the patch and it looks all right except few typo. Also the scu_base is needed bit earlier.

Quoted 20 lines

Quoted 20 lines
Quoted 6 lines
Cc Santosh Shilimkar <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
---
 arch/arm/mach-omap2/board-4430sdp.c           |   13 ++++++++++--
 arch/arm/mach-omap2/omap-smp.c                |   28
++++++++++++++++++++-----
arch/arm/mach-
Quoted 6 lines
 arch/arm/mach-omap2/timer-gp.c                |    3 ++-
 arch/arm/plat-omap/include/mach/entry-macro.S |    2 ++
 arch/arm/plat-omap/include/mach/omap44xx.h    |    5 ----
 5 files changed, 37 insertions(+), 14 deletions(-)
arch/arm/mach- renamed from arch/arm/mach-omap2/board-4430sdp.c +0 -0
omap2/board-4430sdp.c
arch/arm/mach-omap2/board-4430sdp.c static struct omap_board_config_kernel
Quoted 4 lines
index eb37c40..2a7b901 100644
arch/arm/mach-omap2/board-4430sdp.c +0 -0
@@ -52,8 +52,17 @@ static struct omap_board_config_kernel
sdp4430_config[] __initdata = {
Quoted 1 line

Quoted 14 lines

Quoted 5 lines
Quoted 5 lines
static void __init gic_init_irq(void)
{
arch/arm/mach-omap2/board-4430sdp.c +1 -2
-	gic_dist_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29);
-	gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
+	void __iomem *base;
Quoted 8 lines
arch/arm/mach-omap2/board-4430sdp.c static struct omap_board_config_kernel sdp4430_config[] __initdata = { · line 63
Quoted 8 lines
arch/arm/mach-omap2/board-4430sdp.c +8 -0
+
+	/* Static mapping, never released */
+	base = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
+	BUG_ON(!base);
+	gic_dist_init(0, base, 29);
+
+	/* Static mapping, never released */
+	base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_256);
Should be "SZ_512"

Quoted 3 lines

Quoted 2 lines
arch/arm/mach-omap2/board-4430sdp.c
Quoted 2 lines
arch/arm/mach-omap2/board-4430sdp.c +2 -0
+	BUG_ON(!base);
+	gic_cpu_init(0, OMAP44XX_GIC_CPU_BASE);
This should be gic_cpu_init(0, base);

Oops :)

Quoted 36 lines

Quoted 36 lines
arch/arm/mach-omap2/omap-
Quoted 4 lines
}
static void __init omap_4430sdp_init_irq(void)
arch/arm/mach-omap2/omap- renamed from arch/arm/mach-omap2/omap-smp.c +0 -0
smp.c
arch/arm/mach-omap2/omap-smp.c line 29
Quoted 8 lines
index 48ee295..a1b618c 100644
arch/arm/mach-omap2/omap-smp.c +0 -1
@@ -26,11 +26,11 @@
 #include <mach/hardware.h>
 
 /* Registers used for communicating startup information */
-#define OMAP4_AUXCOREBOOT_REG0		(OMAP44XX_VA_WKUPGEN_BASE +
0x800)
arch/arm/mach-omap2/omap-smp.c line 30
Quoted 1 line
arch/arm/mach-omap2/omap-smp.c +0 -1
-#define OMAP4_AUXCOREBOOT_REG1		(OMAP44XX_VA_WKUPGEN_BASE +
0x804)
arch/arm/mach-omap2/omap-smp.c void __cpuinit platform_secondary_init(unsigned int
Quoted 19 lines
arch/arm/mach-omap2/omap-smp.c +5 -1
+static void __iomem *omap4_auxcoreboot_reg0;
+static void __iomem *omap4_auxcoreboot_reg1;
 
 /* SCU base address */
-static void __iomem *scu_base = OMAP44XX_VA_SCU_BASE;
+static void __iomem *scu_base;
 
 /*
  * Use SCU config register to count number of cores
@@ -46,6 +46,8 @@ static DEFINE_SPINLOCK(boot_lock);
 
 void __cpuinit platform_secondary_init(unsigned int cpu)
 {
+	void __iomem *gic_cpu_base;
+
 	trace_hardirqs_off();
 
 	/*
@@ -54,7 +56,10 @@ void __cpuinit platform_secondary_init(unsigned int
cpu)

Quoted 7 lines

Quoted 6 lines
arch/arm/mach-omap2/omap-smp.c void __cpuinit platform_secondary_init(unsigned int cpu) · line 60
Quoted 6 lines
arch/arm/mach-omap2/omap-smp.c +2 -1
 	 * for us: do so
 	 */
 
-	gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
+	/* Static mapping, never released */
+	gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_256);
Although underneath static mapping will take care of not doing dual mapping, we can map this ones in gic_init_irq() and use the same variable here.

Yeah, good.

Quoted 23 lines

arch/arm/mach-omap2/omap-smp.c int __cpuinit boot_secondary(unsigned int cpu, struct

Quoted 6 lines

arch/arm/mach-omap2/omap-smp.c +2 -0

+	BUG_ON(!gic_cpu_base);
+	gic_cpu_init(0, gic_cpu_base);
 
 	/*
 	 * Synchronise with the boot thread.

@@ -79,7 +84,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct

task_struct *idle)

Quoted 16 lines

arch/arm/mach-omap2/omap-smp.c +2 -2

 	 * the AuxCoreBoot1 register is updated with cpu state
 	 * A barrier is added to ensure that write buffer is drained
 	 */
-	__raw_writel(cpu, OMAP4_AUXCOREBOOT_REG1);
+	__raw_writel(cpu, omap4_auxcoreboot_reg1);
 	smp_wmb();
 
 	timeout = jiffies + (1 * HZ);

@@ -104,7 +109,7 @@ static void __init wakeup_secondary(void)
 	 * A barrier is added to ensure that write buffer is drained
 	 */
 	__raw_writel(virt_to_phys(omap_secondary_startup),	   \
-					OMAP4_AUXCOREBOOT_REG0);
+					omap4_auxcoreboot_reg0);
 	smp_wmb();

Quoted 5 lines

Quoted 4 lines
arch/arm/mach-omap2/omap-smp.c void __init smp_prepare_cpus(unsigned int max_cpus) · line 136
Quoted 4 lines
arch/arm/mach-omap2/omap-smp.c +0 -0
 	/*
@@ -130,6 +135,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
 {
 	unsigned int ncores = get_core_count();
This call will not give correct count. Also there is one more call earlier and hence scu_base ioremaps needs to be done earlier.

Quoted 9 lines

arch/arm/mach-omap2/omap-smp.c +1 -0

 	unsigned int cpu = smp_processor_id();
+	void __iomem *omap4_wkupgen_base;
 	int i;
 
 	/* sanity check */

@@ -161,6 +167,16 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
 	for (i = 0; i < max_cpus; i++)
 		set_cpu_present(i, true);

Quoted 6 lines

Quoted 5 lines
arch/arm/mach-omap2/omap-smp.c void __init smp_prepare_cpus(unsigned int max_cpus) · line 174
Quoted 5 lines
arch/arm/mach-omap2/omap-smp.c +5 -0
+	/* Never released */
+	omap4_wkupgen_base = ioremap(OMAP44XX_WKUPGEN_BASE, SZ_4K);
+	BUG_ON(!omap4_wkupgen_base);
+	omap4_auxcoreboot_reg0 = omap4_wkupgen_base + 0x800;
+	omap4_auxcoreboot_reg0 = omap4_wkupgen_base + 0x804;
Should be "omap4_auxcoreboot_reg1 = omap4_wkupgen_base + 0x804;"

Oops!

Quoted 55 lines

Quoted 55 lines
arch/arm/mach-omap2/timer-
Quoted 9 lines
arch/arm/mach-omap2/omap-smp.c +5 -0
+
+	/* Never released */
+	scu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_256);
+	BUG_ON(!scu_base);
+
 	if (max_cpus > 1) {
 		/*
 		 * Enable the local timer or broadcast device for the
arch/arm/mach-omap2/timer- renamed from arch/arm/mach-omap2/timer-gp.c +0 -0
gp.c
Review
Quoted 14 lines
index e2338c0..cd72970 100644
arch/arm/mach-omap2/timer-gp.c +2 -1
@@ -231,7 +231,8 @@ static void __init omap2_gp_clocksource_init(void)
 static void __init omap2_gp_timer_init(void)
 {
 #ifdef CONFIG_LOCAL_TIMERS
-	twd_base = OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE);
+	twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256);
+	BUG_ON(!twd_base);
 #endif
 	omap_dm_timer_init();
 
(quoted diff) +0 -0
b/arch/arm/plat-omap/include/mach/entry-macro.S
arch/arm/plat-omap/include/mach/entry-macro.S line 107
Quoted 8 lines
index abe0864..3bad928 100644
arch/arm/plat-omap/include/mach/entry-macro.S +1 -0
@@ -104,6 +104,8 @@
 
 		.endm
 #else
+#define OMAP44XX_VA_GIC_CPU_BASE
	OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
arch/arm/plat-
Quoted 5 lines
arch/arm/plat-omap/include/mach/entry-macro.S +1 -0
+
 		/*
 		 * The interrupt numbering scheme is defined in the
 		 * interrupt controller spec.  To wit:
arch/arm/plat- renamed from arch/arm/plat-omap/include/mach/omap44xx.h +0 -0
omap/include/mach/omap44xx.h
arch/arm/plat-omap/include/mach/omap44xx.h line 36
Quoted 8 lines
index b3ba5ac..8b4a578 100644
arch/arm/plat-omap/include/mach/omap44xx.h +0 -1
@@ -33,14 +33,9 @@
 #define IRQ_SIR_IRQ			0x0040
 #define OMAP44XX_GIC_DIST_BASE		0x48241000
 #define OMAP44XX_GIC_CPU_BASE		0x48240100
-#define OMAP44XX_VA_GIC_CPU_BASE
	OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
arch/arm/plat-omap/include/mach/omap44xx.h line 38
Quoted 2 lines
arch/arm/plat-omap/include/mach/omap44xx.h +0 -1
 #define OMAP44XX_SCU_BASE		0x48240000
-#define OMAP44XX_VA_SCU_BASE
	OMAP2_IO_ADDRESS(OMAP44XX_SCU_BASE)
arch/arm/plat-omap/include/mach/omap44xx.h line 40
Quoted 2 lines
arch/arm/plat-omap/include/mach/omap44xx.h +0 -1
 #define OMAP44XX_LOCAL_TWD_BASE		0x48240600
-#define OMAP44XX_VA_LOCAL_TWD_BASE
OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE)

Quoted 8 lines

Quoted 6 lines
arch/arm/plat-omap/include/mach/omap44xx.h
Quoted 3 lines
arch/arm/plat-omap/include/mach/omap44xx.h +0 -2
-#define OMAP44XX_LOCAL_TWD_SIZE		0x00000100
 #define OMAP44XX_WKUPGEN_BASE		0x48281000
-#define OMAP44XX_VA_WKUPGEN_BASE
OMAP2_IO_ADDRESS(OMAP44XX_WKUPGEN_BASE)
Quoted 2 lines
arch/arm/plat-omap/include/mach/omap44xx.h +0 -0
 #endif /* __ASM_ARCH_OMAP44XX_H */
Here is the patch on top of ioremap series which should fix above mentioned things. With below patch + two serial related patches the kernel boots on OMAP4430.

Great, will update. Thanks for taking the time to fix it!

Regards,

Tony

Quoted 131 lines

From c7db626e320b73c02ce7578e81b8b8c65c41c955 Mon Sep 17 00:00:00 2001
From: Santosh Shilimkar <[email protected]>
Date: Sat, 17 Oct 2009 15:25:00 +0530
Subject: [PATCH] omap: ioremap fixes for omap4

This patch fixes the below ioremap for omap4 patch.

http://patchwork.kernel.org/patch/54457/

Signed-off-by Santosh Shilimkar <[email protected]>

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/mach-omap2/board-4430sdp.c      |    4 ++--
 arch/arm/mach-omap2/omap-smp.c           |   23 ++++++++++-------------
 arch/arm/plat-omap/common.c              |    3 +++
 arch/arm/plat-omap/include/mach/common.h |    3 +++
 4 files changed, 18 insertions(+), 15 deletions(-)

arch/arm/mach-omap2/board-4430sdp.c +2 -2

index 50a62f2..4b644a9 100644
@@ -60,9 +60,9 @@ static void __init gic_init_irq(void)
 	gic_dist_init(0, base, 29);
 
 	/* Static mapping, never released */
-	base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_256);
+	gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
 	BUG_ON(!base);
-	gic_cpu_init(0, OMAP44XX_GIC_CPU_BASE);
+	gic_cpu_init(0, gic_cpu_base_addr);
 }
 
 static void __init omap_4430sdp_init_irq(void)

arch/arm/mach-omap2/omap-smp.c +10 ~~-13~~

index a1b618c..8813ac2 100644
@@ -24,6 +24,7 @@
 #include <asm/localtimer.h>
 #include <asm/smp_scu.h>
 #include <mach/hardware.h>
+#include <mach/common.h>
 
 /* Registers used for communicating startup information */
 static void __iomem *omap4_auxcoreboot_reg0;

@@ -46,8 +47,6 @@ static DEFINE_SPINLOCK(boot_lock);
 
 void __cpuinit platform_secondary_init(unsigned int cpu)
 {
-	void __iomem *gic_cpu_base;
-
 	trace_hardirqs_off();
 
 	/*

@@ -55,11 +54,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
 	 * core (e.g. timer irq), then they will not have been enabled
 	 * for us: do so
 	 */
-
-	/* Static mapping, never released */
-	gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_256);
-	BUG_ON(!gic_cpu_base);
-	gic_cpu_init(0, gic_cpu_base);
+	gic_cpu_init(0, gic_cpu_base_addr);
 
 	/*
 	 * Synchronise with the boot thread.

@@ -125,7 +120,13 @@ static void __init wakeup_secondary(void)
  */
 void __init smp_init_cpus(void)
 {
-	unsigned int i, ncores = get_core_count();
+	unsigned int i, ncores;
+
+	/* Never released */
+	scu_base = ioremap(OMAP44XX_SCU_BASE, SZ_256);
+	BUG_ON(!scu_base);
+
+	ncores = get_core_count();
 
 	for (i = 0; i < ncores; i++)
 		set_cpu_possible(i, true);

@@ -171,11 +172,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
 	omap4_wkupgen_base = ioremap(OMAP44XX_WKUPGEN_BASE, SZ_4K);
 	BUG_ON(!omap4_wkupgen_base);
 	omap4_auxcoreboot_reg0 = omap4_wkupgen_base + 0x800;
-	omap4_auxcoreboot_reg0 = omap4_wkupgen_base + 0x804;
-
-	/* Never released */
-	scu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_256);
-	BUG_ON(!scu_base);
+	omap4_auxcoreboot_reg1 = omap4_wkupgen_base + 0x804;
 
 	if (max_cpus > 1) {
 		/*

arch/arm/plat-omap/common.c +3 -0

index 1aa58d2..8b3ef17 100644
@@ -49,6 +49,9 @@ int omap_bootloader_tag_len;
 struct omap_board_config_kernel *omap_board_config;
 int omap_board_config_size;
 
+/* used by omap-smp.c and board-4430sdp.c */
+void __iomem *gic_cpu_base_addr;
+
 static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
 {
 	struct omap_board_config_kernel *kinfo = NULL;

arch/arm/plat-omap/include/mach/common.h +3 -0

index fdeab42..064f173 100644
@@ -31,6 +31,9 @@
 
 struct sys_timer;
 
+/* used by omap-smp.c and board-4430sdp.c */
+extern void __iomem *gic_cpu_base_addr;
+
 extern void omap_map_common_io(void);
 extern struct sys_timer omap_timer;
 #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE)

Signature · 6 lines

1.5.4.7



Regards,
Santosh

Tony Lindgren

author maintainer

2009-10-19 00:24 UTC #15 lore raw

PATCH 8/14 omap: Use ioremap for omap4 L4 code

Quoted 19 lines · Tony Lindgren

Quoted 18 lines · Shilimkar, Santosh
Thanks Tony for this ioremap series!!
Quoted 7 lines
-----Original Message-----
From: Tony Lindgren [mailto:tony at atomide.com]
Sent: Saturday, October 17, 2009 5:16 AM
To: linux-arm-kernel at lists.infradead.org
Cc: linux-omap at vger.kernel.org; Shilimkar, Santosh
Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code
Quoted 7 lines
Quoted 1 line · Tony Lindgren
Use ioremap for omap4 L4 code
Santosh, can you please check and ack this patch?
Especially some of the ioremap sizes may be wrong. Also, this one I cannot boot test, so it's just compile tested.
I have checked the patch and it looks all right except few typo. Also the scu_base is needed bit earlier.

<snip>

Quoted 3 lines

Quoted 1 line
Here is the patch on top of ioremap series which should fix above mentioned things. With below patch + two serial related patches the kernel boots on OMAP4430.
Great, will update. Thanks for taking the time to fix it!

Here's this one updated with Santosh's fix merged in.

Tony

Shilimkar, Santosh

2009-10-19 07:27 UTC #16 lore raw

PATCH 8/14 omap: Use ioremap for omap4 L4 code

Tony,

Quoted 31 lines

-----Original Message-----
From: Tony Lindgren [mailto:tony at atomide.com]
Sent: Monday, October 19, 2009 5:54 AM
To: Shilimkar, Santosh
Cc: linux-arm-kernel at lists.infradead.org; linux-omap at vger.kernel.org
Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code
Quoted 11 lines · Tony Lindgren
Quoted 10 lines · Shilimkar, Santosh
Thanks Tony for this ioremap series!!
Quoted 8 lines
-----Original Message-----
From: Tony Lindgren [mailto:tony at atomide.com]
Sent: Saturday, October 17, 2009 5:16 AM
To: linux-arm-kernel at lists.infradead.org
Cc: linux-omap at vger.kernel.org; Shilimkar, Santosh
Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code
* Tony Lindgren <[email protected]> [091016 16:42]:
Quoted 8 lines
Quoted 8 lines
Quoted 6 lines
Quoted 1 line
Use ioremap for omap4 L4 code
Santosh, can you please check and ack this patch?
Especially some of the ioremap sizes may be wrong. Also, this one I cannot boot test, so it's just compile tested.
I have checked the patch and it looks all right except few typo. Also
the scu_base is needed bit earlier.
<snip>

Quoted 7 lines

Quoted 1 line
Quoted 1 line
Here is the patch on top of ioremap series which should fix above
mentioned things. With below patch + two serial related patches the kernel boots on OMAP4430.
Quoted 2 lines
Great, will update. Thanks for taking the time to fix it!
Here's this one updated with Santosh's fix merged in.

V2 has one typo which I think I also missed in my patch.

arch/arm/mach-omap2/board-4430sdp.c static struct omap_board_config_kernel sdp4430_config[] __initdata = { · line 59

Quoted 3 lines

arch/arm/mach-omap2/board-4430sdp.c +3 -0

+	/* Static mapping, never released */
+	gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
+	BUG_ON(!base);

Should be BUG_ON(!gic_cpu_base_addr);

Regards,
Santosh

Tony Lindgren

author maintainer

2009-10-19 17:12 UTC #17 lore raw

PATCH 8/14 omap: Use ioremap for omap4 L4 code

Quoted 36 lines · Shilimkar, Santosh

Tony,
Quoted 35 lines
-----Original Message-----
From: Tony Lindgren [mailto:tony at atomide.com]
Sent: Monday, October 19, 2009 5:54 AM
To: Shilimkar, Santosh
Cc: linux-arm-kernel at lists.infradead.org; linux-omap at vger.kernel.org
Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code
Quoted 11 lines · Tony Lindgren
Quoted 10 lines · Shilimkar, Santosh
Thanks Tony for this ioremap series!!
Quoted 8 lines
-----Original Message-----
From: Tony Lindgren [mailto:tony at atomide.com]
Sent: Saturday, October 17, 2009 5:16 AM
To: linux-arm-kernel at lists.infradead.org
Cc: linux-omap at vger.kernel.org; Shilimkar, Santosh
Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code
* Tony Lindgren <[email protected]> [091016 16:42]:
Quoted 8 lines
Quoted 8 lines
Quoted 6 lines
Quoted 1 line
Use ioremap for omap4 L4 code
Santosh, can you please check and ack this patch?
Especially some of the ioremap sizes may be wrong. Also, this one I cannot boot test, so it's just compile tested.
I have checked the patch and it looks all right except few typo. Also
the scu_base is needed bit earlier.
<snip>
Quoted 1 line
Quoted 1 line
Here is the patch on top of ioremap series which should fix above
mentioned things. With below patch + two serial related patches the kernel boots on OMAP4430.
Quoted 1 line

Quoted 8 lines

Quoted 3 lines
Quoted 1 line
Great, will update. Thanks for taking the time to fix it!
Here's this one updated with Santosh's fix merged in.
V2 has one typo which I think I also missed in my patch.
arch/arm/mach-omap2/board-4430sdp.c static struct omap_board_config_kernel sdp4430_config[] __initdata = { · line 59
Quoted 3 lines
arch/arm/mach-omap2/board-4430sdp.c +3 -0
+	/* Static mapping, never released */
+	gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
+	BUG_ON(!base);
Should be BUG_ON(!gic_cpu_base_addr);

OK, here's V3 of the patch.

Tony

Aguirre Rodriguez, Sergio Alberto

2009-10-19 17:21 UTC #18 lore raw

PATCH 8/14 omap: Use ioremap for omap4 L4 code

Tony,

Quoted 53 lines

-----Original Message-----
From: linux-omap-owner at vger.kernel.org [mailto:linux-omap-owner at vger.kernel.org] On Behalf Of Tony Lindgren
Sent: Monday, October 19, 2009 12:12 PM
To: Shilimkar, Santosh
Cc: linux-arm-kernel at lists.infradead.org; linux-omap at vger.kernel.org
Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code
Quoted 6 lines · Shilimkar, Santosh
Tony,
Quoted 5 lines
-----Original Message-----
From: Tony Lindgren [mailto:tony at atomide.com]
Sent: Monday, October 19, 2009 5:54 AM
To: Shilimkar, Santosh
Cc: linux-arm-kernel at lists.infradead.org;
linux-omap at vger.kernel.org
Quoted 4 lines
Quoted 4 lines
Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code
Quoted 1 line · Tony Lindgren
* Shilimkar, Santosh <[email protected]> [091017 03:49]:
Quoted 8 lines
Quoted 8 lines
Quoted 8 lines
Quoted 8 lines
Thanks Tony for this ioremap series!!
Quoted 6 lines
-----Original Message-----
From: Tony Lindgren [mailto:tony at atomide.com]
Sent: Saturday, October 17, 2009 5:16 AM
To: linux-arm-kernel at lists.infradead.org
Cc: linux-omap at vger.kernel.org; Shilimkar, Santosh
Subject: Re: [PATCH 08/14] omap: Use ioremap for
omap4 L4 code
Quoted 7 lines
Quoted 7 lines
Quoted 7 lines
Quoted 7 lines
Quoted 7 lines · Tony Lindgren
Quoted 1 line
Use ioremap for omap4 L4 code
Santosh, can you please check and ack this patch?
Especially some of the ioremap sizes may be wrong.
Also, this one
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 1 line
I cannot boot test, so it's just compile tested.
I have checked the patch and it looks all right
except few typo. Also
Quoted 5 lines
Quoted 5 lines
the scu_base is needed bit earlier.
<snip>
Quoted 1 line
Quoted 1 line
Here is the patch on top of ioremap series which
should fix above
Quoted 1 line
Quoted 1 line
mentioned things. With below patch + two serial related
patches the kernel
Quoted 4 lines
Quoted 4 lines
boots on OMAP4430.
Quoted 2 lines
Great, will update. Thanks for taking the time to fix it!

Quoted 8 lines

Quoted 6 lines
Quoted 1 line
Here's this one updated with Santosh's fix merged in.
V2 has one typo which I think I also missed in my patch.
Review
Quoted 3 lines
(quoted diff) +3 -0
+	/* Static mapping, never released */
+	gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
+	BUG_ON(!base);
Should be BUG_ON(!gic_cpu_base_addr);
OK, here's V3 of the patch.

Tony,

arch/arm/plat-omap/include/mach/entry-macro.S line 108

Quoted 10 lines

arch/arm/plat-omap/include/mach/entry-macro.S +2 -0

index abe0864..3bad928 100644
@@ -104,6 +104,8 @@
 
 		.endm
 #else
+#define OMAP44XX_VA_GIC_CPU_BASE	OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
+

Shouldn't this define go with the ioremap aproach?

arch/arm/plat-omap/include/mach/entry-macro.S line 111

Quoted 3 lines

arch/arm/plat-omap/include/mach/entry-macro.S +0 -0

 		/*
 		 * The interrupt numbering scheme is defined in the
 		 * interrupt controller spec.  To wit:

Regards,
Sergio

Quoted 3 lines

Tony

Tony Lindgren

author maintainer

2009-10-19 17:38 UTC #19 lore raw

PATCH 8/14 omap: Use ioremap for omap4 L4 code

Quoted 72 lines · Aguirre Rodriguez, Sergio Alberto

Tony,
Quoted 53 lines
-----Original Message-----
From: linux-omap-owner at vger.kernel.org [mailto:linux-omap-owner at vger.kernel.org] On Behalf Of Tony Lindgren
Sent: Monday, October 19, 2009 12:12 PM
To: Shilimkar, Santosh
Cc: linux-arm-kernel at lists.infradead.org; linux-omap at vger.kernel.org
Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code
Quoted 6 lines · Shilimkar, Santosh
Tony,
Quoted 5 lines
-----Original Message-----
From: Tony Lindgren [mailto:tony at atomide.com]
Sent: Monday, October 19, 2009 5:54 AM
To: Shilimkar, Santosh
Cc: linux-arm-kernel at lists.infradead.org;
linux-omap at vger.kernel.org
Quoted 4 lines
Quoted 4 lines
Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code
Quoted 1 line · Tony Lindgren
* Shilimkar, Santosh <[email protected]> [091017 03:49]:
Quoted 8 lines
Quoted 8 lines
Quoted 8 lines
Quoted 8 lines
Thanks Tony for this ioremap series!!
Quoted 6 lines
-----Original Message-----
From: Tony Lindgren [mailto:tony at atomide.com]
Sent: Saturday, October 17, 2009 5:16 AM
To: linux-arm-kernel at lists.infradead.org
Cc: linux-omap at vger.kernel.org; Shilimkar, Santosh
Subject: Re: [PATCH 08/14] omap: Use ioremap for
omap4 L4 code
Quoted 7 lines
Quoted 7 lines
Quoted 7 lines
Quoted 7 lines
Quoted 7 lines · Tony Lindgren
Quoted 1 line
Use ioremap for omap4 L4 code
Santosh, can you please check and ack this patch?
Especially some of the ioremap sizes may be wrong.
Also, this one
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 1 line
I cannot boot test, so it's just compile tested.
I have checked the patch and it looks all right
except few typo. Also
Quoted 5 lines
Quoted 5 lines
the scu_base is needed bit earlier.
<snip>
Quoted 1 line
Quoted 1 line
Here is the patch on top of ioremap series which
should fix above
Quoted 1 line
Quoted 1 line
mentioned things. With below patch + two serial related
patches the kernel
Quoted 4 lines
Quoted 4 lines
boots on OMAP4430.
Quoted 2 lines
Great, will update. Thanks for taking the time to fix it!
Quoted 8 lines
Quoted 6 lines
Quoted 1 line
Here's this one updated with Santosh's fix merged in.
V2 has one typo which I think I also missed in my patch.
Review
Quoted 3 lines
(quoted diff) +3 -0
+	/* Static mapping, never released */
+	gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
+	BUG_ON(!base);
Should be BUG_ON(!gic_cpu_base_addr);
OK, here's V3 of the patch.
Tony,
Quoted 6 lines
arch/arm/plat-omap/include/mach/entry-macro.S +0 -0
index abe0864..3bad928 100644
@@ -104,6 +104,8 @@
 

Quoted 6 lines

arch/arm/plat-omap/include/mach/entry-macro.S line 108
Quoted 4 lines
arch/arm/plat-omap/include/mach/entry-macro.S +2 -0
 		.endm
 #else
+#define OMAP44XX_VA_GIC_CPU_BASE	OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
+
Shouldn't this define go with the ioremap aproach?

That's still needed for the get_irqnr_and_base assembly macro. But at least it's now defined locally for the macro.

Tony

Aguirre Rodriguez, Sergio Alberto

2009-10-19 18:07 UTC #20 lore raw

PATCH 8/14 omap: Use ioremap for omap4 L4 code

Quoted 93 lines

-----Original Message-----
From: Tony Lindgren [mailto:tony at atomide.com]
Sent: Monday, October 19, 2009 12:39 PM
To: Aguirre Rodriguez, Sergio Alberto
Cc: Shilimkar, Santosh; linux-arm-kernel at lists.infradead.org; linux-omap at vger.kernel.org
Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code
Quoted 5 lines · Aguirre Rodriguez, Sergio Alberto
Tony,
Quoted 3 lines
-----Original Message-----
From: linux-omap-owner at vger.kernel.org [mailto:linux-omap-owner at vger.kernel.org] On Behalf Of
Tony Lindgren
Quoted 3 lines
Quoted 3 lines
Sent: Monday, October 19, 2009 12:12 PM
To: Shilimkar, Santosh
Cc: linux-arm-kernel at lists.infradead.org;
linux-omap at vger.kernel.org
Quoted 9 lines
Quoted 9 lines
Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code
Quoted 6 lines · Shilimkar, Santosh
Tony,
Quoted 5 lines
-----Original Message-----
From: Tony Lindgren [mailto:tony at atomide.com]
Sent: Monday, October 19, 2009 5:54 AM
To: Shilimkar, Santosh
Cc: linux-arm-kernel at lists.infradead.org;
Quoted 5 lines
Quoted 5 lines
linux-omap at vger.kernel.org
Quoted 4 lines
Quoted 4 lines
Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code
Quoted 1 line · Tony Lindgren
* Shilimkar, Santosh <[email protected]>
[091017 03:49]:
Quoted 29 lines
Quoted 29 lines
Quoted 8 lines
Quoted 8 lines
Quoted 8 lines
Quoted 8 lines
Thanks Tony for this ioremap series!!
Quoted 6 lines
-----Original Message-----
From: Tony Lindgren [mailto:tony at atomide.com]
Sent: Saturday, October 17, 2009 5:16 AM
To: linux-arm-kernel at lists.infradead.org
Cc: linux-omap at vger.kernel.org; Shilimkar, Santosh
Subject: Re: [PATCH 08/14] omap: Use ioremap for
omap4 L4 code
Quoted 7 lines
Quoted 7 lines
Quoted 7 lines
Quoted 7 lines
Quoted 7 lines · Tony Lindgren
Quoted 1 line
Use ioremap for omap4 L4 code
Santosh, can you please check and ack this patch?
Especially some of the ioremap sizes may be wrong.
Also, this one
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 1 line
I cannot boot test, so it's just compile tested.
I have checked the patch and it looks all right
except few typo. Also
Quoted 5 lines
Quoted 5 lines
the scu_base is needed bit earlier.
<snip>
Quoted 1 line
Quoted 1 line
Here is the patch on top of ioremap series which
should fix above
Quoted 1 line
Quoted 1 line
mentioned things. With below patch + two serial related
patches the kernel
Quoted 8 lines
Quoted 8 lines
Quoted 8 lines
Quoted 5 lines
boots on OMAP4430.
Quoted 2 lines
Great, will update. Thanks for taking the time to fix it!
Here's this one updated with Santosh's fix merged in.
V2 has one typo which I think I also missed in my patch.
Review
Quoted 2 lines
(quoted diff) +2 -0
+	/* Static mapping, never released */
+	gic_cpu_base_addr = 
ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
Quoted 8 lines
Quoted 4 lines
Quoted 2 lines
Review
Quoted 1 line
(quoted diff) +1 -0
+	BUG_ON(!base);
Should be BUG_ON(!gic_cpu_base_addr);
OK, here's V3 of the patch.
Tony,
Review
Quoted 1 line
(quoted diff) +0 -0
a/arch/arm/plat-omap/include/mach/entry-macro.S
b/arch/arm/plat-omap/include/mach/entry-macro.S
Quoted 8 lines
arch/arm/plat-omap/include/mach/entry-macro.S line 107
Quoted 8 lines
index abe0864..3bad928 100644
arch/arm/plat-omap/include/mach/entry-macro.S +1 -0
@@ -104,6 +104,8 @@
 
 		.endm
 #else
+#define OMAP44XX_VA_GIC_CPU_BASE	
OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)

Quoted 6 lines

Quoted 3 lines
arch/arm/plat-omap/include/mach/entry-macro.S line 108
Quoted 1 line
arch/arm/plat-omap/include/mach/entry-macro.S +1 -0
+
Shouldn't this define go with the ioremap aproach?
That's still needed for the get_irqnr_and_base assembly macro. But at least it's now defined locally for the macro.

Oh ok, I didn't catch that one.

Thanks for clarifying.

Regards,
Sergio

Quoted 4 lines

Tony

Shilimkar, Santosh

2009-10-20 06:34 UTC #21 lore raw

PATCH 8/14 omap: Use ioremap for omap4 L4 code

In reply to Tony Lindgren

Quoted 54 lines

-----Original Message-----
From: linux-omap-owner at vger.kernel.org [mailto:linux-omap- owner at vger.kernel.org] On Behalf Of Tony Lindgren
Sent: Monday, October 19, 2009 10:42 PM
To: Shilimkar, Santosh
Cc: linux-arm-kernel at lists.infradead.org; linux-omap at vger.kernel.org
Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code
Quoted 6 lines · Shilimkar, Santosh
Tony,
Quoted 5 lines
-----Original Message-----
From: Tony Lindgren [mailto:tony at atomide.com]
Sent: Monday, October 19, 2009 5:54 AM
To: Shilimkar, Santosh
Cc: linux-arm-kernel at lists.infradead.org; linux-
omap at vger.kernel.org
Quoted 4 lines
Quoted 4 lines
Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4 code
Quoted 1 line · Tony Lindgren
* Shilimkar, Santosh <[email protected]> [091017
03:49]:
Quoted 8 lines
Quoted 8 lines
Quoted 8 lines
Quoted 8 lines
Thanks Tony for this ioremap series!!
Quoted 6 lines
-----Original Message-----
From: Tony Lindgren [mailto:tony at atomide.com]
Sent: Saturday, October 17, 2009 5:16 AM
To: linux-arm-kernel at lists.infradead.org
Cc: linux-omap at vger.kernel.org; Shilimkar, Santosh
Subject: Re: [PATCH 08/14] omap: Use ioremap for omap4 L4
code
Quoted 7 lines
Quoted 7 lines
Quoted 7 lines
Quoted 7 lines
Quoted 7 lines · Tony Lindgren
Quoted 1 line
Use ioremap for omap4 L4 code
Santosh, can you please check and ack this patch?
Especially some of the ioremap sizes may be wrong. Also,
this one
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 3 lines
Quoted 1 line
I cannot boot test, so it's just compile tested.
I have checked the patch and it looks all right except few
typo. Also
Quoted 5 lines
Quoted 5 lines
the scu_base is needed bit earlier.
<snip>
Quoted 1 line
Quoted 1 line
Here is the patch on top of ioremap series which should fix
above
Quoted 1 line
Quoted 1 line
mentioned things. With below patch + two serial related patches
the kernel
Quoted 4 lines
Quoted 4 lines
boots on OMAP4430.
Quoted 2 lines
Great, will update. Thanks for taking the time to fix it!

Quoted 8 lines

Quoted 6 lines
Quoted 1 line
Here's this one updated with Santosh's fix merged in.
V2 has one typo which I think I also missed in my patch.
Review
Quoted 3 lines
(quoted diff) +3 -0
+	/* Static mapping, never released */
+	gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
+	BUG_ON(!base);
Should be BUG_ON(!gic_cpu_base_addr);
OK, here's V3 of the patch.

It's complete now :)

Regards,
Santosh

Tony Lindgren

author maintainer

2009-10-16 23:41 UTC #22 lore raw

PATCH 9/14 omap: Use ioremap in dispc.c

In reply to Tony Lindgren

Use ioremap in dispc.c

Cc Imre Deak <[email protected]>

Cc Tomi Valkeinen <[email protected]>

Signed-off-by Tony Lindgren <[email protected]>

---
 drivers/video/omap/dispc.c |   20 +++++++++++++++++---
 1 files changed, 17 insertions(+), 3 deletions(-)

drivers/video/omap/dispc.c +17 -3

index f16e421..6f957ce 100644
@@ -204,6 +204,7 @@ static u32 inline dispc_read_reg(int idx)
 /* Select RFBI or bypass mode */
 static void enable_rfbi_mode(int enable)
 {
+	void __iomem *rfbi_control;
 	u32 l;
 
 	l = dispc_read_reg(DISPC_CONTROL);

@@ -216,9 +217,15 @@ static void enable_rfbi_mode(int enable)
 	dispc_write_reg(DISPC_CONTROL, l);
 
 	/* Set bypass mode in RFBI module */
-	l = __raw_readl(OMAP2_IO_ADDRESS(RFBI_CONTROL));
+	rfbi_control = ioremap(RFBI_CONTROL, SZ_1K);
+	if (!rfbi_control) {
+		pr_err("Unable to ioremap rfbi_control\n");
+		return;
+	}
+	l = __raw_readl(rfbi_control);
 	l |= enable ? 0 : (1 << 1);
-	__raw_writel(l, OMAP2_IO_ADDRESS(RFBI_CONTROL));
+	__raw_writel(l, rfbi_control);
+	iounmap(rfbi_control);
 }
 
 static void set_lcd_data_lines(int data_lines)

@@ -1367,6 +1374,7 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode,
 	int r;
 	u32 l;
 	struct lcd_panel *panel = fbdev->panel;
+	void __iomem *ram_fw_base;
 	int tmo = 10000;
 	int skip_init = 0;
 	int i;

@@ -1441,7 +1449,13 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode,
 	}
 
 	/* L3 firewall setting: enable access to OCM RAM */
-	__raw_writel(0x402000b0, OMAP2_IO_ADDRESS(0x680050a0));
+	ram_fw_base = ioremap(0x68005000, SZ_1K);
+	if (!ram_fw_base) {
+		dev_err(dispc.fbdev->dev, "Cannot ioremap to enable OCM RAM\n");
+		goto fail1;
+	}
+	__raw_writel(0x402000b0, ram_fw_base + 0xa0);
+	iounmap(ram_fw_base);
 
 	if ((r = alloc_palette_ram()) < 0)
 		goto fail2;

Tony Lindgren

author maintainer

2009-10-16 23:41 UTC #23 lore raw

PATCH 10/14 omap: Split OMAP2_IO_ADDRESS to L3 and L4

In reply to Tony Lindgren

From: Santosh Shilimkar <[email protected]>

This patch splits OMAP2_IO_ADDRESS to OMAP2_L3_IO_ADDRESS and OMAP2_L4_IO_ADDRESS to reclaim more IO space.

The omap_read*() and omap_write*() functions will work only over L4 address space. Current omap kernel stack uses these functions only to access registers over L4 io address space

Note that these macros should only be used when ioremap does not work. Please use ioremap instead in all new code.

Signed-off-by Santosh Shilimkar <[email protected]>

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/mach-omap2/cm.h                      |    6 ++-
 arch/arm/mach-omap2/pm-debug.c                |    3 +-
 arch/arm/mach-omap2/prm.h                     |    6 ++-
 arch/arm/mach-omap2/sdrc.h                    |    9 +++--
 arch/arm/mach-omap2/sram242x.S                |    4 +-
 arch/arm/mach-omap2/sram243x.S                |    4 +-
 arch/arm/plat-omap/common.c                   |   44 +++++++++++++------------
 arch/arm/plat-omap/include/mach/control.h     |   15 +++++----
 arch/arm/plat-omap/include/mach/entry-macro.S |    6 ++-
 arch/arm/plat-omap/include/mach/io.h          |    6 ++-
 arch/arm/plat-omap/include/mach/sdrc.h        |    6 ++-
 arch/arm/plat-omap/io.c                       |   12 +++----
 arch/arm/plat-omap/sram.c                     |   20 ++++++-----
 13 files changed, 75 insertions(+), 66 deletions(-)

arch/arm/mach-omap2/cm.h +3 -3

index cfd0b72..a2fcfcc 100644
@@ -17,11 +17,11 @@
 #include "prcm-common.h"
 
 #define OMAP2420_CM_REGADDR(module, reg)				\
-			OMAP2_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
+			OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
 #define OMAP2430_CM_REGADDR(module, reg)				\
-			OMAP2_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg))
+			OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg))
 #define OMAP34XX_CM_REGADDR(module, reg)				\
-			OMAP2_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
+			OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
 
 /*
  * Architecture-specific global CM registers

arch/arm/mach-omap2/pm-debug.c +2 -1

index 2fc4d6a..deed1dd 100644
@@ -51,7 +51,8 @@ int omap2_pm_debug;
 	regs[reg_count++].val = __raw_readl(reg)
 #define DUMP_INTC_REG(reg, off) \
 	regs[reg_count].name = #reg; \
-	regs[reg_count++].val = __raw_readl(OMAP2_IO_ADDRESS(0x480fe000 + (off)))
+	regs[reg_count++].val = \
+			 __raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off)))
 
 static int __init pm_dbg_init(void);

arch/arm/mach-omap2/prm.h +3 -3

index 03c467c..a117f85 100644
@@ -17,11 +17,11 @@
 #include "prcm-common.h"
 
 #define OMAP2420_PRM_REGADDR(module, reg)				\
-			OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
+		OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
 #define OMAP2430_PRM_REGADDR(module, reg)				\
-			OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg))
+		OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg))
 #define OMAP34XX_PRM_REGADDR(module, reg)				\
-			OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))
+		OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))
 
 /*
  * Architecture-specific global PRM registers

arch/arm/mach-omap2/sdrc.h +6 -3

index 0837eda..345183d 100644
@@ -48,9 +48,12 @@ static inline u32 sms_read_reg(u16 reg)
 	return __raw_readl(OMAP_SMS_REGADDR(reg));
 }
 #else
-#define OMAP242X_SDRC_REGADDR(reg)	OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg))
-#define OMAP243X_SDRC_REGADDR(reg)	OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg))
-#define OMAP34XX_SDRC_REGADDR(reg)	OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg))
+#define OMAP242X_SDRC_REGADDR(reg)					\
+			OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg))
+#define OMAP243X_SDRC_REGADDR(reg)					\
+			OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg))
+#define OMAP34XX_SDRC_REGADDR(reg)					\
+			OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg))
 #endif	/* __ASSEMBLER__ */
 
 #endif

arch/arm/mach-omap2/sram242x.S +2 -2

index 9b62208..92e6e1a 100644
@@ -128,7 +128,7 @@ omap242x_sdi_prcm_voltctrl:
 prcm_mask_val:
 	.word 0xFFFF3FFC
 omap242x_sdi_timer_32ksynct_cr:
-	.word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
+	.word OMAP2_L4_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
 ENTRY(omap242x_sram_ddr_init_sz)
 	.word	. - omap242x_sram_ddr_init

@@ -224,7 +224,7 @@ omap242x_srs_prcm_voltctrl:
 ddr_prcm_mask_val:
 	.word 0xFFFF3FFC
 omap242x_srs_timer_32ksynct:
-	.word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
+	.word OMAP2_L4_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
 
 ENTRY(omap242x_sram_reprogram_sdrc_sz)
 	.word	. - omap242x_sram_reprogram_sdrc

arch/arm/mach-omap2/sram243x.S +2 -2

index df2cd92..ab49736 100644
@@ -128,7 +128,7 @@ omap243x_sdi_prcm_voltctrl:
 prcm_mask_val:
 	.word 0xFFFF3FFC
 omap243x_sdi_timer_32ksynct_cr:
-	.word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
+	.word OMAP2_L4_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
 ENTRY(omap243x_sram_ddr_init_sz)
 	.word	. - omap243x_sram_ddr_init

@@ -224,7 +224,7 @@ omap243x_srs_prcm_voltctrl:
 ddr_prcm_mask_val:
 	.word 0xFFFF3FFC
 omap243x_srs_timer_32ksynct:
-	.word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
+	.word OMAP2_L4_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
 
 ENTRY(omap243x_sram_reprogram_sdrc_sz)
 	.word	. - omap243x_sram_reprogram_sdrc

arch/arm/plat-omap/common.c +22 ~~-22~~

68 lines not on this page · raw message

arch/arm/plat-omap/include/mach/control.h +9 -6

index 826d317..805819f 100644
@@ -20,15 +20,18 @@
 
 #ifndef __ASSEMBLY__
 #define OMAP242X_CTRL_REGADDR(reg)					\
-	OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
+		OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
 #define OMAP243X_CTRL_REGADDR(reg)					\
-	OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
+		OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
 #define OMAP343X_CTRL_REGADDR(reg)					\
-	OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
+		OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
 #else
-#define OMAP242X_CTRL_REGADDR(reg)	OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
-#define OMAP243X_CTRL_REGADDR(reg)	OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
-#define OMAP343X_CTRL_REGADDR(reg)	OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
+#define OMAP242X_CTRL_REGADDR(reg)					\
+		OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
+#define OMAP243X_CTRL_REGADDR(reg)					\
+		OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
+#define OMAP343X_CTRL_REGADDR(reg)					\
+		OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
 #endif /* __ASSEMBLY__ */
 
 /*

arch/arm/plat-omap/include/mach/entry-macro.S +3 -3

index 3bad928..2aea566 100644
@@ -68,9 +68,9 @@
 
 /* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */
 #if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430)
-#define OMAP2_VA_IC_BASE		OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE)
+#define OMAP2_VA_IC_BASE		OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
 #elif defined(CONFIG_ARCH_OMAP34XX)
-#define OMAP2_VA_IC_BASE		OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE)
+#define OMAP2_VA_IC_BASE		OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
 #endif
 #if defined(CONFIG_ARCH_OMAP4)
 #include <mach/omap44xx.h>

@@ -104,7 +104,7 @@
 
 		.endm
 #else
-#define OMAP44XX_VA_GIC_CPU_BASE	OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
+#define OMAP44XX_VA_GIC_CPU_BASE	OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
 
 		/*
 		 * The interrupt numbering scheme is defined in the

arch/arm/plat-omap/include/mach/io.h +4 -2

index 8d32df3..c475be7 100644
@@ -63,9 +63,11 @@
 #define OMAP1_IO_OFFSET		0x01000000	/* Virtual IO = 0xfefb0000 */
 #define OMAP1_IO_ADDRESS(pa)	IOMEM((pa) - OMAP1_IO_OFFSET)
 
-#define OMAP2_IO_OFFSET		0x90000000
-#define OMAP2_IO_ADDRESS(pa)	IOMEM((pa) + OMAP2_IO_OFFSET) /* L3 and L4 */
+#define OMAP2_L3_IO_OFFSET	0x90000000
+#define OMAP2_L3_IO_ADDRESS(pa)	IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
 
+#define OMAP2_L4_IO_OFFSET	0x90000000
+#define OMAP2_L4_IO_ADDRESS(pa)	IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
 /*
  * ----------------------------------------------------------------------------
  * Omap1 specific IO mapping

arch/arm/plat-omap/include/mach/sdrc.h +3 -3

index 1c09c78..7b58a5f 100644
@@ -80,11 +80,11 @@
  */
 
 #define OMAP242X_SMS_REGADDR(reg)					\
-			(void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE + reg)
+		(void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE + reg)
 #define OMAP243X_SMS_REGADDR(reg)					\
-			(void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE + reg)
+		(void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE + reg)
 #define OMAP343X_SMS_REGADDR(reg)					\
-			(void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE + reg)
+		(void __iomem *)OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE + reg)
 
 /* SMS register offsets - read/write with sms_{read,write}_reg() */

arch/arm/plat-omap/io.c +6 -6

index 23a205f..eb74ab2 100644
@@ -142,7 +142,7 @@ u8 omap_readb(u32 pa)
 	if (cpu_class_is_omap1())
 		return __raw_readb(OMAP1_IO_ADDRESS(pa));
 	else
-		return __raw_readb(OMAP2_IO_ADDRESS(pa));
+		return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
 }
 EXPORT_SYMBOL(omap_readb);

@@ -151,7 +151,7 @@ u16 omap_readw(u32 pa)
 	if (cpu_class_is_omap1())
 		return __raw_readw(OMAP1_IO_ADDRESS(pa));
 	else
-		return __raw_readw(OMAP2_IO_ADDRESS(pa));
+		return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
 }
 EXPORT_SYMBOL(omap_readw);

@@ -160,7 +160,7 @@ u32 omap_readl(u32 pa)
 	if (cpu_class_is_omap1())
 		return __raw_readl(OMAP1_IO_ADDRESS(pa));
 	else
-		return __raw_readl(OMAP2_IO_ADDRESS(pa));
+		return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
 }
 EXPORT_SYMBOL(omap_readl);

@@ -169,7 +169,7 @@ void omap_writeb(u8 v, u32 pa)
 	if (cpu_class_is_omap1())
 		__raw_writeb(v, OMAP1_IO_ADDRESS(pa));
 	else
-		__raw_writeb(v, OMAP2_IO_ADDRESS(pa));
+		__raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
 }
 EXPORT_SYMBOL(omap_writeb);

@@ -178,7 +178,7 @@ void omap_writew(u16 v, u32 pa)
 	if (cpu_class_is_omap1())
 		__raw_writew(v, OMAP1_IO_ADDRESS(pa));
 	else
-		__raw_writew(v, OMAP2_IO_ADDRESS(pa));
+		__raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
 }
 EXPORT_SYMBOL(omap_writew);

@@ -187,6 +187,6 @@ void omap_writel(u32 v, u32 pa)
 	if (cpu_class_is_omap1())
 		__raw_writel(v, OMAP1_IO_ADDRESS(pa));
 	else
-		__raw_writel(v, OMAP2_IO_ADDRESS(pa));
+		__raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
 }
 EXPORT_SYMBOL(omap_writel);

arch/arm/plat-omap/sram.c +10 ~~-10~~

index 75d1f26..93bdbaf 100644
@@ -56,16 +56,16 @@
 #define SRAM_BOOTLOADER_SZ	0x80
 #endif
 
-#define OMAP24XX_VA_REQINFOPERM0	OMAP2_IO_ADDRESS(0x68005048)
-#define OMAP24XX_VA_READPERM0		OMAP2_IO_ADDRESS(0x68005050)
-#define OMAP24XX_VA_WRITEPERM0		OMAP2_IO_ADDRESS(0x68005058)
-
-#define OMAP34XX_VA_REQINFOPERM0	OMAP2_IO_ADDRESS(0x68012848)
-#define OMAP34XX_VA_READPERM0		OMAP2_IO_ADDRESS(0x68012850)
-#define OMAP34XX_VA_WRITEPERM0		OMAP2_IO_ADDRESS(0x68012858)
-#define OMAP34XX_VA_ADDR_MATCH2		OMAP2_IO_ADDRESS(0x68012880)
-#define OMAP34XX_VA_SMS_RG_ATT0		OMAP2_IO_ADDRESS(0x6C000048)
-#define OMAP34XX_VA_CONTROL_STAT	OMAP2_IO_ADDRESS(0x480022F0)
+#define OMAP24XX_VA_REQINFOPERM0	OMAP2_L3_IO_ADDRESS(0x68005048)
+#define OMAP24XX_VA_READPERM0		OMAP2_L3_IO_ADDRESS(0x68005050)
+#define OMAP24XX_VA_WRITEPERM0		OMAP2_L3_IO_ADDRESS(0x68005058)
+
+#define OMAP34XX_VA_REQINFOPERM0	OMAP2_L3_IO_ADDRESS(0x68012848)
+#define OMAP34XX_VA_READPERM0		OMAP2_L3_IO_ADDRESS(0x68012850)
+#define OMAP34XX_VA_WRITEPERM0		OMAP2_L3_IO_ADDRESS(0x68012858)
+#define OMAP34XX_VA_ADDR_MATCH2		OMAP2_L3_IO_ADDRESS(0x68012880)
+#define OMAP34XX_VA_SMS_RG_ATT0		OMAP2_L3_IO_ADDRESS(0x6C000048)
+#define OMAP34XX_VA_CONTROL_STAT	OMAP2_L4_IO_ADDRESS(0x480022F0)
 
 #define GP_DEVICE		0x300

Tony Lindgren

author maintainer

2009-10-16 23:42 UTC #24 lore raw

PATCH 11/14 omap: Remap L3, L4 to get more kernel io address space

In reply to Tony Lindgren

From: Santosh Shilimkar <[email protected]>

This patch remap L3 and L4 io space to get more kernel address space. With this patch, 512 MB of IO space is reclaimed.
Some more combinations are possible but to make it uniform across OMAP24XX, OMAP34XX and OMAP4430, these io combinations are chosen

Once this is reviewed and tested sufficiently, a documentation entry can be created to ease up reading and debugging.
Like "Documentation/arm/omap/io_map.txt"

Signed-off-by Santosh Shilimkar <[email protected]>

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/plat-omap/include/mach/io.h      |   97 ++++++++++++++++++-----------
 arch/arm/plat-omap/include/mach/vmalloc.h |    2 -
 2 files changed, 60 insertions(+), 39 deletions(-)

arch/arm/plat-omap/include/mach/io.h +59 ~~-38~~

index c475be7..a8f931a 100644
@@ -66,8 +66,18 @@
 #define OMAP2_L3_IO_OFFSET	0x90000000
 #define OMAP2_L3_IO_ADDRESS(pa)	IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
 
-#define OMAP2_L4_IO_OFFSET	0x90000000
+#define OMAP4_L3_IO_OFFSET	0xb4000000
+#define OMAP4_L3_IO_ADDRESS(pa)	IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
+
+#define OMAP4_GPMC_IO_OFFSET		0xa9000000
+#define OMAP4_GPMC_IO_ADDRESS(pa)	IOMEM((pa) + OMAP4_GPMC_IO_OFFSET)
+
+#define OMAP2_L4_IO_OFFSET	0xb2000000
 #define OMAP2_L4_IO_ADDRESS(pa)	IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
+
+#define OMAP2_EMU_IO_OFFSET		0xaa800000	/* Emulation */
+#define OMAP2_EMU_IO_ADDRESS(pa)	IOMEM((pa) + OMAP2_EMU_IO_OFFSET)
+
 /*
  * ----------------------------------------------------------------------------
  * Omap1 specific IO mapping

@@ -85,24 +95,27 @@
  */
 
 /* We map both L3 and L4 on OMAP2 */
-#define L3_24XX_PHYS	L3_24XX_BASE	/* 0x68000000 */
-#define L3_24XX_VIRT	0xf8000000
+#define L3_24XX_PHYS	L3_24XX_BASE	/* 0x68000000 --> 0xf8000000*/
+#define L3_24XX_VIRT	(L3_24XX_PHYS + OMAP2_L3_IO_OFFSET)
 #define L3_24XX_SIZE	SZ_1M		/* 44kB of 128MB used, want 1MB sect */
-#define L4_24XX_PHYS	L4_24XX_BASE	/* 0x48000000 */
-#define L4_24XX_VIRT	0xd8000000
+#define L4_24XX_PHYS	L4_24XX_BASE	/* 0x48000000 --> 0xfa000000 */
+#define L4_24XX_VIRT	(L4_24XX_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_24XX_SIZE	SZ_1M		/* 1MB of 128MB used, want 1MB sect */
 
-#define L4_WK_243X_PHYS		L4_WK_243X_BASE		/* 0x49000000 */
-#define L4_WK_243X_VIRT		0xd9000000
+#define L4_WK_243X_PHYS		L4_WK_243X_BASE	/* 0x49000000 --> 0xfb000000 */
+#define L4_WK_243X_VIRT		(L4_WK_243X_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_WK_243X_SIZE		SZ_1M
-#define OMAP243X_GPMC_PHYS	OMAP243X_GPMC_BASE	/* 0x49000000 */
-#define OMAP243X_GPMC_VIRT	0xFE000000
+#define OMAP243X_GPMC_PHYS	OMAP243X_GPMC_BASE
+#define OMAP243X_GPMC_VIRT	(OMAP243X_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
+						/* 0x6e000000 --> 0xfe000000 */
 #define OMAP243X_GPMC_SIZE	SZ_1M
 #define OMAP243X_SDRC_PHYS	OMAP243X_SDRC_BASE
-#define OMAP243X_SDRC_VIRT	0xFD000000
+						/* 0x6D000000 --> 0xfd000000 */
+#define OMAP243X_SDRC_VIRT	(OMAP243X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
 #define OMAP243X_SDRC_SIZE	SZ_1M
 #define OMAP243X_SMS_PHYS	OMAP243X_SMS_BASE
-#define OMAP243X_SMS_VIRT	0xFC000000
+						/* 0x6c000000 --> 0xfc000000 */
+#define OMAP243X_SMS_VIRT	(OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
 #define OMAP243X_SMS_SIZE	SZ_1M
 
 /* DSP */

@@ -123,12 +136,12 @@
  */
 
 /* We map both L3 and L4 on OMAP3 */
-#define L3_34XX_PHYS		L3_34XX_BASE	/* 0x68000000 */
-#define L3_34XX_VIRT		0xf8000000
+#define L3_34XX_PHYS		L3_34XX_BASE	/* 0x68000000 --> 0xf8000000 */
+#define L3_34XX_VIRT		(L3_34XX_PHYS + OMAP2_L3_IO_OFFSET)
 #define L3_34XX_SIZE		SZ_1M   /* 44kB of 128MB used, want 1MB sect */
 
-#define L4_34XX_PHYS		L4_34XX_BASE	/* 0x48000000 */
-#define L4_34XX_VIRT		0xd8000000
+#define L4_34XX_PHYS		L4_34XX_BASE	/* 0x48000000 --> 0xfa000000 */
+#define L4_34XX_VIRT		(L4_34XX_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_34XX_SIZE		SZ_4M   /* 1MB of 128MB used, want 1MB sect */
 
 /*

@@ -136,28 +149,33 @@
  * VPOM3430 was not working for Int controller
  */
 
-#define L4_WK_34XX_PHYS		L4_WK_34XX_BASE /* 0x48300000 */
-#define L4_WK_34XX_VIRT		0xd8300000
+#define L4_WK_34XX_PHYS		L4_WK_34XX_BASE	/* 0x48300000 --> 0xfa300000 */
+#define L4_WK_34XX_VIRT		(L4_WK_34XX_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_WK_34XX_SIZE		SZ_1M
 
-#define L4_PER_34XX_PHYS	L4_PER_34XX_BASE /* 0x49000000 */
-#define L4_PER_34XX_VIRT	0xd9000000
+#define L4_PER_34XX_PHYS	L4_PER_34XX_BASE
+						/* 0x49000000 --> 0xfb000000 */
+#define L4_PER_34XX_VIRT	(L4_PER_34XX_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_PER_34XX_SIZE	SZ_1M
 
-#define L4_EMU_34XX_PHYS	L4_EMU_34XX_BASE /* 0x54000000 */
-#define L4_EMU_34XX_VIRT	0xe4000000
-#define L4_EMU_34XX_SIZE	SZ_64M
+#define L4_EMU_34XX_PHYS	L4_EMU_34XX_BASE
+						/* 0x54000000 --> 0xfe800000 */
+#define L4_EMU_34XX_VIRT	(L4_EMU_34XX_PHYS + OMAP2_EMU_IO_OFFSET)
+#define L4_EMU_34XX_SIZE	SZ_8M
 
-#define OMAP34XX_GPMC_PHYS	OMAP34XX_GPMC_BASE /* 0x6E000000 */
-#define OMAP34XX_GPMC_VIRT	0xFE000000
+#define OMAP34XX_GPMC_PHYS	OMAP34XX_GPMC_BASE
+						/* 0x6e000000 --> 0xfe000000 */
+#define OMAP34XX_GPMC_VIRT	(OMAP34XX_GPMC_PHYS + OMAP2_L3_IO_OFFSET)
 #define OMAP34XX_GPMC_SIZE	SZ_1M
 
-#define OMAP343X_SMS_PHYS	OMAP343X_SMS_BASE /* 0x6C000000 */
-#define OMAP343X_SMS_VIRT	0xFC000000
+#define OMAP343X_SMS_PHYS	OMAP343X_SMS_BASE
+						/* 0x6c000000 --> 0xfc000000 */
+#define OMAP343X_SMS_VIRT	(OMAP343X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
 #define OMAP343X_SMS_SIZE	SZ_1M
 
-#define OMAP343X_SDRC_PHYS	OMAP343X_SDRC_BASE /* 0x6D000000 */
-#define OMAP343X_SDRC_VIRT	0xFD000000
+#define OMAP343X_SDRC_PHYS	OMAP343X_SDRC_BASE
+						/* 0x6D000000 --> 0xfd000000 */
+#define OMAP343X_SDRC_VIRT	(OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
 #define OMAP343X_SDRC_SIZE	SZ_1M
 
 /* DSP */

@@ -178,29 +196,32 @@
  */
 
 /* We map both L3 and L4 on OMAP4 */
-#define L3_44XX_PHYS		L3_44XX_BASE
-#define L3_44XX_VIRT		0xd4000000
+#define L3_44XX_PHYS		L3_44XX_BASE	/* 0x44000000 --> 0xf8000000 */
+#define L3_44XX_VIRT		(L3_44XX_PHYS + OMAP4_L3_IO_OFFSET)
 #define L3_44XX_SIZE		SZ_1M
 
-#define L4_44XX_PHYS		L4_44XX_BASE
-#define L4_44XX_VIRT		0xda000000
+#define L4_44XX_PHYS		L4_44XX_BASE	/* 0x4a000000 --> 0xfc000000 */
+#define L4_44XX_VIRT		(L4_44XX_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_44XX_SIZE		SZ_4M
 
 
-#define L4_WK_44XX_PHYS		L4_WK_44XX_BASE
-#define L4_WK_44XX_VIRT		0xda300000
+#define L4_WK_44XX_PHYS		L4_WK_44XX_BASE	/* 0x4a300000 --> 0xfc300000 */
+#define L4_WK_44XX_VIRT		(L4_WK_44XX_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_WK_44XX_SIZE		SZ_1M
 
 #define L4_PER_44XX_PHYS	L4_PER_44XX_BASE
-#define L4_PER_44XX_VIRT	0xd8000000
+						/* 0x48000000 --> 0xfa000000 */
+#define L4_PER_44XX_VIRT	(L4_PER_44XX_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_PER_44XX_SIZE	SZ_4M
 
 #define L4_EMU_44XX_PHYS	L4_EMU_44XX_BASE
-#define L4_EMU_44XX_VIRT	0xe4000000
-#define L4_EMU_44XX_SIZE	SZ_64M
+						/* 0x54000000 --> 0xfe800000 */
+#define L4_EMU_44XX_VIRT	(L4_EMU_44XX_PHYS + OMAP2_EMU_IO_OFFSET)
+#define L4_EMU_44XX_SIZE	SZ_8M
 
 #define OMAP44XX_GPMC_PHYS	OMAP44XX_GPMC_BASE
-#define OMAP44XX_GPMC_VIRT	0xe0000000
+						/* 0x50000000 --> 0xf9000000 */
+#define OMAP44XX_GPMC_VIRT	(OMAP44XX_GPMC_PHYS + OMAP4_GPMC_IO_OFFSET)
 #define OMAP44XX_GPMC_SIZE	SZ_1M

arch/arm/plat-omap/include/mach/vmalloc.h +1 -1

index b97dfaf..9eebf62 100644
@@ -17,5 +17,5 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
-#define VMALLOC_END	  (PAGE_OFFSET + 0x18000000)
+#define VMALLOC_END	  (PAGE_OFFSET + 0x38000000)

Tony Lindgren

author maintainer

2009-10-20 00:20 UTC #25 lore raw

PATCH 11/14 omap: Remap L3, L4 to get more kernel io address space

Quoted 18 lines · Tony Lindgren

From: Santosh Shilimkar <[email protected]>
This patch remap L3 and L4 io space to get more kernel address space. With this patch, 512 MB of IO space is reclaimed.
Some more combinations are possible but to make it uniform across OMAP24XX, OMAP34XX and OMAP4430, these io combinations are chosen
Once this is reviewed and tested sufficiently, a documentation entry can be created to ease up reading and debugging.
Like "Documentation/arm/omap/io_map.txt"
Signed-off-by Santosh Shilimkar <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
---
 arch/arm/plat-omap/include/mach/io.h      |   97 ++++++++++++++++++-----------
 arch/arm/plat-omap/include/mach/vmalloc.h |    2 -
 2 files changed, 60 insertions(+), 39 deletions(-)

<snip>

arch/arm/plat-omap/include/mach/vmalloc.h line 20

Quoted 10 lines

arch/arm/plat-omap/include/mach/vmalloc.h +1 -1

index b97dfaf..9eebf62 100644
@@ -17,5 +17,5 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  */
-#define VMALLOC_END	  (PAGE_OFFSET + 0x18000000)
+#define VMALLOC_END	  (PAGE_OFFSET + 0x38000000)

This vmalloc.h change causes issues on omap1. I'll update the series to ifdef this define.

Then I'll split the file in the later patches into separate vmalloc.h for mach-omap1 and mach-omap2, see below.

Regards,

Tony

Shilimkar, Santosh

2009-10-20 06:32 UTC #26 lore raw

PATCH 11/14 omap: Remap L3, L4 to get more kernel io address space

Quoted 49 lines

-----Original Message-----
From: Tony Lindgren [mailto:tony at atomide.com]
Sent: Tuesday, October 20, 2009 5:51 AM
To: linux-arm-kernel at lists.infradead.org
Cc: linux-omap at vger.kernel.org; Shilimkar, Santosh
Subject: Re: [PATCH 11/14] omap: Remap L3, L4 to get more kernel io address space
Quoted 3 lines · Tony Lindgren
From: Santosh Shilimkar <[email protected]>
This patch remap L3 and L4 io space to get more kernel address
space.
Quoted 5 lines
With this patch, 512 MB of IO space is reclaimed.
Some more combinations are possible but to make it uniform across OMAP24XX, OMAP34XX and OMAP4430, these io combinations are chosen
Once this is reviewed and tested sufficiently, a documentation
entry can
Quoted 7 lines
be created to ease up reading and debugging.
Like "Documentation/arm/omap/io_map.txt"
Signed-off-by Santosh Shilimkar <[email protected]>
Signed-off-by Tony Lindgren <[email protected]>
---
 arch/arm/plat-omap/include/mach/io.h      |   97
++++++++++++++++++-----------
Quoted 3 lines
 arch/arm/plat-omap/include/mach/vmalloc.h |    2 -
 2 files changed, 60 insertions(+), 39 deletions(-)
<snip>
Review
Quoted 1 line
(quoted diff) +0 -0
b/arch/arm/plat-omap/include/mach/vmalloc.h
arch/arm/plat-omap/include/mach/vmalloc.h line 18
Quoted 6 lines
index b97dfaf..9eebf62 100644
arch/arm/plat-omap/include/mach/vmalloc.h +0 -0
@@ -17,5 +17,5 @@
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
02111-1307 USA
arch/arm/plat-omap/include/mach/vmalloc.h line 20
Quoted 3 lines
arch/arm/plat-omap/include/mach/vmalloc.h +1 -1
  */
-#define VMALLOC_END	  (PAGE_OFFSET + 0x18000000)
+#define VMALLOC_END	  (PAGE_OFFSET + 0x38000000)
This vmalloc.h change causes issues on omap1. I'll update the series to ifdef this define.

Quoted 2 lines

Then I'll split the file in the later patches into separate vmalloc.h for mach-omap1 and mach-omap2, see below.

Regrads
Santosh

Tony Lindgren

author maintainer

2009-10-16 23:42 UTC #27 lore raw

PATCH 12/14 omap: Move SRAM map to claim more io space

In reply to Tony Lindgren

From: Santosh Shilimkar <[email protected]>

This patch moves SRAM map to free up more kernel address io space.

Signed-off-by Santosh Shilimkar <[email protected]>

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/plat-omap/sram.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)

arch/arm/plat-omap/sram.c +3 -3

index 93bdbaf..4144f81 100644
@@ -41,14 +41,14 @@
 #define OMAP1_SRAM_VA		VMALLOC_END
 #define OMAP2_SRAM_PA		0x40200000
 #define OMAP2_SRAM_PUB_PA	0x4020f800
-#define OMAP2_SRAM_VA		0xe3000000
+#define OMAP2_SRAM_VA		0xfe400000
 #define OMAP2_SRAM_PUB_VA	(OMAP2_SRAM_VA + 0x800)
 #define OMAP3_SRAM_PA           0x40200000
-#define OMAP3_SRAM_VA           0xe3000000
+#define OMAP3_SRAM_VA           0xfe400000
 #define OMAP3_SRAM_PUB_PA       0x40208000
 #define OMAP3_SRAM_PUB_VA       (OMAP3_SRAM_VA + 0x8000)
 #define OMAP4_SRAM_PA		0x40200000		/*0x402f0000*/
-#define OMAP4_SRAM_VA		0xd7000000		/*0xd70f0000*/
+#define OMAP4_SRAM_VA		0xfe400000		/*0xfe4f0000*/
 
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
 #define SRAM_BOOTLOADER_SZ	0x00

Tony Lindgren

author maintainer

2009-10-16 23:42 UTC #28 lore raw

PATCH 13/14 omap: Fix DEBUG_LL UART io address

In reply to Tony Lindgren

From: Santosh Shilimkar <[email protected]>

This patch fixes the low level debug UART io address as per this series. The change is essential to have CONFIG_DEBUG_LL working.

Signed-off-by Santosh Shilimkar <[email protected]>

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/mach-omap2/board-2430sdp.c           |    2 +-
 arch/arm/mach-omap2/board-3430sdp.c           |    2 +-
 arch/arm/mach-omap2/board-4430sdp.c           |    2 +-
 arch/arm/mach-omap2/board-apollon.c           |    2 +-
 arch/arm/mach-omap2/board-generic.c           |    2 +-
 arch/arm/mach-omap2/board-h4.c                |    2 +-
 arch/arm/mach-omap2/board-ldp.c               |    2 +-
 arch/arm/mach-omap2/board-n8x0.c              |    6 +++---
 arch/arm/mach-omap2/board-omap3beagle.c       |    2 +-
 arch/arm/mach-omap2/board-omap3evm.c          |    2 +-
 arch/arm/mach-omap2/board-omap3pandora.c      |    2 +-
 arch/arm/mach-omap2/board-overo.c             |    2 +-
 arch/arm/mach-omap2/board-rx51.c              |    2 +-
 arch/arm/mach-omap2/board-zoom2.c             |    2 +-
 arch/arm/plat-omap/include/mach/debug-macro.S |    4 ++--
 15 files changed, 18 insertions(+), 18 deletions(-)

arch/arm/mach-omap2/board-2430sdp.c +1 -1

index 42217b3..e032a33 100644
@@ -221,7 +221,7 @@ static void __init omap_2430sdp_map_io(void)
 MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
 	/* Maintainer: Syed Khasim - Texas Instruments Inc */
 	.phys_io	= 0x48000000,
-	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
+	.io_pg_offst	= ((0xfa000000) >> 18) & 0xfffc,
 	.boot_params	= 0x80000100,
 	.map_io		= omap_2430sdp_map_io,
 	.init_irq	= omap_2430sdp_init_irq,

arch/arm/mach-omap2/board-3430sdp.c +1 -1

index efaf053..364ce7e 100644
@@ -511,7 +511,7 @@ static void __init omap_3430sdp_map_io(void)
 MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
 	/* Maintainer: Syed Khasim - Texas Instruments Inc */
 	.phys_io	= 0x48000000,
-	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
+	.io_pg_offst	= ((0xfa000000) >> 18) & 0xfffc,
 	.boot_params	= 0x80000100,
 	.map_io		= omap_3430sdp_map_io,
 	.init_irq	= omap_3430sdp_init_irq,

arch/arm/mach-omap2/board-4430sdp.c +1 -1

index 2a7b901..50a62f2 100644
@@ -93,7 +93,7 @@ static void __init omap_4430sdp_map_io(void)
 MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
 	/* Maintainer: Santosh Shilimkar - Texas Instruments Inc */
 	.phys_io	= 0x48000000,
-	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
+	.io_pg_offst	= ((0xfa000000) >> 18) & 0xfffc,
 	.boot_params	= 0x80000100,
 	.map_io		= omap_4430sdp_map_io,
 	.init_irq	= omap_4430sdp_init_irq,

arch/arm/mach-omap2/board-apollon.c +1 -1

index a113228..e8a0e56 100644
@@ -333,7 +333,7 @@ static void __init omap_apollon_map_io(void)
 MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
 	/* Maintainer: Kyungmin Park <[email protected]> */
 	.phys_io	= 0x48000000,
-	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
+	.io_pg_offst	= ((0xfa000000) >> 18) & 0xfffc,
 	.boot_params	= 0x80000100,
 	.map_io		= omap_apollon_map_io,
 	.init_irq	= omap_apollon_init_irq,

arch/arm/mach-omap2/board-generic.c +1 -1

index 2e09a1c..1a139c0 100644
@@ -56,7 +56,7 @@ static void __init omap_generic_map_io(void)
 MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx")
 	/* Maintainer: Paul Mundt <[email protected]> */
 	.phys_io	= 0x48000000,
-	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
+	.io_pg_offst	= ((0xfa000000) >> 18) & 0xfffc,
 	.boot_params	= 0x80000100,
 	.map_io		= omap_generic_map_io,
 	.init_irq	= omap_generic_init_irq,

arch/arm/mach-omap2/board-h4.c +1 -1

index eaa02d0..86f78f3 100644
@@ -376,7 +376,7 @@ static void __init omap_h4_map_io(void)
 MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
 	/* Maintainer: Paul Mundt <[email protected]> */
 	.phys_io	= 0x48000000,
-	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
+	.io_pg_offst	= ((0xfa000000) >> 18) & 0xfffc,
 	.boot_params	= 0x80000100,
 	.map_io		= omap_h4_map_io,
 	.init_irq	= omap_h4_init_irq,

arch/arm/mach-omap2/board-ldp.c +1 -1

index d110a7f..4ccc01a 100644
@@ -399,7 +399,7 @@ static void __init omap_ldp_map_io(void)
 
 MACHINE_START(OMAP_LDP, "OMAP LDP board")
 	.phys_io	= 0x48000000,
-	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
+	.io_pg_offst	= ((0xfa000000) >> 18) & 0xfffc,
 	.boot_params	= 0x80000100,
 	.map_io		= omap_ldp_map_io,
 	.init_irq	= omap_ldp_init_irq,

arch/arm/mach-omap2/board-n8x0.c +3 -3

index 8341632..2f6ccba 100644
@@ -121,7 +121,7 @@ static void __init n8x0_init_machine(void)
 
 MACHINE_START(NOKIA_N800, "Nokia N800")
 	.phys_io	= 0x48000000,
-	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
+	.io_pg_offst	= ((0xfa000000) >> 18) & 0xfffc,
 	.boot_params	= 0x80000100,
 	.map_io		= n8x0_map_io,
 	.init_irq	= n8x0_init_irq,

@@ -131,7 +131,7 @@ MACHINE_END
 
 MACHINE_START(NOKIA_N810, "Nokia N810")
 	.phys_io	= 0x48000000,
-	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
+	.io_pg_offst	= ((0xfa000000) >> 18) & 0xfffc,
 	.boot_params	= 0x80000100,
 	.map_io		= n8x0_map_io,
 	.init_irq	= n8x0_init_irq,

@@ -141,7 +141,7 @@ MACHINE_END
 
 MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
 	.phys_io	= 0x48000000,
-	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
+	.io_pg_offst	= ((0xfa000000) >> 18) & 0xfffc,
 	.boot_params	= 0x80000100,
 	.map_io		= n8x0_map_io,
 	.init_irq	= n8x0_init_irq,

arch/arm/mach-omap2/board-omap3beagle.c +1 -1

index 70df6b4..7db803d 100644
@@ -429,7 +429,7 @@ static void __init omap3_beagle_map_io(void)
 MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
 	/* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */
 	.phys_io	= 0x48000000,
-	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
+	.io_pg_offst	= ((0xfa000000) >> 18) & 0xfffc,
 	.boot_params	= 0x80000100,
 	.map_io		= omap3_beagle_map_io,
 	.init_irq	= omap3_beagle_init_irq,

arch/arm/mach-omap2/board-omap3evm.c +1 -1

index e4ec0c5..72f0b1e 100644
@@ -324,7 +324,7 @@ static void __init omap3_evm_map_io(void)
 MACHINE_START(OMAP3EVM, "OMAP3 EVM")
 	/* Maintainer: Syed Mohammed Khasim - Texas Instruments */
 	.phys_io	= 0x48000000,
-	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
+	.io_pg_offst	= ((0xfa000000) >> 18) & 0xfffc,
 	.boot_params	= 0x80000100,
 	.map_io		= omap3_evm_map_io,
 	.init_irq	= omap3_evm_init_irq,

arch/arm/mach-omap2/board-omap3pandora.c +1 -1

index 7f6bf87..12d2381 100644
@@ -412,7 +412,7 @@ static void __init omap3pandora_map_io(void)
 
 MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
 	.phys_io	= 0x48000000,
-	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
+	.io_pg_offst	= ((0xfa000000) >> 18) & 0xfffc,
 	.boot_params	= 0x80000100,
 	.map_io		= omap3pandora_map_io,
 	.init_irq	= omap3pandora_init_irq,

arch/arm/mach-omap2/board-overo.c +1 -1

index 9917d2f..c5e0da9 100644
@@ -451,7 +451,7 @@ static void __init overo_map_io(void)
 
 MACHINE_START(OVERO, "Gumstix Overo")
 	.phys_io	= 0x48000000,
-	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
+	.io_pg_offst	= ((0xfa000000) >> 18) & 0xfffc,
 	.boot_params	= 0x80000100,
 	.map_io		= overo_map_io,
 	.init_irq	= overo_init_irq,

arch/arm/mach-omap2/board-rx51.c +1 -1

index f9196c3..c973812 100644
@@ -85,7 +85,7 @@ static void __init rx51_map_io(void)
 MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
 	/* Maintainer: Lauri Leukkunen <[email protected]> */
 	.phys_io	= 0x48000000,
-	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
+	.io_pg_offst	= ((0xfa000000) >> 18) & 0xfffc,
 	.boot_params	= 0x80000100,
 	.map_io		= rx51_map_io,
 	.init_irq	= rx51_init_irq,

arch/arm/mach-omap2/board-zoom2.c +1 -1

index fd3369d..48bd2af 100644
@@ -283,7 +283,7 @@ static void __init omap_zoom2_map_io(void)
 
 MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
 	.phys_io	= 0x48000000,
-	.io_pg_offst	= ((0xd8000000) >> 18) & 0xfffc,
+	.io_pg_offst	= ((0xfa000000) >> 18) & 0xfffc,
 	.boot_params	= 0x80000100,
 	.map_io		= omap_zoom2_map_io,
 	.init_irq	= omap_zoom2_init_irq,

arch/arm/plat-omap/include/mach/debug-macro.S +2 -2

index ac24050..63bb06d 100644
@@ -27,7 +27,7 @@
 
 #elif  CONFIG_ARCH_OMAP2
 		moveq	\rx, #0x48000000	@ physical base address
-		movne	\rx, #0xd8000000	@ virtual base
+		movne	\rx, #0xfa000000	@ virtual base
 		orr	\rx, \rx, #0x0006a000
 #ifdef CONFIG_OMAP_LL_DEBUG_UART2
 		add	\rx, \rx, #0x00002000	@ UART 2

@@ -38,7 +38,7 @@
 
 #elif defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 		moveq	\rx, #0x48000000	@ physical base address
-		movne	\rx, #0xd8000000	@ virtual base
+		movne	\rx, #0xfa000000	@ virtual base
 		orr	\rx, \rx, #0x0006a000
 #ifdef CONFIG_OMAP_LL_DEBUG_UART2
 		add	\rx, \rx, #0x00002000	@ UART 2

Tony Lindgren

author maintainer

2009-10-16 23:42 UTC #29 lore raw

PATCH 14/14 omap: Add OMAP4 L3 and L4 peripherals.

In reply to Tony Lindgren

From: Santosh Shilimkar <[email protected]>

This patch adds few necessary peripherals for OMAP4.

Signed-off-by Santosh Shilimkar <[email protected]>

Signed-off-by Tony Lindgren <[email protected]>

---
 arch/arm/mach-omap2/io.c                   |   18 +++++++++++++++++
 arch/arm/plat-omap/include/mach/io.h       |   29 +++++++++++++++++++++++++---
 arch/arm/plat-omap/include/mach/omap44xx.h |    3 +++
 arch/arm/plat-omap/io.c                    |    8 ++++++++
 4 files changed, 55 insertions(+), 3 deletions(-)

arch/arm/mach-omap2/io.c +18 -0

index e3a3bad..fc62953 100644
@@ -203,6 +203,24 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
 		.type		= MT_DEVICE,
 	},
 	{
+		.virtual	= OMAP44XX_EMIF1_VIRT,
+		.pfn		= __phys_to_pfn(OMAP44XX_EMIF1_PHYS),
+		.length		= OMAP44XX_EMIF1_SIZE,
+		.type		= MT_DEVICE,
+	},
+	{
+		.virtual	= OMAP44XX_EMIF2_VIRT,
+		.pfn		= __phys_to_pfn(OMAP44XX_EMIF2_PHYS),
+		.length		= OMAP44XX_EMIF2_SIZE,
+		.type		= MT_DEVICE,
+	},
+	{
+		.virtual	= OMAP44XX_DMM_VIRT,
+		.pfn		= __phys_to_pfn(OMAP44XX_DMM_PHYS),
+		.length		= OMAP44XX_DMM_SIZE,
+		.type		= MT_DEVICE,
+	},
+	{
 		.virtual	= L4_PER_44XX_VIRT,
 		.pfn		= __phys_to_pfn(L4_PER_44XX_PHYS),
 		.length		= L4_PER_44XX_SIZE,

arch/arm/plat-omap/include/mach/io.h +26 -3

index a8f931a..7e5319f 100644
@@ -66,15 +66,19 @@
 #define OMAP2_L3_IO_OFFSET	0x90000000
 #define OMAP2_L3_IO_ADDRESS(pa)	IOMEM((pa) + OMAP2_L3_IO_OFFSET) /* L3 */
 
+
+#define OMAP2_L4_IO_OFFSET	0xb2000000
+#define OMAP2_L4_IO_ADDRESS(pa)	IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
+
 #define OMAP4_L3_IO_OFFSET	0xb4000000
 #define OMAP4_L3_IO_ADDRESS(pa)	IOMEM((pa) + OMAP4_L3_IO_OFFSET) /* L3 */
 
+#define OMAP4_L3_PER_IO_OFFSET	0xb1100000
+#define OMAP4_L3_PER_IO_ADDRESS(pa)	IOMEM((pa) + OMAP4_L3_PER_IO_OFFSET)
+
 #define OMAP4_GPMC_IO_OFFSET		0xa9000000
 #define OMAP4_GPMC_IO_ADDRESS(pa)	IOMEM((pa) + OMAP4_GPMC_IO_OFFSET)
 
-#define OMAP2_L4_IO_OFFSET	0xb2000000
-#define OMAP2_L4_IO_ADDRESS(pa)	IOMEM((pa) + OMAP2_L4_IO_OFFSET) /* L4 */
-
 #define OMAP2_EMU_IO_OFFSET		0xaa800000	/* Emulation */
 #define OMAP2_EMU_IO_ADDRESS(pa)	IOMEM((pa) + OMAP2_EMU_IO_OFFSET)

@@ -214,6 +218,11 @@
 #define L4_PER_44XX_VIRT	(L4_PER_44XX_PHYS + OMAP2_L4_IO_OFFSET)
 #define L4_PER_44XX_SIZE	SZ_4M
 
+#define L4_ABE_44XX_PHYS	L4_ABE_44XX_BASE
+						/* 0x49000000 --> 0xfb000000 */
+#define L4_ABE_44XX_VIRT	(L4_ABE_44XX_PHYS + OMAP2_L4_IO_OFFSET)
+#define L4_ABE_44XX_SIZE	SZ_1M
+
 #define L4_EMU_44XX_PHYS	L4_EMU_44XX_BASE
 						/* 0x54000000 --> 0xfe800000 */
 #define L4_EMU_44XX_VIRT	(L4_EMU_44XX_PHYS + OMAP2_EMU_IO_OFFSET)

@@ -225,6 +234,20 @@
 #define OMAP44XX_GPMC_SIZE	SZ_1M
 
 
+#define OMAP44XX_EMIF1_PHYS	OMAP44XX_EMIF1_BASE
+						/* 0x4c000000 --> 0xfd100000 */
+#define OMAP44XX_EMIF1_VIRT	(OMAP44XX_EMIF1_PHYS + OMAP4_L3_PER_IO_OFFSET)
+#define OMAP44XX_EMIF1_SIZE	SZ_1M
+
+#define OMAP44XX_EMIF2_PHYS	OMAP44XX_EMIF2_BASE
+						/* 0x4d000000 --> 0xfd200000 */
+#define OMAP44XX_EMIF2_VIRT	(OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
+#define OMAP44XX_EMIF2_SIZE	SZ_1M
+
+#define OMAP44XX_DMM_PHYS	OMAP44XX_DMM_BASE
+						/* 0x4e000000 --> 0xfd300000 */
+#define OMAP44XX_DMM_VIRT	(OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
+#define OMAP44XX_DMM_SIZE	SZ_1M
 /*
  * ----------------------------------------------------------------------------
  * Omap specific register access

arch/arm/plat-omap/include/mach/omap44xx.h +3 -0

index 8b4a578..3361897 100644
@@ -22,6 +22,9 @@
 #define L4_PER_44XX_BASE		0x48000000
 #define L4_EMU_44XX_BASE		0x54000000
 #define L3_44XX_BASE			0x44000000
+#define OMAP44XX_EMIF1_BASE		0x4c000000
+#define OMAP44XX_EMIF2_BASE		0x4d000000
+#define OMAP44XX_DMM_BASE		0x4e000000
 #define OMAP4430_32KSYNCT_BASE		0x4a304000
 #define OMAP4430_CM_BASE		0x4a004000
 #define OMAP4430_PRM_BASE		0x48306000

arch/arm/plat-omap/io.c +8 -0

index eb74ab2..93c1d53 100644
@@ -114,6 +114,14 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
 			return XLATE(p, L4_WK_44XX_PHYS, L4_WK_44XX_VIRT);
 		if (BETWEEN(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_SIZE))
 			return XLATE(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_VIRT);
+		if (BETWEEN(p, OMAP44XX_EMIF1_PHYS, OMAP44XX_EMIF1_SIZE))
+			return XLATE(p, OMAP44XX_EMIF1_PHYS,		\
+							OMAP44XX_EMIF1_VIRT);
+		if (BETWEEN(p, OMAP44XX_EMIF2_PHYS, OMAP44XX_EMIF2_SIZE))
+			return XLATE(p, OMAP44XX_EMIF2_PHYS,		\
+							OMAP44XX_EMIF2_VIRT);
+		if (BETWEEN(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_SIZE))
+			return XLATE(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_VIRT);
 		if (BETWEEN(p, L4_PER_44XX_PHYS, L4_PER_44XX_SIZE))
 			return XLATE(p, L4_PER_44XX_PHYS, L4_PER_44XX_VIRT);
 		if (BETWEEN(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_SIZE))