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Omap low-level device init updates for 2.6.33

PATCH New Tony Lindgren 1 participant 16 messages Nov 13, 2009

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Tony Lindgren

author maintainer
#0 lore raw

cover Omap low-level device init updates for 2.6.33

Hi all,

Here are some patches for review for the upcoming merge window.

This series mostly updates the low-level device init code to support the new omap processors. Few more clean-up patches are included too.

Regards,

Tony

---

Anand Gadiyar (1):
omap: update plat/usb.h to allow ehci driver to build

Felipe Balbi (1):
omap: Add platform init code for EHCI driver

Felipe Contreras (1):
omap: iommu: reorganize

Hiroshi DOYU (2):
omap: iommu: avoid remapping if it's been mapped in MPU side
omap: iovmm: remove cache flush operation

Kevin Hilman (1):
omap3: keep SoC features on the same line

Madhu (4):
omap3630: Add HSMMC related checks
omap3630: Configure HSMMC1 to 4-bit
omap3630: Set omap3630 MMC1 I/O speed to 52Mhz
omap3: HSMMC2 8-bit mux configuration

Paul Walmsley (1):
omap3: drop all IVA-related address base definitions

Peter Ujfalusi (1):
omap: McBSP: Do not use extensive spin locks for dma_op_mode

Sriram (1):
omap3: evm: make HSMMC driver built-in

Tony Lindgren (1):
omap3: move check_revision above check_features

 arch/arm/configs/omap3_evm_defconfig       |    2 
 arch/arm/mach-omap2/Makefile               |    1 
 arch/arm/mach-omap2/board-3430sdp.c        |   13 ++
 arch/arm/mach-omap2/board-omap3beagle.c    |   13 ++
 arch/arm/mach-omap2/board-omap3evm.c       |   15 ++
 arch/arm/mach-omap2/board-omap3pandora.c   |   13 ++
 arch/arm/mach-omap2/board-overo.c          |   21 ++-
 arch/arm/mach-omap2/devices.c              |    8 +
 arch/arm/mach-omap2/id.c                   |   13 +-
 arch/arm/mach-omap2/mmc-twl4030.c          |   17 ++
 arch/arm/mach-omap2/mux.c                  |    8 +
 arch/arm/mach-omap2/omap3-iommu.c          |   62 +++++----
 arch/arm/mach-omap2/usb-ehci.c             |  192 ++++++++++++++++++++++++++++
 arch/arm/plat-omap/include/plat/control.h  |    3 
 arch/arm/plat-omap/include/plat/mux.h      |    4 +
 arch/arm/plat-omap/include/plat/omap34xx.h |   11 +-
 arch/arm/plat-omap/include/plat/usb.h      |   17 ++
 arch/arm/plat-omap/iovmm.c                 |   13 +-
 arch/arm/plat-omap/mcbsp.c                 |    6 -
 19 files changed, 363 insertions(+), 69 deletions(-)
 create mode 100644 arch/arm/mach-omap2/usb-ehci.c
Signature · 1 line
Signature
author maintainer
#1 lore raw

PATCH 1/14 omap: update plat/usb.h to allow ehci driver to build

From: Anand Gadiyar <[email protected]>

Add missing declarations to allow the recently introduced ehci-omap driver to build on OMAP3

---
 arch/arm/plat-omap/include/plat/usb.h |   17 +++++++++++++++++
 1 files changed, 17 insertions(+), 0 deletions(-)
arch/arm/plat-omap/include/plat/usb.h +17 -0
index 33e72ca..33a500e 100644
@@ -5,6 +5,21 @@
 
 #include <plat/board.h>
 
+#define OMAP3_HS_USB_PORTS	3
+enum ehci_hcd_omap_mode {
+	EHCI_HCD_OMAP_MODE_UNKNOWN,
+	EHCI_HCD_OMAP_MODE_PHY,
+	EHCI_HCD_OMAP_MODE_TLL,
+};
+
+struct ehci_hcd_omap_platform_data {
+	enum ehci_hcd_omap_mode		port_mode[OMAP3_HS_USB_PORTS];
+	unsigned			phy_reset:1;
+
+	/* have to be valid if phy_reset is true and portx is in phy mode */
+	int	reset_gpio_port[OMAP3_HS_USB_PORTS];
+};
+
 /*-------------------------------------------------------------------------*/
 
 #define OMAP1_OTG_BASE			0xfffb0400
@@ -29,6 +44,8 @@
 
 extern void usb_musb_init(void);
 
+extern void usb_ehci_init(struct ehci_hcd_omap_platform_data *pdata);
+
 #endif
 
 void omap_usb_init(struct omap_usb_config *pdata);
author maintainer
#2 lore raw

PATCH 2/14 omap: Add platform init code for EHCI driver

In reply to Tony Lindgren

From: Felipe Balbi <[email protected]>

Add platform init code for EHCI driver.

Various fixes to the original patch by Ajay Kumar Gupta <[email protected]> and Anand Gadiyar <[email protected]>.

Overo support added by Olof Johansson <[email protected]> Beagle support added by Koen Kooi <[email protected]> CM-T32 support added by Mike Rapoport <[email protected]>

---
 arch/arm/mach-omap2/Makefile               |    1 
 arch/arm/mach-omap2/board-3430sdp.c        |   13 ++
 arch/arm/mach-omap2/board-omap3beagle.c    |   13 ++
 arch/arm/mach-omap2/board-omap3evm.c       |   15 ++
 arch/arm/mach-omap2/board-omap3pandora.c   |   13 ++
 arch/arm/mach-omap2/board-overo.c          |   21 ++-
 arch/arm/mach-omap2/usb-ehci.c             |  192 ++++++++++++++++++++++++++++
 arch/arm/plat-omap/include/plat/omap34xx.h |    6 +
 8 files changed, 265 insertions(+), 9 deletions(-)
 create mode 100644 arch/arm/mach-omap2/usb-ehci.c
arch/arm/mach-omap2/Makefile +1 -0
index 1d54ad3..5c32b65 100644
@@ -80,6 +80,7 @@ obj-$(CONFIG_MACH_OMAP_4430SDP)		+= board-4430sdp.o
 # Platform specific device init code
 obj-y					+= usb-musb.o
 obj-$(CONFIG_MACH_OMAP2_TUSB6010)	+= usb-tusb6010.o
+obj-y					+= usb-ehci.o
 
 onenand-$(CONFIG_MTD_ONENAND_OMAP2)	:= gpmc-onenand.o
 obj-y					+= $(onenand-m) $(onenand-y)
arch/arm/mach-omap2/board-3430sdp.c +13 -0
index a2abac9..a3c1271 100644
@@ -484,6 +484,18 @@ static void enable_board_wakeup_source(void)
 	omap_cfg_reg(AF26_34XX_SYS_NIRQ); /* T2 interrupt line (keypad) */
 }
 
+static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+
+	.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
+	.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
+	.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+
+	.phy_reset  = true,
+	.reset_gpio_port[0]  = 57,
+	.reset_gpio_port[1]  = 61,
+	.reset_gpio_port[2]  = -EINVAL
+};
+
 static void __init omap_3430sdp_init(void)
 {
 	omap3430_i2c_init();
@@ -500,6 +512,7 @@ static void __init omap_3430sdp_init(void)
 	usb_musb_init();
 	board_smc91x_init();
 	enable_board_wakeup_source();
+	usb_ehci_init(&ehci_pdata);
 }
 
 static void __init omap_3430sdp_map_io(void)
arch/arm/mach-omap2/board-omap3beagle.c +13 -0
index 71a3528..6cb99f6 100644
@@ -400,6 +400,18 @@ static void __init omap3beagle_flash_init(void)
 	}
 }
 
+static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+
+	.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
+	.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
+	.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+
+	.phy_reset  = true,
+	.reset_gpio_port[0]  = -EINVAL,
+	.reset_gpio_port[1]  = 147,
+	.reset_gpio_port[2]  = -EINVAL
+};
+
 static void __init omap3_beagle_init(void)
 {
 	omap3_beagle_i2c_init();
@@ -413,6 +425,7 @@ static void __init omap3_beagle_init(void)
 	gpio_direction_output(170, true);
 
 	usb_musb_init();
+	usb_ehci_init(&ehci_pdata);
 	omap3beagle_flash_init();
 
 	/* Ensure SDRC pins are mux'd for self-refresh */
arch/arm/mach-omap2/board-omap3evm.c +15 -0
index 522ff62..30b25f7 100644
@@ -297,6 +297,18 @@ static struct platform_device *omap3_evm_devices[] __initdata = {
 	&omap3evm_smc911x_device,
 };
 
+static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+
+	.port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+	.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
+	.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+
+	.phy_reset  = true,
+	.reset_gpio_port[0]  = -EINVAL,
+	.reset_gpio_port[1]  = 135,
+	.reset_gpio_port[2]  = -EINVAL
+};
+
 static void __init omap3_evm_init(void)
 {
 	omap3_evm_i2c_init();
@@ -312,6 +324,9 @@ static void __init omap3_evm_init(void)
 	usb_nop_xceiv_register();
 #endif
 	usb_musb_init();
+	/* Setup EHCI phy reset padconfig */
+	omap_cfg_reg(AF4_34XX_GPIO135_OUT);
+	usb_ehci_init(&ehci_pdata);
 	ads7846_dev_init();
 }
 
arch/arm/mach-omap2/board-omap3pandora.c +13 -0
index 5a38494..581a18d 100644
@@ -387,6 +387,18 @@ static struct platform_device *omap3pandora_devices[] __initdata = {
 	&pandora_keys_gpio,
 };
 
+static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+
+	.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
+	.port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+	.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+
+	.phy_reset  = true,
+	.reset_gpio_port[0]  = 16,
+	.reset_gpio_port[1]  = -EINVAL,
+	.reset_gpio_port[2]  = -EINVAL
+};
+
 static void __init omap3pandora_init(void)
 {
 	omap3pandora_i2c_init();
@@ -396,6 +408,7 @@ static void __init omap3pandora_init(void)
 	spi_register_board_info(omap3pandora_spi_board_info,
 			ARRAY_SIZE(omap3pandora_spi_board_info));
 	omap3pandora_ads7846_init();
+	usb_ehci_init(&ehci_pdata);
 	pandora_keys_gpio_init();
 	usb_musb_init();
 
arch/arm/mach-omap2/board-overo.c +13 -8
index 461522c..92f3f3a 100644
@@ -384,6 +384,18 @@ static struct platform_device *overo_devices[] __initdata = {
 	&overo_lcd_device,
 };
 
+static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
+	.port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+	.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
+	.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
+
+	.phy_reset  = true,
+	.reset_gpio_port[0]  = -EINVAL,
+	.reset_gpio_port[1]  = OVERO_GPIO_USBH_NRESET,
+	.reset_gpio_port[2]  = -EINVAL
+};
+
+
 static void __init overo_init(void)
 {
 	overo_i2c_init();
@@ -391,6 +403,7 @@ static void __init overo_init(void)
 	omap_serial_init();
 	overo_flash_init();
 	usb_musb_init();
+	usb_ehci_init(&ehci_pdata);
 	overo_ads7846_init();
 	overo_init_smsc911x();
 
@@ -433,14 +446,6 @@ static void __init overo_init(void)
 	else
 		printk(KERN_ERR "could not obtain gpio for "
 					"OVERO_GPIO_USBH_CPEN\n");
-
-	if ((gpio_request(OVERO_GPIO_USBH_NRESET,
-			  "OVERO_GPIO_USBH_NRESET") == 0) &&
-	    (gpio_direction_output(OVERO_GPIO_USBH_NRESET, 1) == 0))
-		gpio_export(OVERO_GPIO_USBH_NRESET, 0);
-	else
-		printk(KERN_ERR "could not obtain gpio for "
-					"OVERO_GPIO_USBH_NRESET\n");
 }
 
 static void __init overo_map_io(void)
arch/arm/mach-omap2/usb-ehci.c new file +192 -0

192 lines not on this page · raw message

arch/arm/plat-omap/include/plat/omap34xx.h +5 -1
index f8d186a..4655707 100644
@@ -74,8 +74,12 @@
 
 #define OMAP34XX_IVA_INTC_BASE	0x40000000
 #define OMAP34XX_HSUSB_OTG_BASE	(L4_34XX_BASE + 0xAB000)
-#define OMAP34XX_HSUSB_HOST_BASE	(L4_34XX_BASE + 0x64000)
 #define OMAP34XX_USBTLL_BASE	(L4_34XX_BASE + 0x62000)
+#define OMAP34XX_UHH_CONFIG_BASE	(L4_34XX_BASE + 0x64000)
+#define OMAP34XX_OHCI_BASE	(L4_34XX_BASE + 0x64400)
+#define OMAP34XX_EHCI_BASE	(L4_34XX_BASE + 0x64800)
+#define OMAP34XX_SR1_BASE	0x480C9000
+#define OMAP34XX_SR2_BASE	0x480CB000
 
 #define OMAP34XX_MAILBOX_BASE		(L4_34XX_BASE + 0x94000)
 
author maintainer
#3 lore raw

PATCH 3/14 omap: iommu: avoid remapping if it's been mapped in MPU side

In reply to Tony Lindgren

From: Hiroshi DOYU <[email protected]>

MPU side (v)-(p) mapping is necessary only if IOVMF_MMIO is set in "flags".

---
 arch/arm/plat-omap/iovmm.c |   10 ++++++----
 1 files changed, 6 insertions(+), 4 deletions(-)
arch/arm/plat-omap/iovmm.c +6 -4
index 0ce36bb..577d8c0 100644
@@ -617,7 +617,7 @@ u32 iommu_vmap(struct iommu *obj, u32 da, const struct sg_table *sgt,
 		 u32 flags)
 {
 	size_t bytes;
-	void *va;
+	void *va = NULL;
 
 	if (!obj || !obj->dev || !sgt)
 		return -EINVAL;
@@ -627,9 +627,11 @@ u32 iommu_vmap(struct iommu *obj, u32 da, const struct sg_table *sgt,
 		return -EINVAL;
 	bytes = PAGE_ALIGN(bytes);
 
-	va = vmap_sg(sgt);
-	if (IS_ERR(va))
-		return PTR_ERR(va);
+	if (flags & IOVMF_MMIO) {
+		va = vmap_sg(sgt);
+		if (IS_ERR(va))
+			return PTR_ERR(va);
+	}
 
 	flags &= IOVMF_HW_MASK;
 	flags |= IOVMF_DISCONT;
author maintainer
#4 lore raw

PATCH 4/14 omap: iovmm: remove cache flush operation

In reply to Tony Lindgren

From: Hiroshi DOYU <[email protected]>

Cache flush operation is handled in the upper client layer and iovmm modules doesn't have to care about it. This patch will improve some performance with current camera isp driver.

---
 arch/arm/plat-omap/iovmm.c |    3 ---
 1 files changed, 0 insertions(+), 3 deletions(-)
arch/arm/plat-omap/iovmm.c +0 -3
index 577d8c0..544772e 100644
@@ -392,7 +392,6 @@ static void sgtable_fill_vmalloc(struct sg_table *sgt, void *_va)
 	}
 
 	va_end = _va + PAGE_SIZE * i;
-	flush_cache_vmap((unsigned long)_va, (unsigned long)va_end);
 }
 
 static inline void sgtable_drain_vmalloc(struct sg_table *sgt)
@@ -427,8 +426,6 @@ static void sgtable_fill_kmalloc(struct sg_table *sgt, u32 pa, size_t len)
 		len -= bytes;
 	}
 	BUG_ON(len);
-
-	clean_dcache_area(va, len);
 }
 
 static inline void sgtable_drain_kmalloc(struct sg_table *sgt)
author maintainer
#5 lore raw

PATCH 5/14 omap: iommu: reorganize

In reply to Tony Lindgren

From: Felipe Contreras <[email protected]>

This way it's more object oriented and easier to see what is happening. No functional changes.

---
 arch/arm/mach-omap2/omap3-iommu.c |   62 +++++++++++++++++++------------------
 1 files changed, 31 insertions(+), 31 deletions(-)
arch/arm/mach-omap2/omap3-iommu.c +31 -31
index 6a9bf4f..fbbcb5c 100644
@@ -14,47 +14,50 @@
 
 #include <plat/iommu.h>
 
-#define OMAP3_MMU1_BASE	0x480bd400
-#define OMAP3_MMU2_BASE	0x5d000000
-#define OMAP3_MMU1_IRQ	24
-#define OMAP3_MMU2_IRQ	28
-
-
-static unsigned long iommu_base[] __initdata = {
-	OMAP3_MMU1_BASE,
-	OMAP3_MMU2_BASE,
-};
-
-static int iommu_irq[] __initdata = {
-	OMAP3_MMU1_IRQ,
-	OMAP3_MMU2_IRQ,
+struct iommu_device {
+	resource_size_t base;
+	int irq;
+	struct iommu_platform_data pdata;
+	struct resource res[2];
 };
 
-static const struct iommu_platform_data omap3_iommu_pdata[] __initconst = {
+static struct iommu_device devices[] = {
 	{
-		.name = "isp",
-		.nr_tlb_entries = 8,
-		.clk_name = "cam_ick",
+		.base = 0x480bd400,
+		.irq = 24,
+		.pdata = {
+			.name = "isp",
+			.nr_tlb_entries = 8,
+			.clk_name = "cam_ick",
+		},
 	},
 #if defined(CONFIG_MPU_BRIDGE_IOMMU)
 	{
-		.name = "iva2",
-		.nr_tlb_entries = 32,
-		.clk_name = "iva2_ck",
+		.base = 0x5d000000,
+		.irq = 28,
+		.pdata = {
+			.name = "iva2",
+			.nr_tlb_entries = 32,
+			.clk_name = "iva2_ck",
+		},
 	},
 #endif
 };
-#define NR_IOMMU_DEVICES ARRAY_SIZE(omap3_iommu_pdata)
+#define NR_IOMMU_DEVICES ARRAY_SIZE(devices)
 
 static struct platform_device *omap3_iommu_pdev[NR_IOMMU_DEVICES];
 
 static int __init omap3_iommu_init(void)
 {
 	int i, err;
+	struct resource res[] = {
+		{ .flags = IORESOURCE_MEM },
+		{ .flags = IORESOURCE_IRQ },
+	};
 
 	for (i = 0; i < NR_IOMMU_DEVICES; i++) {
 		struct platform_device *pdev;
-		struct resource res[2];
+		const struct iommu_device *d = &devices[i];
 
 		pdev = platform_device_alloc("omap-iommu", i);
 		if (!pdev) {
@@ -62,19 +65,16 @@ static int __init omap3_iommu_init(void)
 			goto err_out;
 		}
 
-		memset(res, 0,  sizeof(res));
-		res[0].start = iommu_base[i];
-		res[0].end = iommu_base[i] + MMU_REG_SIZE - 1;
-		res[0].flags = IORESOURCE_MEM;
-		res[1].start = res[1].end = iommu_irq[i];
-		res[1].flags = IORESOURCE_IRQ;
+		res[0].start = d->base;
+		res[0].end = d->base + MMU_REG_SIZE - 1;
+		res[1].start = res[1].end = d->irq;
 
 		err = platform_device_add_resources(pdev, res,
 						    ARRAY_SIZE(res));
 		if (err)
 			goto err_out;
-		err = platform_device_add_data(pdev, &omap3_iommu_pdata[i],
-					       sizeof(omap3_iommu_pdata[0]));
+		err = platform_device_add_data(pdev, &d->pdata,
+					       sizeof(d->pdata));
 		if (err)
 			goto err_out;
 		err = platform_device_add(pdev);
author maintainer
#6 lore raw

PATCH 6/14 omap: McBSP: Do not use extensive spin locks for dma_op_mode

In reply to Tony Lindgren

From: Peter Ujfalusi <[email protected]>

The use of the spin lock, which supposed to protect the the dma_op_mode causing "INFO: inconsistent lock state" on playback start.
Remove the spin locks around the dma_op_mode, when it's purpuse is to protect the dma_op_mode.

---
 arch/arm/plat-omap/mcbsp.c |    6 ------
 1 files changed, 0 insertions(+), 6 deletions(-)
arch/arm/plat-omap/mcbsp.c +0 -6
index 9277033..2cc1cc3 100644
@@ -298,9 +298,7 @@ int omap_mcbsp_get_dma_op_mode(unsigned int id)
 	}
 	mcbsp = id_to_mcbsp_ptr(id);
 
-	spin_lock_irq(&mcbsp->lock);
 	dma_op_mode = mcbsp->dma_op_mode;
-	spin_unlock_irq(&mcbsp->lock);
 
 	return dma_op_mode;
 }
@@ -318,7 +316,6 @@ static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
 		syscon = OMAP_MCBSP_READ(mcbsp->io_base, SYSCON);
 		syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03) | CLOCKACTIVITY(0x03));
 
-		spin_lock_irq(&mcbsp->lock);
 		if (mcbsp->dma_op_mode == MCBSP_DMA_MODE_THRESHOLD) {
 			syscon |= (ENAWAKEUP | SIDLEMODE(0x02) |
 					CLOCKACTIVITY(0x02));
@@ -327,7 +324,6 @@ static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
 		} else {
 			syscon |= SIDLEMODE(0x01);
 		}
-		spin_unlock_irq(&mcbsp->lock);
 
 		OMAP_MCBSP_WRITE(mcbsp->io_base, SYSCON, syscon);
 	}
@@ -1145,9 +1141,7 @@ static ssize_t dma_op_mode_show(struct device *dev,
 	ssize_t len = 0;
 	const char * const *s;
 
-	spin_lock_irq(&mcbsp->lock);
 	dma_op_mode = mcbsp->dma_op_mode;
-	spin_unlock_irq(&mcbsp->lock);
 
 	for (s = &dma_op_modes[i]; i < ARRAY_SIZE(dma_op_modes); s++, i++) {
 		if (dma_op_mode == i)
author maintainer
#7 lore raw

PATCH 7/14 omap3630: Add HSMMC related checks

In reply to Tony Lindgren

From: Madhu <[email protected]>

Change the cpu_is_omap3430() check to cpu_is_omap34xx() to allow HSMMC1/2 mux configuration for omap3630.

---
 arch/arm/mach-omap2/devices.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-omap2/devices.c +1 -1
index 7d4513b..8d23e1f 100644
@@ -575,7 +575,7 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
 		}
 	}
 
-	if (cpu_is_omap3430()) {
+	if (cpu_is_omap34xx()) {
 		if (controller_nr == 0) {
 			omap_cfg_reg(N28_3430_MMC1_CLK);
 			omap_cfg_reg(M27_3430_MMC1_CMD);
author maintainer
#8 lore raw

PATCH 8/14 omap3630: Configure HSMMC1 to 4-bit

In reply to Tony Lindgren

From: Madhu <[email protected]>

The HSMMC1 controller on omap3630 supprts only 4-bit mode. If cpu is 3630 configure HSMMC1 wires to 4-bit.

---
 arch/arm/mach-omap2/mmc-twl4030.c |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/mmc-twl4030.c +6 -0
index 3403914..7bef170 100644
@@ -489,6 +489,12 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
 			/* on-chip level shifting via PBIAS0/PBIAS1 */
 			mmc->slots[0].set_power = twl_mmc1_set_power;
 			mmc->slots[0].set_sleep = twl_mmc1_set_sleep;
+
+			/* Omap3630 HSMMC1 supports only 4-bit */
+			if (cpu_is_omap3630() && c->wires > 4) {
+				c->wires = 4;
+				mmc->slots[0].wires = c->wires;
+			}
 			break;
 		case 2:
 			if (c->ext_clock)
author maintainer
#9 lore raw

PATCH 9/14 omap3630: Set omap3630 MMC1 I/O speed to 52Mhz

In reply to Tony Lindgren

From: Madhu <[email protected]>

The speed ctrl bit for MMC I/O is part of CONTROL_PROG_IO1 register in omap3630.This patch sets it up accordingly.

---
 arch/arm/mach-omap2/mmc-twl4030.c         |   11 +++++++++--
 arch/arm/plat-omap/include/plat/control.h |    3 +++
 2 files changed, 12 insertions(+), 2 deletions(-)
arch/arm/mach-omap2/mmc-twl4030.c +9 -2
index 7bef170..0c3c72d 100644
@@ -213,7 +213,7 @@ static int twl4030_mmc_get_context_loss(struct device *dev)
 static int twl_mmc1_set_power(struct device *dev, int slot, int power_on,
 				int vdd)
 {
-	u32 reg;
+	u32 reg, prog_io;
 	int ret = 0;
 	struct twl_mmc_controller *c = &hsmmc[0];
 	struct omap_mmc_platform_data *mmc = dev->platform_data;
@@ -245,7 +245,14 @@ static int twl_mmc1_set_power(struct device *dev, int slot, int power_on,
 		}
 
 		reg = omap_ctrl_readl(control_pbias_offset);
-		reg |= OMAP2_PBIASSPEEDCTRL0;
+		if (cpu_is_omap3630()) {
+			/* Set MMC I/O to 52Mhz */
+			prog_io = omap_ctrl_readl(OMAP343X_CONTROL_PROG_IO1);
+			prog_io |= OMAP3630_PRG_SDMMC1_SPEEDCTRL;
+			omap_ctrl_writel(prog_io, OMAP343X_CONTROL_PROG_IO1);
+		} else {
+			reg |= OMAP2_PBIASSPEEDCTRL0;
+		}
 		reg &= ~OMAP2_PBIASLITEPWRDNZ0;
 		omap_ctrl_writel(reg, control_pbias_offset);
 
arch/arm/plat-omap/include/plat/control.h +3 -0
index 79985e4..2ae8843 100644
@@ -241,6 +241,9 @@
 #define OMAP2_PBIASLITEPWRDNZ0		(1 << 1)
 #define OMAP2_PBIASLITEVMODE0		(1 << 0)
 
+/* CONTROL_PROG_IO1 bits */
+#define OMAP3630_PRG_SDMMC1_SPEEDCTRL	(1 << 20)
+
 /* CONTROL_IVA2_BOOTMOD bits */
 #define OMAP3_IVA2_BOOTMOD_SHIFT	0
 #define OMAP3_IVA2_BOOTMOD_MASK		(0xf << 0)
author maintainer
#10 lore raw

PATCH 10/14 omap3: HSMMC2 8-bit mux configuration

In reply to Tony Lindgren

From: Madhu <[email protected]>

Add support for omap hsmmc2 8-bit mux configuration.

---
 arch/arm/mach-omap2/devices.c         |    6 ++++++
 arch/arm/mach-omap2/mux.c             |    8 ++++++++
 arch/arm/plat-omap/include/plat/mux.h |    4 ++++
 3 files changed, 18 insertions(+), 0 deletions(-)
arch/arm/mach-omap2/devices.c +6 -0
index 8d23e1f..8b6cd8c 100644
@@ -609,6 +609,12 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
 				omap_cfg_reg(AG4_3430_MMC2_DAT2);
 				omap_cfg_reg(AF4_3430_MMC2_DAT3);
 			}
+			if (mmc_controller->slots[0].wires == 8) {
+				omap_cfg_reg(AE4_3430_MMC2_DAT4);
+				omap_cfg_reg(AH3_3430_MMC2_DAT5);
+				omap_cfg_reg(AF3_3430_MMC2_DAT6);
+				omap_cfg_reg(AE3_3430_MMC2_DAT7);
+			}
 		}
 
 		/*
arch/arm/mach-omap2/mux.c +8 -0
index 32c953e..83256d3 100644
@@ -532,6 +532,14 @@ MUX_CFG_34XX("AG4_3430_MMC2_DAT2", 0x160,
 		OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
 MUX_CFG_34XX("AF4_3430_MMC2_DAT3", 0x162,
 		OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AE4_3430_MMC2_DAT4", 0x164,
+		OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AH3_3430_MMC2_DAT5", 0x166,
+		OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AF3_3430_MMC2_DAT6", 0x168,
+		OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AE3_3430_MMC2_DAT7", 0x16A,
+		OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
 
 /* MMC3 */
 MUX_CFG_34XX("AF10_3430_MMC3_CLK", 0x5d8,
arch/arm/plat-omap/include/plat/mux.h +4 -0
index 56e357e..f74331d 100644
@@ -834,6 +834,10 @@ enum omap34xx_index {
 	AH4_3430_MMC2_DAT1,
 	AG4_3430_MMC2_DAT2,
 	AF4_3430_MMC2_DAT3,
+	AE4_3430_MMC2_DAT4,
+	AH3_3430_MMC2_DAT5,
+	AF3_3430_MMC2_DAT6,
+	AE3_3430_MMC2_DAT7,
 
 	/* MMC3 */
 	AF10_3430_MMC3_CLK,
author maintainer
#11 lore raw

PATCH 11/14 omap3: evm: make HSMMC driver built-in

In reply to Tony Lindgren

From: Sriram <[email protected]>

For ease of use it is preferrable to build in HSMMC driver rather than build it as kernel module. This patches updates default configuration for omap3evm to reflect this change.

---
 arch/arm/configs/omap3_evm_defconfig |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/configs/omap3_evm_defconfig +1 -1
index d5ff477..36c99e0 100644
@@ -1126,7 +1126,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y
 #
 # CONFIG_MMC_SDHCI is not set
 # CONFIG_MMC_OMAP is not set
-CONFIG_MMC_OMAP_HS=m
+CONFIG_MMC_OMAP_HS=y
 # CONFIG_MMC_SPI is not set
 # CONFIG_MEMSTICK is not set
 # CONFIG_ACCESSIBILITY is not set
author maintainer
#12 lore raw

PATCH 12/14 omap3: move check_revision above check_features

In reply to Tony Lindgren

From: Tony Lindgren <Menon>

omap3_check_revision() does not depend on omap3_check_features() move this above so that we can add logic based on revision detected in check_features.

---
 arch/arm/mach-omap2/id.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-omap2/id.c +1 -1
index 441ca26..6c11b41 100644
@@ -352,8 +352,8 @@ void __init omap2_check_revision(void)
 	if (cpu_is_omap24xx())
 		omap24xx_check_revision();
 	else if (cpu_is_omap34xx()) {
-		omap3_check_features();
 		omap3_check_revision();
+		omap3_check_features();
 		omap3_cpuinfo();
 	}
 	else if (cpu_is_omap44xx()) {
author maintainer
#14 lore raw

PATCH 13/14 omap3: keep SoC features on the same line

In reply to Tony Lindgren

From: Kevin Hilman <[email protected]>

When listing the various SoC features, print them on the same line. So, instead of this

OMAP3430/3530 ES3.1
- l2cache : Y
- iva : Y
- sgx : Y
- neon : Y
- isp : Y

you get this:

OMAP3430/3530 ES3.1 (l2cache iva sgx neon isp )

---
 arch/arm/mach-omap2/id.c |   11 +++++------
 1 files changed, 5 insertions(+), 6 deletions(-)
arch/arm/mach-omap2/id.c +5 -6
index 6c11b41..4984660 100644
@@ -257,11 +257,8 @@ void __init omap3_check_revision(void)
 }
 
 #define OMAP3_SHOW_FEATURE(feat)		\
-	if (omap3_has_ ##feat()) {		\
-		pr_info (" - "#feat" : Y");	\
-	} else {				\
-		pr_info (" - "#feat" : N");	\
-	}
+	if (omap3_has_ ##feat())		\
+		printk(#feat" ");
 
 void __init omap3_cpuinfo(void)
 {
@@ -331,13 +328,15 @@ void __init omap3_cpuinfo(void)
 	/*
 	 * Print verbose information
 	 */
-	pr_info("%s ES%s\n", cpu_name, cpu_rev);
+	pr_info("%s ES%s (", cpu_name, cpu_rev);
 
 	OMAP3_SHOW_FEATURE(l2cache);
 	OMAP3_SHOW_FEATURE(iva);
 	OMAP3_SHOW_FEATURE(sgx);
 	OMAP3_SHOW_FEATURE(neon);
 	OMAP3_SHOW_FEATURE(isp);
+
+	printk(")\n");
 }
 
 /*
author maintainer
#15 lore raw

PATCH 14/14 omap3: drop all IVA-related address base definitions

In reply to Tony Lindgren

From: Paul Walmsley <[email protected]>

All of the OMAP3 IVA physical address macros in
plat-omap/include/plat/omap34xx.h are wrong[1]:

OMAP34XX_IVA_INTC_BASE: The IVA interrupt controller does not appear to be accessible from the L3 interconnect, and in any case is definitely not at 0x40000000; the latter address appears to be the internal IVA physical address base for the OMAP2420's interrupt control[2].

OMAP34XX_DSP_BASE: The section of L3 physical address space mapped to the IVA starts at 0x5c000000, not 0x58000000.

OMAP34XX_DSP_MEM_BASE: It's not clear what this refers to, but it's not in the L3 IVA address space.

OMAP34XX_DSP_IPI_BASE: The Intrusive Port Interface is a relic from the OMAP2420 days and no longer applies to OMAP3.

OMAP34XX_DSP_MMU_BASE: The DSP MMU is mapped at 0x5d000000, not 0x5a000000.

Nothing that uses these can possibly be working, so drop them. When future code needs these, correct versions can be added in.

1. OMAP34xx Multimedia Device Silicon Revision 3.1.x Rev. W, Table 2-8:
"L3 Interconnect View of the IVA2.2 Subsystem Memory Space." p. 229.

2. OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (Rev. Q), section 2.2.4.1, "IVA Memory Space Seen by L3", p. 132.

3. ibid., section 4.3.11, "DSP IPI Overview", p. 200.

---
 arch/arm/plat-omap/include/plat/omap34xx.h |    5 -----
 1 files changed, 0 insertions(+), 5 deletions(-)
arch/arm/plat-omap/include/plat/omap34xx.h +0 -5
index 4655707..077f059 100644
@@ -72,7 +72,6 @@
 #define OMAP3430_ISP_CSI2A_END		(OMAP3430_ISP_CSI2A_BASE   + 0x16F)
 #define OMAP3430_ISP_CSI2PHY_END	(OMAP3430_ISP_CSI2PHY_BASE + 0x007)
 
-#define OMAP34XX_IVA_INTC_BASE	0x40000000
 #define OMAP34XX_HSUSB_OTG_BASE	(L4_34XX_BASE + 0xAB000)
 #define OMAP34XX_USBTLL_BASE	(L4_34XX_BASE + 0x62000)
 #define OMAP34XX_UHH_CONFIG_BASE	(L4_34XX_BASE + 0x64000)
@@ -83,9 +82,5 @@
 
 #define OMAP34XX_MAILBOX_BASE		(L4_34XX_BASE + 0x94000)
 
-#define OMAP34XX_DSP_BASE	0x58000000
-#define OMAP34XX_DSP_MEM_BASE	(OMAP34XX_DSP_BASE + 0x0)
-#define OMAP34XX_DSP_IPI_BASE	(OMAP34XX_DSP_BASE + 0x1000000)
-#define OMAP34XX_DSP_MMU_BASE	(OMAP34XX_DSP_BASE + 0x2000000)
 #endif /* __ASM_ARCH_OMAP34XX_H */
 
author maintainer
#13 lore raw

PATCH 12/14 omap3: move check_revision above check_features, v2

In reply to Tony Lindgren
Quoted 1 line · Tony Lindgren

From: Tony Lindgren <Menon>

Looks like the From: got messed up. Here's a fixed version.

Tony