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boot fix for 2.6.33 for parisc

PATCH New Kyle McMartin 1 participant 1 message Feb 24, 2010 PA-RISC architecture

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PATCH 1/1 boot fix for 2.6.33 for parisc

Hi Linus, please pull the following change for parisc to fix and issue which prevents Linux from booting. (Short summary: PCI CLS was being set from the default by the PCI layer *after* fixups, which meant sym2 fixups had an unset PCI CLS, which meant we couldn't find the root disk.)

regards, Kyle

The following changes since commit 75ef7cdda2daa35be9e070ac8e5258759ac03d06:
Linus Torvalds (1):

        Merge git://git.kernel.org/.../davem/net-2.6

are available in the git repository at:

master.kernel.org:/pub/scm/linux/kernel/git/kyle/parisc-2.6.git urgent

Carlos O'Donell (1):
parisc: Set PCI CLS early in boot.

 arch/parisc/kernel/pci.c |    7 +++++--
 1 files changed, 5 insertions(+), 2 deletions(-)
arch/parisc/kernel/pci.c +5 -2
index f7064ab..9e74bfe 100644
@@ -18,7 +18,6 @@
 
 #include <asm/io.h>
 #include <asm/system.h>
-#include <asm/cache.h>		/* for L1_CACHE_BYTES */
 #include <asm/superio.h>
 
 #define DEBUG_RESOURCES 0
@@ -123,6 +122,10 @@ static int __init pcibios_init(void)
 	} else {
 		printk(KERN_WARNING "pci_bios != NULL but init() is!\n");
 	}
+
+	/* Set the CLS for PCI as early as possible. */
+	pci_cache_line_size = pci_dfl_cache_line_size;
+
 	return 0;
 }
 
@@ -171,7 +174,7 @@ void pcibios_set_master(struct pci_dev *dev)
 	** upper byte is PCI_LATENCY_TIMER.
 	*/
 	pci_write_config_word(dev, PCI_CACHE_LINE_SIZE,
-				(0x80 << 8) | (L1_CACHE_BYTES / sizeof(u32)));
+			      (0x80 << 8) | pci_cache_line_size);
 }