Samsung SoCs: OneNAND support
Subsystems (3)
PATCH 1/1 Samsung SoCs: OneNAND support
Samsung SoCs, s5pc6442, s5pc100, and s5pc110 has own OneNAND controller
Signed-off-by Kyungmin Park <[email protected]>
---
arch/arm/plat-samsung/include/plat/regs-onenand.h new file +75 -0
@@ -0,0 +1,75 @@ +/* +* linux/arch/arm/plat-samsung/include/plat/regs-onenand.h +* +* Copyright (C) 2008-2010 Samsung Electronics +* Kyungmin Park <[email protected]> +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +*/ +#ifndef __SAMSUNG_ONENAND_H__ +#define __SAMSUNG_ONENAND_H__ + +#include <mach/hardware.h> + +/* +* OneNAND Controller +*/ +#define S3C64XX_ONENAND0_BASE 0x70100000 +#define S3C64XX_ONENAND1_BASE 0x70200000 +#define S5PC100_ONENAND_BASE 0xE7100000 +#define S5PC110_ONENAND_BASE 0xB0000000 + +#ifdef CONFIG_ARCH_S3C64XX +#define SAMSUNG_ONENAND_BASE S3C64XX_ONENAND0_BASE +#endif +#if defined(CONFIG_ARCH_S5PC1XX ) || defined(CONFIG_ARCH_S5PV210 ) +#define SAMSUNG_ONENAND_BASE S5PC100_ONENAND_BASE +#endif + +#define MEM_CFG_OFFSET 0x0000 +#define BURST_LEN_OFFSET 0x0010 +#define MEM_RESET_OFFSET 0x0020 +#define INT_ERR_STAT_OFFSET 0x0030 +#define INT_ERR_MASK_OFFSET 0x0040 +#define INT_ERR_ACK_OFFSET 0x0050 +#define ECC_ERR_STAT_OFFSET 0x0060 +#define MANUFACT_ID_OFFSET 0x0070 +#define DEVICE_ID_OFFSET 0x0080 +#define DATA_BUF_SIZE_OFFSET 0x0090 +#define BOOT_BUF_SIZE_OFFSET 0x00A0 +#define BUF_AMOUNT_OFFSET 0x00B0 +#define TECH_OFFSET 0x00C0 +#define FBA_WIDTH_OFFSET 0x00D0 +#define FPA_WIDTH_OFFSET 0x00E0 +#define FSA_WIDTH_OFFSET 0x00F0 +#define TRANS_SPARE_OFFSET 0x0140 +#define DBS_DFS_WIDTH_OFFSET 0x0160 +#define INT_PIN_ENABLE_OFFSET 0x01A0 +#define ACC_CLOCK_OFFSET 0x01C0 +#define FLASH_VER_ID_OFFSET 0x01F0 +#define FLASH_AUX_CNTRL_OFFSET 0x0300/* s3c64xx only */ + +#define ONENAND_MEM_RESET_HOT 0x3 +#define ONENAND_MEM_RESET_COLD 0x2 +#define ONENAND_MEM_RESET_WARM 0x1 + +#define CACHE_OP_ERR (1 << 13) +#define RST_CMP (1 << 12) +#define RDY_ACT (1 << 11) +#define INT_ACT (1 << 10) +#define UNSUP_CMD (1 << 9) +#define LOCKED_BLK (1 << 8) +#define BLK_RW_CMP (1 << 7) +#define ERS_CMP (1 << 6) +#define PGM_CMP (1 << 5) +#define LOAD_CMP (1 << 4) +#define ERS_FAIL (1 << 3) +#define PGM_FAIL (1 << 2) +#define INT_TO (1 << 1) +#define LD_FAIL_ECC_ERR (1 << 0) + +#define TSRF (1 << 0) + +#endif
drivers/mtd/onenand/Kconfig +8 -0
@@ -30,6 +30,14 @@ config MTD_ONENAND_OMAP2 Support for a OneNAND flash device connected to an OMAP2/OMAP3 CPU via the GPMC memory controller. +config MTD_ONENAND_SAMSUNG + tristate "OneNAND on Samsung SOC controller support" + depends on MTD_ONENAND && (ARCH_S3C64XX || ARCH_S5PC1XX || ARCH_S5PV210 || ARCH_S5P6442) + help + Support for a OneNAND flash device connected to an Samsung SOC + S3C64XX/S5PC1XX/S5P64XX controller. + + config MTD_ONENAND_OTP bool "OneNAND OTP Support" select HAVE_MTD_OTP
drivers/mtd/onenand/Makefile +1 -0
@@ -8,6 +8,7 @@ obj-$(CONFIG_MTD_ONENAND) += onenand.o # Board specific. obj-$(CONFIG_MTD_ONENAND_GENERIC) += generic.o obj-$(CONFIG_MTD_ONENAND_OMAP2) += omap2.o +obj-$(CONFIG_MTD_ONENAND_SAMSUNG) += samsung.o # Simulator obj-$(CONFIG_MTD_ONENAND_SIM) += onenand_sim.o
drivers/mtd/onenand/samsung.c new file +992 -0
992 lines not on this page · raw message
Quoted 3 lines · Kyungmin Park
Samsung SoCs, s5pc6442, s5pc100, and s5pc110 has own OneNAND controller
Signed-off-by Kyungmin Park <[email protected]>
It's probably worth pointing out that this depends on the previously posted addition of cpu_is_() for the Samsung CPUs which Ben hasn't applied - the merge at least will need to be coordinated with that.