Nested Virtualization: svm specific implementation
PATCH 11/15 Nested Virtualization: svm specific implementation
Signed-off-by Christoph Egger <[email protected]>
Signature · 6 lines
---to satisfy European Law for business letters: Advanced Micro Devices GmbH Einsteinring 24, 85609 Dornach b. Muenchen Geschaeftsfuehrer: Andrew Bowd, Thomas M. McCoy, Giuliano Meroni Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632
# HG changeset patch
# User cegger
# Date 1275580729 -7200
Implement SVM specific part for Nested Virtualization.
xen/arch/x86/hvm/svm/emulate.c +11 -1
@@ -100,6 +100,11 @@ MAKE_INSTR(VMCALL, 3, 0x0f, 0x01, 0xd9);MAKE_INSTR (HLT ,1 ,0xf4 );MAKE_INSTR (INT3 ,1 ,0xcc );MAKE_INSTR (RDTSC ,2 ,0x0f ,0x31 ); +MAKE_INSTR (VMRUN ,3 ,0x0f ,0x01 ,0xd8 ); +MAKE_INSTR (VMLOAD ,3 ,0x0f ,0x01 ,0xda ); +MAKE_INSTR (VMSAVE ,3 ,0x0f ,0x01 ,0xdb ); +MAKE_INSTR (STGI ,3 ,0x0f ,0x01 ,0xdc ); +MAKE_INSTR (CLGI ,3 ,0x0f ,0x01 ,0xdd );static const u8 *opc_bytes[INSTR_MAX_COUNT ] = {
@@ -111,7 +116,12 @@ static const u8 *opc_bytes[INSTR_MAX_COU [INSTR_VMCALL] = OPCODE_VMCALL, [INSTR_HLT] = OPCODE_HLT, [INSTR_INT3] = OPCODE_INT3, - [INSTR_RDTSC] = OPCODE_RDTSC + [INSTR_RDTSC] = OPCODE_RDTSC, + [INSTR_VMRUN] = OPCODE_VMRUN, + [INSTR_VMLOAD] = OPCODE_VMLOAD, + [INSTR_VMSAVE] = OPCODE_VMSAVE, + [INSTR_STGI] = OPCODE_STGI, + [INSTR_CLGI] = OPCODE_CLGI, };static int fetch (struct vcpu *v,u8 *buf,unsigned long addr,int len)
xen/arch/x86/hvm/svm/svm.c +841 -16
961 lines not on this page · raw message
xen/include/asm-x86/hvm/svm/emulate.h +5 -0
@@ -31,6 +31,11 @@ enum instruction_index {INSTR_HLT ,INSTR_INT3 ,INSTR_RDTSC , +INSTR_VMRUN , +INSTR_VMLOAD , +INSTR_VMSAVE , +INSTR_STGI , +INSTR_CLGI ,INSTR_MAX_COUNT /* Must be last - Number of instructions supported */ };
_______________________________________________
Xen-devel mailing list
[email protected]
http://lists.xensource.com/xen-devel