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Linking some code to internal SRAM instead of SDRAM

U-Boot Alexander Stein 2 participants 3 messages Jun 16, 2010

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Alexander Stein

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#0 lore raw

Hello,

I have an at91 based board which starts from NOR flash. I have an ugly workaround in lowlevel_init.S that switching from slowclock to PLLA is done from the internal SRAM instead directly from NOR which is not possible as the NOR flash timing are also affected. So i copied some data around using existing an new labels.
A new approach would be to link lowlevel_init directly at 0x00200000 (which is AT91SAM9260_SRAM0_BASE) but the code is located next to the "normal" .text segment. I've prepared a change to cpu/arm926ejs/u-boot.lds (I know it's still 2010.3 but that shouldn't matter now) which links lowlevel_init to 0x00200000. I added the symbols __lowlevel_init_start and __lowlevel_init_end to be used to copy the function from it's LMA to it's VMA address.
I'm rather unsure if this will work as I thought, Of course more has to be done, like
* Make SRAM address configureable
* Only link to this if CONFIG_SKIP_LOWLEVEL_INIT is not defined
* Maybe create a region for that
* ...
Any opinions, hints, more elegant methods?

cpu/arm926ejs/u-boot.lds +0 -0
index ee5eeb5..c368822 100644
@@ -32,9 +32,16 @@ SECTIONS

	.text :
	{
		cpu/arm926ejs/start.o   (.text)

+ *(EXCLUDE_FILE(*lowlevel_init.o) .text)
+ }
+ __lowlevel_init_start = .;
+ .lowlevel_init 0x00200000 : AT ( ADDR (.text) + SIZEOF (.text) )

+	{
		*(.text)
	}

+ __lowlevel_init_end = .;

+	. = ADDR (.text) + SIZEOF (.text) + SIZEOF(.lowlevel_init);
	. = ALIGN(4);
	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }

Best regards
Alexander

#1 lore raw

Dear Alexander Stein,

Quoted 14 lines · In message <[email protected]> you wrote:

A new approach would be to link lowlevel_init directly at 0x00200000 (which is AT91SAM9260_SRAM0_BASE) but the code is located next to the "normal" .text segment. I've prepared a change to cpu/arm926ejs/u-boot.lds (I know it's still 2010.3 but that shouldn't matter now) which links lowlevel_init to 0x00200000. I added the symbols __lowlevel_init_start and __lowlevel_init_end to be used to copy the function from it's LMA to it's VMA address.
I'm rather unsure if this will work as I thought, Of course more has to be done, like
* Make SRAM address configureable
* Only link to this if CONFIG_SKIP_LOWLEVEL_INIT is not defined
* Maybe create a region for that
* ...
Any opinions, hints, more elegant methods?

Who loads the code to SRAM?

Best regards,

Wolfgang Denk

Signature · 5 lines
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
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and wrong.                                               - Mark Twain
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#2 lore raw

Dear Wolfgang,

Am Mittwoch, 16. Juni 2010 14:56:31 schrieb Wolfgang Denk:

Quoted 15 lines
Quoted 6 lines

A new approach would be to link lowlevel_init directly at 0x00200000 (which is AT91SAM9260_SRAM0_BASE) but the code is located next to the "normal" .text segment. I've prepared a change to cpu/arm926ejs/u-boot.lds (I know it's still 2010.3 but that shouldn't matter now) which links lowlevel_init to 0x00200000. I added the symbols __lowlevel_init_start and __lowlevel_init_end to be used to copy the

Quoted 8 lines

function from it's LMA to it's VMA address.
I'm rather unsure if this will work as I thought, Of course more has to be done, like
* Make SRAM address configureable
* Only link to this if CONFIG_SKIP_LOWLEVEL_INIT is not defined
* Maybe create a region for that
* ...
Any opinions, hints, more elegant methods?

Quoted 1 line

Who loads the code to SRAM?

This code has to be added before bl here:
start.S:165-167

Quoted 3 lines

#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif

As start.S is generic to arm926ejs there have to be an extra #ifdef or something.

Best regards,
Alexander