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sched: add new 'book' scheduling domain

PATCH In review Heiko Carstens 2 participants 10 messages Aug 31, 2010 – Sep 9, 2010

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#0 lore raw

v2 cover sched: add new 'book' scheduling domain

This patch set adds (yet) another scheduling domain to the scheduler. The reason for this is that the recent (s390) z196 architecture has four cache levels and uniform memory access (sort of -- see below).
The cpu/cache/memory hierarchy is as follows:

Each cpu has its private L1 (64KB I-cache + 128KB D-cache) and L2 (1.5MB) cache.
A core consists of four cpus with a 24MB shared L3 cache.
A book consists of six cores with a 192MB shared L4 cache.

The z196 architecture has no SMT.
Also the statement that we have uniform memory access is not entirely correct. Actually the machine uses memory striping, so it "looks" like we have UMA until the next slice of memory gets accessed. However there is no interface which tells us which piece of memory is local or remote. So we (have to) simplify and assume that the cost of each memory access with L4 cache miss is the same.

In order to somehow use the information about the cache hierarchy so that the scheduler can make some decisions that improves cache hits I added the 'BOOK' scheduling domain between the MC and CPU domains.

Also please note that the s390 arch scheduling domain initializers need tuning:
The line
#define SD_BOOK_INIT SD_CPU_INIT
within the arch support patch is just there so it compiles and until we have something that really works.

Changes since V1:

Removed powersavings sysfs knob for the new scheduling domain since Peter objected to it ;)
Actually adding a third sysfs powersavings knob would increase the config space to 27 possible settings. That's simply too much and indeed no admin would care about fine tuning that.
What is needed is a single knob which configures the scheduler to do the 'right thing'.
It's up to the powersavings guys to come up with a viable solution here ;)

#1 lore raw

PATCH v2 1/4 sched: merge cpu_to_core_group functions

From: Heiko Carstens <[email protected]>

Merge and simplify the two cpu_to_core_group variants so that the resulting function follows the same pattern like cpu_to_phys_group.

---

 kernel/sched.c |   18 +++++-------------
 1 file changed, 5 insertions(+), 13 deletions(-)
kernel/sched.c +5 -13
diff -urpN linux-2.6/kernel/sched.c linux-2.6-patched/kernel/sched.c
@@ -6554,31 +6554,23 @@ cpu_to_cpu_group(int cpu, const struct c
 #ifdef CONFIG_SCHED_MC
 static DEFINE_PER_CPU(struct static_sched_domain, core_domains);
 static DEFINE_PER_CPU(struct static_sched_group, sched_group_core);
-#endif /* CONFIG_SCHED_MC */
 
-#if defined(CONFIG_SCHED_MC) && defined(CONFIG_SCHED_SMT)
 static int
 cpu_to_core_group(int cpu, const struct cpumask *cpu_map,
 		  struct sched_group **sg, struct cpumask *mask)
 {
 	int group;
-
+#ifdef CONFIG_SCHED_SMT
 	cpumask_and(mask, topology_thread_cpumask(cpu), cpu_map);
 	group = cpumask_first(mask);
+#else
+	group = cpu;
+#endif
 	if (sg)
 		*sg = &per_cpu(sched_group_core, group).sg;
 	return group;
 }
-#elif defined(CONFIG_SCHED_MC)
-static int
-cpu_to_core_group(int cpu, const struct cpumask *cpu_map,
-		  struct sched_group **sg, struct cpumask *unused)
-{
-	if (sg)
-		*sg = &per_cpu(sched_group_core, cpu).sg;
-	return cpu;
-}
-#endif
+#endif /* CONFIG_SCHED_MC */
 
 static DEFINE_PER_CPU(struct static_sched_domain, phys_domains);
 static DEFINE_PER_CPU(struct static_sched_group, sched_group_phys);
#2 lore raw

[tip:sched/core] sched: Merge cpu_to_core_group functions

Commit-ID:  f269893c575167447cc9f6d1867e639fb5b6f0c5
Gitweb:     http://git.kernel.org/tip/f269893c575167447cc9f6d1867e639fb5b6f0c5
Author:     Heiko Carstens <[email protected]>
AuthorDate: Tue, 31 Aug 2010 10:28:15 +0200
Committer:  Ingo Molnar <[email protected]>
CommitDate: Thu, 9 Sep 2010 20:41:18 +0200

sched: Merge cpu_to_core_group functions

Merge and simplify the two cpu_to_core_group variants so that the resulting function follows the same pattern like cpu_to_phys_group.

LKML-Reference: <[email protected]>

---
 kernel/sched.c |   18 +++++-------------
 1 files changed, 5 insertions(+), 13 deletions(-)
kernel/sched.c +5 -13
index 8eef8e5..1a0c084 100644
@@ -6552,31 +6552,23 @@ cpu_to_cpu_group(int cpu, const struct cpumask *cpu_map,
 #ifdef CONFIG_SCHED_MC
 static DEFINE_PER_CPU(struct static_sched_domain, core_domains);
 static DEFINE_PER_CPU(struct static_sched_group, sched_group_core);
-#endif /* CONFIG_SCHED_MC */
 
-#if defined(CONFIG_SCHED_MC) && defined(CONFIG_SCHED_SMT)
 static int
 cpu_to_core_group(int cpu, const struct cpumask *cpu_map,
 		  struct sched_group **sg, struct cpumask *mask)
 {
 	int group;
-
+#ifdef CONFIG_SCHED_SMT
 	cpumask_and(mask, topology_thread_cpumask(cpu), cpu_map);
 	group = cpumask_first(mask);
+#else
+	group = cpu;
+#endif
 	if (sg)
 		*sg = &per_cpu(sched_group_core, group).sg;
 	return group;
 }
-#elif defined(CONFIG_SCHED_MC)
-static int
-cpu_to_core_group(int cpu, const struct cpumask *cpu_map,
-		  struct sched_group **sg, struct cpumask *unused)
-{
-	if (sg)
-		*sg = &per_cpu(sched_group_core, cpu).sg;
-	return cpu;
-}
-#endif
+#endif /* CONFIG_SCHED_MC */
 
 static DEFINE_PER_CPU(struct static_sched_domain, phys_domains);
 static DEFINE_PER_CPU(struct static_sched_group, sched_group_phys);
#3 lore raw

PATCH v2 2/4 sched: add book scheduling domain

In reply to Heiko Carstens

From: Heiko Carstens <[email protected]>

On top of the SMT and MC scheduling domains this adds the BOOK scheduling domain. This is useful for NUMA like machines which do not have an interface which tells which piece of memory is attached to which node or where the hardware performs striping.

---

 include/linux/sched.h    |    1 
 include/linux/topology.h |    6 +++
 kernel/sched.c           |   77 +++++++++++++++++++++++++++++++++++++++++++++--
 3 files changed, 82 insertions(+), 2 deletions(-)
include/linux/sched.h +1 -0
@@ -875,6 +875,7 @@ enum sched_domain_level {
 	SD_LV_NONE = 0,
 	SD_LV_SIBLING,
 	SD_LV_MC,
+	SD_LV_BOOK,
 	SD_LV_CPU,
 	SD_LV_NODE,
 	SD_LV_ALLNODES,
include/linux/topology.h +6 -0
@@ -201,6 +201,12 @@ int arch_update_cpu_topology(void);
 	.balance_interval	= 64,					\
 }
 
+#ifdef CONFIG_SCHED_BOOK
+#ifndef SD_BOOK_INIT
+#error Please define an appropriate SD_BOOK_INIT in include/asm/topology.h!!!
+#endif
+#endif /* CONFIG_SCHED_BOOK */
+
 #ifdef CONFIG_NUMA
 #ifndef SD_NODE_INIT
 #error Please define an appropriate SD_NODE_INIT in include/asm/topology.h!!!
kernel/sched.c +75 -2

156 lines not on this page · raw message

#4 lore raw

[tip:sched/core] sched: Add book scheduling domain

Commit-ID:  01a08546af311c065f34727787dd0cc8dc0c216f
Gitweb:     http://git.kernel.org/tip/01a08546af311c065f34727787dd0cc8dc0c216f
Author:     Heiko Carstens <[email protected]>
AuthorDate: Tue, 31 Aug 2010 10:28:16 +0200
Committer:  Ingo Molnar <[email protected]>
CommitDate: Thu, 9 Sep 2010 20:41:20 +0200

sched: Add book scheduling domain

On top of the SMT and MC scheduling domains this adds the BOOK scheduling domain. This is useful for NUMA like machines which do not have an interface which tells which piece of memory is attached to which node or where the hardware performs striping.

LKML-Reference: <[email protected]>

---
 include/linux/sched.h    |    1 +
 include/linux/topology.h |    6 +++
 kernel/sched.c           |   77 ++++++++++++++++++++++++++++++++++++++++++++-
 3 files changed, 82 insertions(+), 2 deletions(-)
include/linux/sched.h +1 -0
index 1e2a6db..b51c53c 100644
@@ -875,6 +875,7 @@ enum sched_domain_level {
 	SD_LV_NONE = 0,
 	SD_LV_SIBLING,
 	SD_LV_MC,
+	SD_LV_BOOK,
 	SD_LV_CPU,
 	SD_LV_NODE,
 	SD_LV_ALLNODES,
include/linux/topology.h +6 -0
index 64e084f..b91a40e 100644
@@ -201,6 +201,12 @@ int arch_update_cpu_topology(void);
 	.balance_interval	= 64,					\
 }
 
+#ifdef CONFIG_SCHED_BOOK
+#ifndef SD_BOOK_INIT
+#error Please define an appropriate SD_BOOK_INIT in include/asm/topology.h!!!
+#endif
+#endif /* CONFIG_SCHED_BOOK */
+
 #ifdef CONFIG_NUMA
 #ifndef SD_NODE_INIT
 #error Please define an appropriate SD_NODE_INIT in include/asm/topology.h!!!
kernel/sched.c +75 -2

156 lines not on this page · raw message

#5 lore raw

PATCH v2 3/4 topology/sysfs: provide book id and siblings attributes

In reply to Heiko Carstens

From: Heiko Carstens <[email protected]>

Create attributes /sys/devices/system/cpu/cpuX/topology/book_id /sys/devices/system/cpu/cpuX/topology/book_siblings which show the book id and the book siblings of a cpu.

Unlike the attributes for SMT and MC these attributes are only present if CONFIG_SCHED_BOOK is set. There is no reason to pollute sysfs for every architecture with unused attributes.

---

 Documentation/cputopology.txt |   23 ++++++++++++++++++++---
 drivers/base/topology.c       |   16 +++++++++++++++-
 2 files changed, 35 insertions(+), 4 deletions(-)
Documentation/cputopology.txt +20 -3
diff -urpN linux-2.6/Documentation/cputopology.txt linux-2.6-patched/Documentation/cputopology.txt
@@ -14,25 +14,39 @@ to /proc/cpuinfo.
 	identifier (rather than the kernel's).  The actual value is
 	architecture and platform dependent.
 
-3) /sys/devices/system/cpu/cpuX/topology/thread_siblings:
+3) /sys/devices/system/cpu/cpuX/topology/book_id:
+
+	the book ID of cpuX. Typically it is the hardware platform's
+	identifier (rather than the kernel's).	The actual value is
+	architecture and platform dependent.
+
+4) /sys/devices/system/cpu/cpuX/topology/thread_siblings:
 
 	internel kernel map of cpuX's hardware threads within the same
 	core as cpuX
 
-4) /sys/devices/system/cpu/cpuX/topology/core_siblings:
+5) /sys/devices/system/cpu/cpuX/topology/core_siblings:
 
 	internal kernel map of cpuX's hardware threads within the same
 	physical_package_id.
 
+6) /sys/devices/system/cpu/cpuX/topology/book_siblings:
+
+	internal kernel map of cpuX's hardware threads within the same
+	book_id.
+
 To implement it in an architecture-neutral way, a new source file,
-drivers/base/topology.c, is to export the 4 attributes.
+drivers/base/topology.c, is to export the 4 or 6 attributes. The two book
+related sysfs files will only be created if CONFIG_SCHED_BOOK is selected.
 
 For an architecture to support this feature, it must define some of
 these macros in include/asm-XXX/topology.h:
 #define topology_physical_package_id(cpu)
 #define topology_core_id(cpu)
+#define topology_book_id(cpu)
 #define topology_thread_cpumask(cpu)
 #define topology_core_cpumask(cpu)
+#define topology_book_cpumask(cpu)
 
 The type of **_id is int.
 The type of siblings is (const) struct cpumask *.
@@ -45,6 +59,9 @@ not defined by include/asm-XXX/topology.
 3) thread_siblings: just the given CPU
 4) core_siblings: just the given CPU
 
+For architectures that don't support books (CONFIG_SCHED_BOOK) there are no
+default definitions for topology_book_id() and topology_book_cpumask().
+
 Additionally, CPU topology information is provided under
 /sys/devices/system/cpu and includes these files.  The internal
 source for the output is in brackets ("[]").
drivers/base/topology.c +15 -1
diff -urpN linux-2.6/drivers/base/topology.c linux-2.6-patched/drivers/base/topology.c
@@ -45,7 +45,8 @@ static ssize_t show_##name(struct sys_de
 	return sprintf(buf, "%d\n", topology_##name(cpu));	\
 }
 
-#if defined(topology_thread_cpumask) || defined(topology_core_cpumask)
+#if defined(topology_thread_cpumask) || defined(topology_core_cpumask) || \
+    defined(topology_book_cpumask)
 static ssize_t show_cpumap(int type, const struct cpumask *mask, char *buf)
 {
 	ptrdiff_t len = PTR_ALIGN(buf + PAGE_SIZE - 1, PAGE_SIZE) - buf;
@@ -114,6 +115,14 @@ define_siblings_show_func(core_cpumask);
 define_one_ro_named(core_siblings, show_core_cpumask);
 define_one_ro_named(core_siblings_list, show_core_cpumask_list);
 
+#ifdef CONFIG_SCHED_BOOK
+define_id_show_func(book_id);
+define_one_ro(book_id);
+define_siblings_show_func(book_cpumask);
+define_one_ro_named(book_siblings, show_book_cpumask);
+define_one_ro_named(book_siblings_list, show_book_cpumask_list);
+#endif
+
 static struct attribute *default_attrs[] = {
 	&attr_physical_package_id.attr,
 	&attr_core_id.attr,
@@ -121,6 +130,11 @@ static struct attribute *default_attrs[]
 	&attr_thread_siblings_list.attr,
 	&attr_core_siblings.attr,
 	&attr_core_siblings_list.attr,
+#ifdef CONFIG_SCHED_BOOK
+	&attr_book_id.attr,
+	&attr_book_siblings.attr,
+	&attr_book_siblings_list.attr,
+#endif
 	NULL
 };
 
#6 lore raw

[tip:sched/core] topology/sysfs: Provide book id and siblings attributes

Commit-ID:  b40d8ed4e42c79f8ed1cf345eed0888f4a2f0678
Gitweb:     http://git.kernel.org/tip/b40d8ed4e42c79f8ed1cf345eed0888f4a2f0678
Author:     Heiko Carstens <[email protected]>
AuthorDate: Tue, 31 Aug 2010 10:28:17 +0200
Committer:  Ingo Molnar <[email protected]>
CommitDate: Thu, 9 Sep 2010 20:41:25 +0200

topology/sysfs: Provide book id and siblings attributes

Create attributes:

/sys/devices/system/cpu/cpuX/topology/book_id /sys/devices/system/cpu/cpuX/topology/book_siblings

which show the book id and the book siblings of a cpu.

Unlike the attributes for SMT and MC these attributes are only present if CONFIG_SCHED_BOOK is set. There is no reason to pollute sysfs for every architecture with unused attributes.

LKML-Reference: <[email protected]>

---
 Documentation/cputopology.txt |   23 ++++++++++++++++++++---
 drivers/base/topology.c       |   16 +++++++++++++++-
 2 files changed, 35 insertions(+), 4 deletions(-)
Documentation/cputopology.txt +20 -3
index f1c5c4b..902d315 100644
@@ -14,25 +14,39 @@ to /proc/cpuinfo.
 	identifier (rather than the kernel's).  The actual value is
 	architecture and platform dependent.
 
-3) /sys/devices/system/cpu/cpuX/topology/thread_siblings:
+3) /sys/devices/system/cpu/cpuX/topology/book_id:
+
+	the book ID of cpuX. Typically it is the hardware platform's
+	identifier (rather than the kernel's).	The actual value is
+	architecture and platform dependent.
+
+4) /sys/devices/system/cpu/cpuX/topology/thread_siblings:
 
 	internel kernel map of cpuX's hardware threads within the same
 	core as cpuX
 
-4) /sys/devices/system/cpu/cpuX/topology/core_siblings:
+5) /sys/devices/system/cpu/cpuX/topology/core_siblings:
 
 	internal kernel map of cpuX's hardware threads within the same
 	physical_package_id.
 
+6) /sys/devices/system/cpu/cpuX/topology/book_siblings:
+
+	internal kernel map of cpuX's hardware threads within the same
+	book_id.
+
 To implement it in an architecture-neutral way, a new source file,
-drivers/base/topology.c, is to export the 4 attributes.
+drivers/base/topology.c, is to export the 4 or 6 attributes. The two book
+related sysfs files will only be created if CONFIG_SCHED_BOOK is selected.
 
 For an architecture to support this feature, it must define some of
 these macros in include/asm-XXX/topology.h:
 #define topology_physical_package_id(cpu)
 #define topology_core_id(cpu)
+#define topology_book_id(cpu)
 #define topology_thread_cpumask(cpu)
 #define topology_core_cpumask(cpu)
+#define topology_book_cpumask(cpu)
 
 The type of **_id is int.
 The type of siblings is (const) struct cpumask *.
@@ -45,6 +59,9 @@ not defined by include/asm-XXX/topology.h:
 3) thread_siblings: just the given CPU
 4) core_siblings: just the given CPU
 
+For architectures that don't support books (CONFIG_SCHED_BOOK) there are no
+default definitions for topology_book_id() and topology_book_cpumask().
+
 Additionally, CPU topology information is provided under
 /sys/devices/system/cpu and includes these files.  The internal
 source for the output is in brackets ("[]").
drivers/base/topology.c +15 -1
index 9fc630c..f6f37a0 100644
@@ -45,7 +45,8 @@ static ssize_t show_##name(struct sys_device *dev,		\
 	return sprintf(buf, "%d\n", topology_##name(cpu));	\
 }
 
-#if defined(topology_thread_cpumask) || defined(topology_core_cpumask)
+#if defined(topology_thread_cpumask) || defined(topology_core_cpumask) || \
+    defined(topology_book_cpumask)
 static ssize_t show_cpumap(int type, const struct cpumask *mask, char *buf)
 {
 	ptrdiff_t len = PTR_ALIGN(buf + PAGE_SIZE - 1, PAGE_SIZE) - buf;
@@ -114,6 +115,14 @@ define_siblings_show_func(core_cpumask);
 define_one_ro_named(core_siblings, show_core_cpumask);
 define_one_ro_named(core_siblings_list, show_core_cpumask_list);
 
+#ifdef CONFIG_SCHED_BOOK
+define_id_show_func(book_id);
+define_one_ro(book_id);
+define_siblings_show_func(book_cpumask);
+define_one_ro_named(book_siblings, show_book_cpumask);
+define_one_ro_named(book_siblings_list, show_book_cpumask_list);
+#endif
+
 static struct attribute *default_attrs[] = {
 	&attr_physical_package_id.attr,
 	&attr_core_id.attr,
@@ -121,6 +130,11 @@ static struct attribute *default_attrs[] = {
 	&attr_thread_siblings_list.attr,
 	&attr_core_siblings.attr,
 	&attr_core_siblings_list.attr,
+#ifdef CONFIG_SCHED_BOOK
+	&attr_book_id.attr,
+	&attr_book_siblings.attr,
+	&attr_book_siblings_list.attr,
+#endif
 	NULL
 };
 
#7 lore raw

PATCH v2 4/4 topology: add z11 cpu topology support

In reply to Heiko Carstens

From: Heiko Carstens <[email protected]>

Use the extended cpu topology information that z11 machines provide to improve the scheduler's decision making.

---

 arch/s390/Kconfig                |    7 +
 arch/s390/include/asm/topology.h |   27 +++++--
 arch/s390/kernel/topology.c      |  150 ++++++++++++++++++++++++---------------
 3 files changed, 123 insertions(+), 61 deletions(-)
arch/s390/include/asm/topology.h +23 -4
@@ -3,15 +3,32 @@
 
 #include <linux/cpumask.h>
 
-#define mc_capable()	(1)
-
-const struct cpumask *cpu_coregroup_mask(unsigned int cpu);
-
 extern unsigned char cpu_core_id[NR_CPUS];
 extern cpumask_t cpu_core_map[NR_CPUS];
 
+static inline const struct cpumask *cpu_coregroup_mask(unsigned int cpu)
+{
+	return &cpu_core_map[cpu];
+}
+
 #define topology_core_id(cpu)		(cpu_core_id[cpu])
 #define topology_core_cpumask(cpu)	(&cpu_core_map[cpu])
+#define mc_capable()			(1)
+
+#ifdef CONFIG_SCHED_BOOK
+
+extern unsigned char cpu_book_id[NR_CPUS];
+extern cpumask_t cpu_book_map[NR_CPUS];
+
+static inline const struct cpumask *cpu_book_mask(unsigned int cpu)
+{
+	return &cpu_book_map[cpu];
+}
+
+#define topology_book_id(cpu)		(cpu_book_id[cpu])
+#define topology_book_cpumask(cpu)	(&cpu_book_map[cpu])
+
+#endif /* CONFIG_SCHED_BOOK */
 
 int topology_set_cpu_management(int fc);
 void topology_schedule_update(void);
@@ -30,6 +47,8 @@ static inline void s390_init_cpu_topolog
 };
 #endif
 
+#define SD_BOOK_INIT	SD_CPU_INIT
+
 #include <asm-generic/topology.h>
 
 #endif /* _ASM_S390_TOPOLOGY_H */
arch/s390/Kconfig +7 -0
@@ -198,6 +198,13 @@ config HOTPLUG_CPU
 	  can be controlled through /sys/devices/system/cpu/cpu#.
 	  Say N if you want to disable CPU hotplug.
 
+config SCHED_BOOK
+	bool "Book scheduler support"
+	depends on SMP
+	help
+	  Book scheduler support improves the CPU scheduler's decision making
+	  when dealing with machines that have several books.
+
 config MATHEMU
 	bool "IEEE FPU emulation"
 	depends on MARCH_G5
arch/s390/kernel/topology.c +93 -57

252 lines not on this page · raw message

#8 lore raw

[tip:sched/core] topology, s390: Add z11 cpu topology support

Commit-ID:  4cb14bc8c54f8489251d5cba8328cb410ead0cea
Gitweb:     http://git.kernel.org/tip/4cb14bc8c54f8489251d5cba8328cb410ead0cea
Author:     Heiko Carstens <[email protected]>
AuthorDate: Tue, 31 Aug 2010 10:28:18 +0200
Committer:  Ingo Molnar <[email protected]>
CommitDate: Thu, 9 Sep 2010 20:41:55 +0200

topology, s390: Add z11 cpu topology support

Use the extended cpu topology information that z11 machines provide to improve the scheduler's decision making.

LKML-Reference: <[email protected]>

---
 arch/s390/Kconfig                |    7 ++
 arch/s390/include/asm/topology.h |   27 ++++++-
 arch/s390/kernel/topology.c      |  150 +++++++++++++++++++++++--------------
 3 files changed, 123 insertions(+), 61 deletions(-)
arch/s390/Kconfig +7 -0
index f0777a4..74a2f1b 100644
@@ -198,6 +198,13 @@ config HOTPLUG_CPU
 	  can be controlled through /sys/devices/system/cpu/cpu#.
 	  Say N if you want to disable CPU hotplug.
 
+config SCHED_BOOK
+	bool "Book scheduler support"
+	depends on SMP
+	help
+	  Book scheduler support improves the CPU scheduler's decision making
+	  when dealing with machines that have several books.
+
 config MATHEMU
 	bool "IEEE FPU emulation"
 	depends on MARCH_G5
arch/s390/include/asm/topology.h +23 -4
index 831bd03..051107a 100644
@@ -3,15 +3,32 @@
 
 #include <linux/cpumask.h>
 
-#define mc_capable()	(1)
-
-const struct cpumask *cpu_coregroup_mask(unsigned int cpu);
-
 extern unsigned char cpu_core_id[NR_CPUS];
 extern cpumask_t cpu_core_map[NR_CPUS];
 
+static inline const struct cpumask *cpu_coregroup_mask(unsigned int cpu)
+{
+	return &cpu_core_map[cpu];
+}
+
 #define topology_core_id(cpu)		(cpu_core_id[cpu])
 #define topology_core_cpumask(cpu)	(&cpu_core_map[cpu])
+#define mc_capable()			(1)
+
+#ifdef CONFIG_SCHED_BOOK
+
+extern unsigned char cpu_book_id[NR_CPUS];
+extern cpumask_t cpu_book_map[NR_CPUS];
+
+static inline const struct cpumask *cpu_book_mask(unsigned int cpu)
+{
+	return &cpu_book_map[cpu];
+}
+
+#define topology_book_id(cpu)		(cpu_book_id[cpu])
+#define topology_book_cpumask(cpu)	(&cpu_book_map[cpu])
+
+#endif /* CONFIG_SCHED_BOOK */
 
 int topology_set_cpu_management(int fc);
 void topology_schedule_update(void);
@@ -30,6 +47,8 @@ static inline void s390_init_cpu_topology(void)
 };
 #endif
 
+#define SD_BOOK_INIT	SD_CPU_INIT
+
 #include <asm-generic/topology.h>
 
 #endif /* _ASM_S390_TOPOLOGY_H */
arch/s390/kernel/topology.c +93 -57

252 lines not on this page · raw message

maintainer
#9 lore raw
In reply to Heiko Carstens
Quoted 18 lines · Heiko Carstens

This patch set adds (yet) another scheduling domain to the scheduler. The reason for this is that the recent (s390) z196 architecture has four cache levels and uniform memory access (sort of -- see below).
The cpu/cache/memory hierarchy is as follows:

Each cpu has its private L1 (64KB I-cache + 128KB D-cache) and L2 (1.5MB) cache.
A core consists of four cpus with a 24MB shared L3 cache.
A book consists of six cores with a 192MB shared L4 cache.

The z196 architecture has no SMT.
Also the statement that we have uniform memory access is not entirely correct. Actually the machine uses memory striping, so it "looks" like we have UMA until the next slice of memory gets accessed. However there is no interface which tells us which piece of memory is local or remote. So we (have to) simplify and assume that the cost of each memory access with L4 cache miss is the same.

Quoted 3 lines

In order to somehow use the information about the cache hierarchy so that the scheduler can make some decisions that improves cache hits I added the 'BOOK' scheduling domain between the MC and CPU domains.

Took the patches, but the description of the main patch is a bit wanting, it implies books are useful for NUMA like things when there isn't any information on where the node boundaries are, which isn't what you say here, which is that a book is the L4 cache level.

<rant>
Ideally we'd kill all the sd->level stuff and rework the domain creation like outlined before and simply go by sd->flags domain properties. At that point you can simply tag this as yet another cache level. </rant>