ARM: add support for QQ2440 board

From: Domenico Andreoli <[email protected]>

Add core architecture support for QQ2440.

Signed-off-by Domenico Andreoli <[email protected]>

Index: arm-2.6.git/arch/arm/mach-s3c2440/mach-qq2440.c
===================================================================

arch/arm/mach-s3c2440/mach-qq2440.c new file +76 -0

@@ -0,0 +1,358 @@
+/* linux/arch/arm/mach-s3c2440/mach-qq2440.c
+ *
+ * Copyright (c) 2011 Domenico Andreoli <[email protected]>
+ *      Based on mach-mini2440.c by Ramax Lo <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/gpio.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/serial_core.h>
+#include <linux/i2c/at24.h>
+#include <linux/platform_device.h>
+#include <linux/gpio_keys.h>
+#include <linux/i2c.h>
+#include <linux/mmc/host.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <mach/hardware.h>
+#include <asm/mach-types.h>
+
+#include <plat/regs-serial.h>
+#include <mach/regs-gpio.h>
+#include <mach/leds-gpio.h>
+#include <mach/regs-mem.h>
+#include <mach/irqs.h>
+#include <plat/nand.h>
+#include <plat/iic.h>
+#include <plat/mci.h>
+#include <plat/udc.h>
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/nand_ecc.h>
+#include <linux/mtd/partitions.h>
+
+#include <plat/gpio-cfg.h>
+#include <plat/clock.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+
+#include <sound/s3c24xx_uda134x.h>
+
+static struct map_desc qq2440_iodesc[] __initdata = {
+	/* nothing to declare, move along */
+};
+
+#define UCON S3C2410_UCON_DEFAULT
+#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
+#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
+
+static struct s3c2410_uartcfg qq2440_uartcfgs[] __initdata = {
+	[0] = {
+	       .hwport = 0,
+	       .flags = 0,
+	       .ucon = UCON,
+	       .ulcon = ULCON,
+	       .ufcon = UFCON,
+	       },
+	[1] = {
+	       .hwport = 1,
+	       .flags = 0,
+	       .ucon = UCON,
+	       .ulcon = ULCON,

arch/arm/mach-s3c2440/mach-qq2440.c new file +53 -0

+
+/* UDC */
+
+static void qq2440_udc_pullup(enum s3c2410_udc_cmd_e cmd)
+{
+	pr_debug("udc: pullup(%d)\n", cmd);
+
+	switch (cmd) {
+	case S3C2410_UDC_P_ENABLE:
+		gpio_set_value(S3C2410_GPG(12), 1);
+		break;
+	case S3C2410_UDC_P_DISABLE:
+		gpio_set_value(S3C2410_GPG(12), 0);
+		break;
+	case S3C2410_UDC_P_RESET:
+		break;
+	default:
+		break;
+	}
+}
+
+static struct s3c2410_udc_mach_info qq2440_udc_cfg __initdata = {
+	.udc_command = qq2440_udc_pullup,
+};
+
+/* MMC/SD  */
+
+static struct s3c24xx_mci_pdata qq2440_mmc_cfg __initdata = {
+	.gpio_detect = S3C2410_GPG(8),
+	.gpio_wprotect = S3C2410_GPH(8),
+	.set_power = NULL,
+	.ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34,
+};
+
+/* NAND */
+
+static struct mtd_partition qq2440_default_nand_part[] __initdata = {
+	[0] = {
+	       .name = "vivi",
+	       .size = SZ_128K,
+	       .offset = 0,
+	       },
+	[1] = {
+	       .name = "eboot",
+	       .size = SZ_128K,
+	       .offset = SZ_128K,
+	       },
+	[2] = {
+	       .name = "param",
+	       .size = SZ_64K,
+	       .offset = SZ_256K,
+	       },
+	[3] = {

arch/arm/mach-s3c2440/mach-qq2440.c new file +175 -0

+
+static struct s3c2410_nand_set qq2440_nand_sets[] __initdata = {
+	[0] = {
+	       .name = "nand",
+	       .nr_chips = 1,
+	       .nr_partitions = ARRAY_SIZE(qq2440_default_nand_part),
+	       .partitions = qq2440_default_nand_part,
+	       },
+};
+
+static struct s3c2410_platform_nand qq2440_nand_info __initdata = {
+	.tacls = 0,
+	.twrph0 = 25,
+	.twrph1 = 15,
+	.nr_sets = ARRAY_SIZE(qq2440_nand_sets),
+	.sets = qq2440_nand_sets,
+	.ignore_unset_ecc = 1,
+};
+
+/* KEYS */
+
+static struct gpio_keys_button qq2440_buttons[] = {
+	{
+	 .gpio = S3C2410_GPG(11),   /* K1 */
+	 .code = KEY_F1,
+	 .desc = "Button 1",
+	 .active_low = 1,
+	 },
+	{
+	 .gpio = S3C2410_GPG(3),    /* K2 */
+	 .code = KEY_F2,
+	 .desc = "Button 2",
+	 .active_low = 1,
+	 },
+	{
+	 .gpio = S3C2410_GPF(2),    /* K3 */
+	 .code = KEY_F3,
+	 .desc = "Button 3",
+	 .active_low = 1,
+	 },
+	{
+	 .gpio = S3C2410_GPF(0),    /* K4 */
+	 .code = KEY_F4,
+	 .desc = "Button 4",
+	 .active_low = 1,
+	 },
+};
+
+static struct gpio_keys_platform_data qq2440_button_data = {
+	.buttons = qq2440_buttons,
+	.nbuttons = ARRAY_SIZE(qq2440_buttons),
+};
+
+static struct platform_device qq2440_button_device = {
+	.name = "gpio-keys",
+	.id = -1,
+	.dev = {
+		.platform_data = &qq2440_button_data,
+		}
+};
+
+/* LEDS */
+
+static struct s3c24xx_led_platdata qq2440_led1_pdata = {
+	.name = "led1",
+	.gpio = S3C2410_GPB(5),
+	.flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
+	.def_trigger = "heartbeat",
+};
+
+static struct s3c24xx_led_platdata qq2440_led2_pdata = {
+	.name = "led2",
+	.gpio = S3C2410_GPB(6),
+	.flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
+	.def_trigger = "nand-disk",
+};
+
+static struct s3c24xx_led_platdata qq2440_led3_pdata = {
+	.name = "led3",
+	.gpio = S3C2410_GPB(7),
+	.flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
+	.def_trigger = "mmc0",
+};
+
+static struct s3c24xx_led_platdata qq2440_led4_pdata = {
+	.name = "led4",
+	.gpio = S3C2410_GPB(8),
+	.flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
+	.def_trigger = "",
+};
+
+static struct platform_device qq2440_led1 = {
+	.name = "s3c24xx_led",
+	.id = 1,
+	.dev = {
+		.platform_data = &qq2440_led1_pdata,
+		},
+};
+
+static struct platform_device qq2440_led2 = {
+	.name = "s3c24xx_led",
+	.id = 2,
+	.dev = {
+		.platform_data = &qq2440_led2_pdata,
+		},
+};
+
+static struct platform_device qq2440_led3 = {
+	.name = "s3c24xx_led",
+	.id = 3,
+	.dev = {
+		.platform_data = &qq2440_led3_pdata,
+		},
+};
+
+static struct platform_device qq2440_led4 = {
+	.name = "s3c24xx_led",
+	.id = 4,
+	.dev = {
+		.platform_data = &qq2440_led4_pdata,
+		},
+};
+
+/* AUDIO */
+
+static struct s3c24xx_uda134x_platform_data qq2440_audio_pins = {
+	.l3_clk   = S3C2410_GPB(4),
+	.l3_mode  = S3C2410_GPB(2),
+	.l3_data  = S3C2410_GPB(3),
+	.model    = UDA134X_UDA1341
+};
+
+static struct platform_device qq2440_audio = {
+	.name = "s3c24xx_uda134x",
+	.id = 0,
+	.dev = {
+		.platform_data = &qq2440_audio_pins,
+		},
+};
+
+/* I2C */
+
+static struct at24_platform_data at24c08 = {
+	.byte_len = SZ_8K / 8,
+	.page_size = 16,
+};
+
+static struct i2c_board_info qq2440_i2c_devs[] __initdata = {
+	{
+	 I2C_BOARD_INFO("24c08", 0x50),
+	 .platform_data = &at24c08,
+	 },
+};
+
+static struct platform_device *qq2440_devices[] __initdata = {
+	&s3c_device_ohci,
+	&s3c_device_wdt,
+	&s3c_device_i2c0,
+	&s3c_device_rtc,
+	&s3c_device_usbgadget,
+	&qq2440_led1,
+	&qq2440_led2,
+	&qq2440_led3,
+	&qq2440_led4,
+	&qq2440_button_device,
+	&s3c_device_nand,
+	&s3c_device_sdi,
+	&s3c_device_iis,
+	&qq2440_audio,
+};
+
+static void __init qq2440_map_io(void)
+{
+	s3c24xx_init_io(qq2440_iodesc, ARRAY_SIZE(qq2440_iodesc));
+	s3c24xx_init_clocks(12000000);

arch/arm/mach-s3c2440/mach-qq2440.c new file +24 -0

+
+	/* mark the key as input, without pullups (there is one on the board) */
+	for (i = 0; i < ARRAY_SIZE(qq2440_buttons); i++) {
+		s3c_gpio_setpull(qq2440_buttons[i].gpio, S3C_GPIO_PULL_UP);
+		s3c_gpio_cfgpin(qq2440_buttons[i].gpio, S3C2410_GPIO_INPUT);
+	}
+
+	s3c24xx_udc_set_platdata(&qq2440_udc_cfg);
+	s3c24xx_mci_set_platdata(&qq2440_mmc_cfg);
+	s3c_nand_set_platdata(&qq2440_nand_info);
+	s3c_i2c0_set_platdata(NULL);
+
+	i2c_register_board_info(0, qq2440_i2c_devs, ARRAY_SIZE(qq2440_i2c_devs));
+
+	platform_add_devices(qq2440_devices, ARRAY_SIZE(qq2440_devices));
+}
+
+MACHINE_START(QQ2440, "QQ2440")
+	.boot_params   = S3C2410_SDRAM_PA + 0x100,
+	.map_io        = qq2440_map_io,
+	.init_machine  = qq2440_init,
+	.init_irq      = s3c24xx_init_irq,
+	.timer         = &s3c24xx_timer,
+MACHINE_END

From: Domenico Andreoli <[email protected]>

Add networking support for QQ2440.

Signed-off-by Domenico Andreoli <[email protected]>

---
 arch/arm/mach-s3c2440/include/mach/qq2440.h |   22 ++++++++++++
 arch/arm/mach-s3c2440/mach-qq2440.c         |   16 ++++++++
 drivers/net/Kconfig                         |    4 +-
 drivers/net/cs89x0.c                        |   33 ++++++++++++------
 4 files changed, 61 insertions(+), 14 deletions(-)

Index: arm-2.6.git/arch/arm/mach-s3c2440/include/mach/qq2440.h
===================================================================

arch/arm/mach-s3c2440/include/mach/qq2440.h new file +22 -0

@@ -0,0 +1,22 @@
+/*
+ * arch/arm/mach-s3c2440/include/mach/qq2440.h
+ *
+ * Copyright (c) 2011 Domenico Andreoli <[email protected]>
+ *
+ * QQ2440 - platform definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_MACH_QQ2440_H
+#define __ASM_MACH_QQ2440_H
+
+#define QQ2440_CS8900_IRQ         IRQ_EINT9
+
+#define QQ2440_CS8900_VIRT_BASE   S3C_ADDR(0x00500000)
+#define QQ2440_CS8900_PA          (S3C2410_CS3 + 0x1000000)
+#define QQ2440_CS8900_SZ          SZ_1M
+
+#endif /* __ASM_MACH_QQ2440_H */

Index: arm-2.6.git/drivers/net/cs89x0.c
===================================================================

drivers/net/cs89x0.c +3 -0

@@ -95,6 +95,9 @@
   Dmitry Pervushin  : dpervushin at ru.mvista.com
                     : PNX010X platform support
 
+  Domenico Andreoli : cavokz at gmail.com
+                    : QQ2440 platform support
+
 */
 
 /* Always include 'config.h' first in case the user wants to turn on

drivers/net/cs89x0.c +10 -2

 /*
   Sources:

@@ -173,6 +176,10 @@
 #if defined(CONFIG_MACH_IXDP2351)
 static unsigned int netcard_portlist[] __used __initdata = {IXDP2351_VIRT_CS8900_BASE, 0};
 static unsigned int cs8900_irq_map[] = {IRQ_IXDP2351_CS8900, 0, 0, 0};
+#elif defined(CONFIG_MACH_QQ2440)
+#include <mach/qq2440.h>
+static unsigned int netcard_portlist[] __used __initdata = {QQ2440_CS8900_VIRT_BASE + 0x300, 0};
+static unsigned int cs8900_irq_map[] = {QQ2440_CS8900_IRQ, 0, 0, 0};
 #elif defined(CONFIG_ARCH_IXDP2X01)
 static unsigned int netcard_portlist[] __used __initdata = {IXDP2X01_CS8900_VIRT_BASE, 0};
 static unsigned int cs8900_irq_map[] = {IRQ_IXDP2X01_CS8900, 0, 0, 0};

@@ -521,6 +528,10 @@
 #endif
 		lp->force = g_cs89x0_media__force;
 #endif
+
+#if defined(CONFIG_MACH_QQ2440)
+		lp->force |= FORCE_RJ45 | FORCE_FULL;
+#endif
         }
 
 	/* Grab the region so we can find another board if autoIRQ fails. */

@@ -608,7 +619,7 @@
 		        dev->dev_addr[i*2+1] = Addr >> 8;
 		}
 
-	   	/* Load the Adapter Configuration.
+		/* Load the Adapter Configuration.
 		   Note:  Barring any more specific information from some
 		   other source (ie EEPROM+Schematics), we would not know
 		   how to operate a 10Base2 interface on the AUI port.

@@ -655,7 +666,7 @@
 	if ((readreg(dev, PP_SelfST) & EEPROM_PRESENT) == 0)
 		printk(KERN_WARNING "cs89x0: No EEPROM, relying on command line....\n");
 	else if (get_eeprom_data(dev, START_EEPROM_DATA,CHKSUM_LEN,eeprom_buff) < 0) {
-		printk(KERN_WARNING "\ncs89x0: EEPROM read failed, relying on command line.\n");
+		printk(KERN_WARNING "cs89x0: EEPROM read failed, relying on command line.\n");
         } else if (get_eeprom_cksum(START_EEPROM_DATA,CHKSUM_LEN,eeprom_buff) < 0) {
 		/* Check if the chip was able to read its own configuration starting
 		   at 0 in the EEPROM*/

drivers/net/cs89x0.c +7 -7

@@ -943,7 +954,7 @@
 static void __init reset_chip(struct net_device *dev)
 {
 #if !defined(CONFIG_MACH_MX31ADS)
-#if !defined(CONFIG_MACH_IXDP2351) && !defined(CONFIG_ARCH_IXDP2X01)
+#if !defined(CS89x0_NONISA_IRQ)
 	struct net_local *lp = netdev_priv(dev);
 	int ioaddr = dev->base_addr;
 #endif

@@ -954,18 +965,18 @@
 	/* wait 30 ms */
 	msleep(30);
 
-#if !defined(CONFIG_MACH_IXDP2351) && !defined(CONFIG_ARCH_IXDP2X01)
+#if !defined(CS89x0_NONISA_IRQ)
 	if (lp->chip_type != CS8900) {
 		/* Hardware problem requires PNP registers to be reconfigured after a reset */
 		writeword(ioaddr, ADD_PORT, PP_CS8920_ISAINT);
-		outb(dev->irq, ioaddr + DATA_PORT);
-		outb(0,      ioaddr + DATA_PORT + 1);
+		writeword(ioaddr, DATA_PORT, dev->irq);
+		writeword(ioaddr, DATA_PORT + 1, 0);
 
 		writeword(ioaddr, ADD_PORT, PP_CS8920_ISAMemB);
-		outb((dev->mem_start >> 16) & 0xff, ioaddr + DATA_PORT);
-		outb((dev->mem_start >> 8) & 0xff,   ioaddr + DATA_PORT + 1);
+		writeword(ioaddr, DATA_PORT, (dev->mem_start >> 16) & 0xff);
+		writeword(ioaddr, DATA_PORT + 1, (dev->mem_start >> 8) & 0xff);
 	}
-#endif	/* IXDP2x01 */
+#endif
 
 	/* Wait until the chip is reset */
 	reset_start_time = jiffies;

Index: arm-2.6.git/drivers/net/Kconfig
===================================================================

drivers/net/Kconfig +2 -2

@@ -1498,7 +1498,7 @@
 config CS89x0
 	tristate "CS89x0 support"
 	depends on NET_ETHERNET && (ISA || EISA || MACH_IXDP2351 \
-		|| ARCH_IXDP2X01 || MACH_MX31ADS)
+		|| ARCH_IXDP2X01 || MACH_MX31ADS || MACH_QQ2440)
 	---help---
 	  Support for CS89x0 chipset based Ethernet cards. If you have a
 	  network (Ethernet) card of this type, say Y and read the

@@ -1512,7 +1512,7 @@
 config CS89x0_NONISA_IRQ
 	def_bool y
 	depends on CS89x0 != n
-	depends on MACH_IXDP2351 || ARCH_IXDP2X01 || MACH_MX31ADS
+	depends on MACH_IXDP2351 || ARCH_IXDP2X01 || MACH_MX31ADS || MACH_QQ2440
 
 config TC35815
 	tristate "TOSHIBA TC35815 Ethernet support"

Index: arm-2.6.git/arch/arm/mach-s3c2440/mach-qq2440.c
===================================================================

arch/arm/mach-s3c2440/mach-qq2440.c +10 -1

@@ -36,6 +36,7 @@
 #include <mach/leds-gpio.h>
 #include <mach/regs-mem.h>
 #include <mach/irqs.h>
+#include <mach/qq2440.h>
 #include <plat/nand.h>
 #include <plat/iic.h>
 #include <plat/mci.h>

@@ -54,7 +55,12 @@
 #include <sound/s3c24xx_uda134x.h>
 
 static struct map_desc qq2440_iodesc[] __initdata = {
-	/* nothing to declare, move along */
+	{
+		.virtual  = QQ2440_CS8900_VIRT_BASE,
+		.pfn      = __phys_to_pfn(QQ2440_CS8900_PA),
+		.length   = QQ2440_CS8900_SZ,
+		.type     = MT_DEVICE
+	}
 };
 
 #define UCON S3C2410_UCON_DEFAULT

@@ -325,10 +331,18 @@
 	s3c24xx_init_uarts(qq2440_uartcfgs, ARRAY_SIZE(qq2440_uartcfgs));
 }
 
+#define QQ2440_CS8900_BANKCON  (S3C2410_BANKCON_Tacp6 | S3C2410_BANKCON_Tcah4 | S3C2410_BANKCON_Tcoh1 | \
+                                S3C2410_BANKCON_Tacc14 | S3C2410_BANKCON_Tcos4)
+
 static void __init qq2440_init(void)
 {

Hi Domenico,

This should probably also go to the netdev mailing list:
netdev at vger.kernel.org. A couple of other minor comments inline.

Quoted 53 lines

From: Domenico Andreoli <[email protected]>

Add networking support for QQ2440.

Signed-off-by Domenico Andreoli <[email protected]>

---
 arch/arm/mach-s3c2440/include/mach/qq2440.h |   22 ++++++++++++
 arch/arm/mach-s3c2440/mach-qq2440.c         |   16 ++++++++
 drivers/net/Kconfig                         |    4 +-
 drivers/net/cs89x0.c                        |   33 ++++++++++++------
 4 files changed, 61 insertions(+), 14 deletions(-)

Index: arm-2.6.git/arch/arm/mach-s3c2440/include/mach/qq2440.h
===================================================================

arch/arm/mach-s3c2440/include/mach/qq2440.h new file +22 -0

@@ -0,0 +1,22 @@
+/*
+ * arch/arm/mach-s3c2440/include/mach/qq2440.h
+ *
+ * Copyright (c) 2011 Domenico Andreoli <[email protected]>
+ *
+ * QQ2440 - platform definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_MACH_QQ2440_H
+#define __ASM_MACH_QQ2440_H
+
+#define QQ2440_CS8900_IRQ         IRQ_EINT9
+
+#define QQ2440_CS8900_VIRT_BASE   S3C_ADDR(0x00500000)
+#define QQ2440_CS8900_PA          (S3C2410_CS3 + 0x1000000)
+#define QQ2440_CS8900_SZ          SZ_1M
+
+#endif /* __ASM_MACH_QQ2440_H */

Index: arm-2.6.git/drivers/net/cs89x0.c
===================================================================

drivers/net/cs89x0.c +3 -0

@@ -95,6 +95,9 @@
   Dmitry Pervushin  : dpervushin at ru.mvista.com
                     : PNX010X platform support
 
+  Domenico Andreoli : cavokz at gmail.com
+                    : QQ2440 platform support
+
 */
 

drivers/net/cs89x0.c line 123

Quoted 7 lines

drivers/net/cs89x0.c +1 -1

 /* Always include 'config.h' first in case the user wants to turn on

@@ -117,7 +120,7 @@
  * Set this to zero to remove all the debug statements via
  * dead code elimination
  */
-#define DEBUGGING	1
+#define DEBUGGING	0

This is probably best split out as a separate patch.

Quoted 46 lines

drivers/net/cs89x0.c +10 -2

 /*
   Sources:

@@ -173,6 +176,10 @@
 #if defined(CONFIG_MACH_IXDP2351)
 static unsigned int netcard_portlist[] __used __initdata = {IXDP2351_VIRT_CS8900_BASE, 0};
 static unsigned int cs8900_irq_map[] = {IRQ_IXDP2351_CS8900, 0, 0, 0};
+#elif defined(CONFIG_MACH_QQ2440)
+#include <mach/qq2440.h>
+static unsigned int netcard_portlist[] __used __initdata = {QQ2440_CS8900_VIRT_BASE + 0x300, 0};
+static unsigned int cs8900_irq_map[] = {QQ2440_CS8900_IRQ, 0, 0, 0};
 #elif defined(CONFIG_ARCH_IXDP2X01)
 static unsigned int netcard_portlist[] __used __initdata = {IXDP2X01_CS8900_VIRT_BASE, 0};
 static unsigned int cs8900_irq_map[] = {IRQ_IXDP2X01_CS8900, 0, 0, 0};

@@ -521,6 +528,10 @@
 #endif
 		lp->force = g_cs89x0_media__force;
 #endif
+
+#if defined(CONFIG_MACH_QQ2440)
+		lp->force |= FORCE_RJ45 | FORCE_FULL;
+#endif
         }
 
 	/* Grab the region so we can find another board if autoIRQ fails. */

@@ -608,7 +619,7 @@
 		        dev->dev_addr[i*2+1] = Addr >> 8;
 		}
 
-	   	/* Load the Adapter Configuration.
+		/* Load the Adapter Configuration.
 		   Note:  Barring any more specific information from some
 		   other source (ie EEPROM+Schematics), we would not know
 		   how to operate a 10Base2 interface on the AUI port.

@@ -655,7 +666,7 @@
 	if ((readreg(dev, PP_SelfST) & EEPROM_PRESENT) == 0)
 		printk(KERN_WARNING "cs89x0: No EEPROM, relying on command line....\n");
 	else if (get_eeprom_data(dev, START_EEPROM_DATA,CHKSUM_LEN,eeprom_buff) < 0) {
-		printk(KERN_WARNING "\ncs89x0: EEPROM read failed, relying on command line.\n");
+		printk(KERN_WARNING "cs89x0: EEPROM read failed, relying on command line.\n");
         } else if (get_eeprom_cksum(START_EEPROM_DATA,CHKSUM_LEN,eeprom_buff) < 0) {
 		/* Check if the chip was able to read its own configuration starting
 		   at 0 in the EEPROM*/

@@ -709,7 +720,7 @@
         /* FIXME: we don't set the Ethernet address on the command line.  Use
            ifconfig IFACE hw ether AABBCCDDEEFF */
 

drivers/net/cs89x0.c line 726

Quoted 5 lines

drivers/net/cs89x0.c +1 -1

-	printk(KERN_INFO "cs89x0 media %s%s%s",
+	printk(KERN_INFO "cs89x0: media %s%s%s",
 	       (lp->adapter_cnf & A_CNF_10B_T)?"RJ-45,":"",
 	       (lp->adapter_cnf & A_CNF_AUI)?"AUI,":"",
 	       (lp->adapter_cnf & A_CNF_10B_2)?"BNC,":"");

Splitting these cleanups into a cleanup patch would be handly so you can see the real changes easier.

Quoted 93 lines

drivers/net/cs89x0.c +7 -7

@@ -943,7 +954,7 @@
 static void __init reset_chip(struct net_device *dev)
 {
 #if !defined(CONFIG_MACH_MX31ADS)
-#if !defined(CONFIG_MACH_IXDP2351) && !defined(CONFIG_ARCH_IXDP2X01)
+#if !defined(CS89x0_NONISA_IRQ)
 	struct net_local *lp = netdev_priv(dev);
 	int ioaddr = dev->base_addr;
 #endif

@@ -954,18 +965,18 @@
 	/* wait 30 ms */
 	msleep(30);
 
-#if !defined(CONFIG_MACH_IXDP2351) && !defined(CONFIG_ARCH_IXDP2X01)
+#if !defined(CS89x0_NONISA_IRQ)
 	if (lp->chip_type != CS8900) {
 		/* Hardware problem requires PNP registers to be reconfigured after a reset */
 		writeword(ioaddr, ADD_PORT, PP_CS8920_ISAINT);
-		outb(dev->irq, ioaddr + DATA_PORT);
-		outb(0,      ioaddr + DATA_PORT + 1);
+		writeword(ioaddr, DATA_PORT, dev->irq);
+		writeword(ioaddr, DATA_PORT + 1, 0);
 
 		writeword(ioaddr, ADD_PORT, PP_CS8920_ISAMemB);
-		outb((dev->mem_start >> 16) & 0xff, ioaddr + DATA_PORT);
-		outb((dev->mem_start >> 8) & 0xff,   ioaddr + DATA_PORT + 1);
+		writeword(ioaddr, DATA_PORT, (dev->mem_start >> 16) & 0xff);
+		writeword(ioaddr, DATA_PORT + 1, (dev->mem_start >> 8) & 0xff);
 	}
-#endif	/* IXDP2x01 */
+#endif
 
 	/* Wait until the chip is reset */
 	reset_start_time = jiffies;

Index: arm-2.6.git/drivers/net/Kconfig
===================================================================

drivers/net/Kconfig +2 -2

@@ -1498,7 +1498,7 @@
 config CS89x0
 	tristate "CS89x0 support"
 	depends on NET_ETHERNET && (ISA || EISA || MACH_IXDP2351 \
-		|| ARCH_IXDP2X01 || MACH_MX31ADS)
+		|| ARCH_IXDP2X01 || MACH_MX31ADS || MACH_QQ2440)
 	---help---
 	  Support for CS89x0 chipset based Ethernet cards. If you have a
 	  network (Ethernet) card of this type, say Y and read the

@@ -1512,7 +1512,7 @@
 config CS89x0_NONISA_IRQ
 	def_bool y
 	depends on CS89x0 != n
-	depends on MACH_IXDP2351 || ARCH_IXDP2X01 || MACH_MX31ADS
+	depends on MACH_IXDP2351 || ARCH_IXDP2X01 || MACH_MX31ADS || MACH_QQ2440
 
 config TC35815
 	tristate "TOSHIBA TC35815 Ethernet support"

Index: arm-2.6.git/arch/arm/mach-s3c2440/mach-qq2440.c
===================================================================

arch/arm/mach-s3c2440/mach-qq2440.c +10 -1

@@ -36,6 +36,7 @@
 #include <mach/leds-gpio.h>
 #include <mach/regs-mem.h>
 #include <mach/irqs.h>
+#include <mach/qq2440.h>
 #include <plat/nand.h>
 #include <plat/iic.h>
 #include <plat/mci.h>

@@ -54,7 +55,12 @@
 #include <sound/s3c24xx_uda134x.h>
 
 static struct map_desc qq2440_iodesc[] __initdata = {
-	/* nothing to declare, move along */
+	{
+		.virtual  = QQ2440_CS8900_VIRT_BASE,
+		.pfn      = __phys_to_pfn(QQ2440_CS8900_PA),
+		.length   = QQ2440_CS8900_SZ,
+		.type     = MT_DEVICE
+	}
 };
 
 #define UCON S3C2410_UCON_DEFAULT

@@ -325,10 +331,18 @@
 	s3c24xx_init_uarts(qq2440_uartcfgs, ARRAY_SIZE(qq2440_uartcfgs));
 }
 
+#define QQ2440_CS8900_BANKCON  (S3C2410_BANKCON_Tacp6 | S3C2410_BANKCON_Tcah4 | S3C2410_BANKCON_Tcoh1 | \
+                                S3C2410_BANKCON_Tacc14 | S3C2410_BANKCON_Tcos4)
+
 static void __init qq2440_init(void)
 {
 	int i;
 

arch/arm/mach-s3c2440/mach-qq2440.c line 348

Quoted 8 lines

arch/arm/mach-s3c2440/mach-qq2440.c +5 -0

+	/* Ethernet */
+	__raw_writel(__raw_readl(S3C2410_BWSCON) | S3C2410_BWSCON_WS3 | S3C2410_BWSCON_ST3, S3C2410_BWSCON);
+	__raw_writel(QQ2440_CS8900_BANKCON, S3C2410_BANKCON3);
+	set_irq_type(QQ2440_CS8900_IRQ, IRQ_TYPE_EDGE_RISING);
+
 	/* Make sure the D+ pullup pin is output */
 	WARN_ON(gpio_request(S3C2410_GPG(12), "udc pup"));
 	gpio_direction_output(S3C2410_GPG(12), 0);

This arch stuff should really be a separate patch too.

From: Domenico Andreoli <[email protected]>

Add core architecture support for QQ2440.

Signed-off-by Domenico Andreoli <[email protected]>

arch/arm/mach-s3c2440/mach-qq2440.c ? ? 2011-02-02 21:59:39.000000000 +0000 renamed from dev/null ? 1970-01-01 00:00:00.000000000 +0000 +4 -0

+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/

Hi Domenico,

2011/2/3 Domenico Andreoli <[email protected]>:

arch/arm/mach-s3c2440/mach-qq2440.c ? ? 2011-02-02 21:59:39.000000000 +0000 line 5

Quoted 9 lines

arch/arm/mach-s3c2440/mach-qq2440.c ? ? 2011-02-02 21:59:39.000000000 +0000 renamed from dev/null ? 1970-01-01 00:00:00.000000000 +0000 +5 -0

@@ -0,0 +1,358 @@
+/* linux/arch/arm/mach-s3c2440/mach-qq2440.c
+ *
+ * Copyright (c) 2011 Domenico Andreoli <[email protected]>
+ * ? ? ?Based on mach-mini2440.c by Ramax Lo <[email protected]>
+ *

The original author that added mini2440 support is Michel Pollet, not me, although his partial work is based on mine.