ARM: pxa: add clk_set_rate()
Subsystems (4)
A message that is not in the archive (sent off-list or not yet received): 2011040801
PATCH 1/7 ARM: pxa: add clk_set_rate()
Since there're mulitple clock rates in some device controllers, enable clk_set_rate() for this usage.
--- arch/arm/mach-mmp/clock.c | 15 +++++++++++++++ arch/arm/mach-mmp/clock.h | 1 + arch/arm/mach-pxa/clock.c | 15 +++++++++++++++ arch/arm/mach-pxa/clock.h | 1 + 4 files changed, 32 insertions(+), 0 deletions(-)
arch/arm/mach-mmp/clock.c +15 -0
@@ -88,3 +88,18 @@ unsigned long clk_get_rate(struct clk *clk)return rate; }EXPORT_SYMBOL (clk_get_rate); + +int clk_set_rate (struct clk *clk,unsigned long rate) +{ +unsigned long flags; +int ret = -EINVAL ; + +if (clk->ops->setrate) { +spin_lock_irqsave (&clocks_lock, flags); + ret = clk->ops->setrate (clk, rate); +spin_unlock_irqrestore (&clocks_lock, flags); + } + +return ret; +} +EXPORT_SYMBOL (clk_set_rate);
arch/arm/mach-mmp/clock.h +1 -0
@@ -12,6 +12,7 @@ struct clkops {void (*enable)(struct clk *);void (*disable)(struct clk *);unsigned long (*getrate)(struct clk *); +int (*setrate)(struct clk *,unsigned long ); };struct clk {
arch/arm/mach-pxa/clock.c +15 -0
@@ -53,6 +53,21 @@ unsigned long clk_get_rate(struct clk *clk) }EXPORT_SYMBOL (clk_get_rate); +int clk_set_rate (struct clk *clk,unsigned long rate) +{ +unsigned long flags; +int ret = -EINVAL ; + +if (clk->ops->setrate) { +spin_lock_irqsave (&clocks_lock, flags); + ret = clk->ops->setrate (clk, rate); +spin_unlock_irqrestore (&clocks_lock, flags); + } + +return ret; +} +EXPORT_SYMBOL (clk_set_rate); +void clk_dummy_enable (struct clk *clk) { }
arch/arm/mach-pxa/clock.h +1 -0
@@ -5,6 +5,7 @@ struct clkops {void (*enable)(struct clk *);void (*disable)(struct clk *);unsigned long (*getrate)(struct clk *); +int (*setrate)(struct clk *,unsigned long ); };struct clk {
Signature · 1 line
1.5.6.5
PATCH 2/7 ARM: pxa: always clear LPM bits for PXA168 MFPR
Bit[9:7] should always be zero in PXA168.
--- arch/arm/mach-mmp/include/mach/mfp-pxa168.h | 9 +++++++++ 1 files changed, 9 insertions(+), 0 deletions(-)
arch/arm/mach-mmp/include/mach/mfp-pxa168.h +9 -0
@@ -8,6 +8,15 @@#define MFP_DRIVE_MEDIUM (0x2 << 13)#define MFP_DRIVE_FAST (0x3 << 13) +#undef MFP_CFG +#undef MFP_CFG_DRV + +#define MFP_CFG (pin, af) \ + (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_MEDIUM) + +#define MFP_CFG_DRV (pin, af, drv) \ + (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_##drv) +/* GPIO */ #define GPIO0_GPIO MFP_CFG(GPIO0, AF5)#define GPIO1_GPIO MFP_CFG(GPIO1, AF5)
Signature · 1 line
1.5.6.5
PATCH 3/7 ARM: mmp: set correct uart according to board
UART3 is the default console in jasper, brownstone and avengers lite.
--- arch/arm/mach-mmp/include/mach/debug-macro.S | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-)
arch/arm/mach-mmp/include/mach/debug-macro.S +6 -0
@@ -14,8 +14,14 @@ .macro addruart, rp, rv ldr \rp, =APB_PHYS_BASE @ physical ldr \rv, =APB_VIRT_BASE @ virtual +#if defined(CONFIG_MACH_BROWNSTONE) || defined(CONFIG_MACH_MARVELL_JASPER) \ + || defined(CONFIG_MACH_AVENGERS_LITE) + orr \rp, \rp, #0x00018000 + orr \rv, \rv, #0x00018000 +#else orr \rp, \rp, #0x00017000 orr \rv, \rv, #0x00017000 +#endif .endm #define UART_SHIFT 2
Signature · 1 line
1.5.6.5
PATCH 4/7 ARM: mmp: update the reset implementation
Both PXA910 and MMP2 need watchdog reset, so add these features.
--- arch/arm/mach-mmp/Makefile | 2 +- arch/arm/mach-mmp/include/mach/regs-mpmu.h | 52 +++++++++++++ arch/arm/mach-mmp/include/mach/regs-timers.h | 2 + arch/arm/mach-mmp/include/mach/system.h | 8 +-- arch/arm/mach-mmp/reset.c | 100 ++++++++++++++++++++++++++ 5 files changed, 156 insertions(+), 8 deletions(-) create mode 100644 arch/arm/mach-mmp/include/mach/regs-mpmu.h create mode 100644 arch/arm/mach-mmp/reset.c
arch/arm/mach-mmp/Makefile +1 -1
@@ -2,7 +2,7 @@ # Makefile for Marvell's PXA168 processors line # -obj-y += common.o clock.o devices.o time.o +obj-y += common.o clock.o devices.o time.o reset.o # SoC support obj-$(CONFIG_CPU_PXA168) += pxa168.o irq-pxa168.o
arch/arm/mach-mmp/include/mach/regs-mpmu.h new file +52 -0
52 lines not on this page · raw message
arch/arm/mach-mmp/include/mach/regs-timers.h +2 -0
@@ -15,6 +15,8 @@#define TIMERS1_VIRT_BASE (APB_VIRT_BASE + 0x14000)#define TIMERS2_VIRT_BASE (APB_VIRT_BASE + 0x16000) +#define CP_TIMERS2_VIRT_BASE (APB_VIRT_BASE + 0x80000) +#define MMP2_TIMERS2_VIRT_BASE (APB_VIRT_BASE + 0x80000)#define TMR_CCR (0x0000)#define TMR_TN_MM (n, m) (0x0004 + ((n) << 3) + (((n) + (m)) << 2))
arch/arm/mach-mmp/include/mach/system.h +1 -7
@@ -16,11 +16,5 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset (char mode,const char *cmd) -{ -if (cpu_is_pxa168 ()) -cpu_reset (0xffff0000 ); -else -cpu_reset (0 ); -} +extern void arch_reset (char mode,const char *cmd);#endif /* __ASM_MACH_SYSTEM_H */
arch/arm/mach-mmp/reset.c new file +100 -0
100 lines not on this page · raw message
Signature · 1 line
1.5.6.5
PATCH 5/7 ARM: pxa: align NR_BUILTIN_GPIO with GPIO interrupt number
Avoid to mismatch between NR_BUILTIN_GPIO and GPIO interrupt number
--- arch/arm/mach-pxa/include/mach/gpio.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-pxa/include/mach/gpio.h +1 -1
@@ -99,7 +99,7 @@#define GAFR (x) GPIO_REG(0x54 + (((x) & 0x70) >> 2)) -#define NR_BUILTIN_GPIO 128 +#define NR_BUILTIN_GPIO PXA_GPIO_IRQ_NUM#define gpio_to_bank (gpio) ((gpio) >> 5)#define gpio_to_irq (gpio) IRQ_GPIO(gpio)
Signature · 1 line
1.5.6.5
PATCH 6/7 ARM: mmp: align NR_BUILTIN_GPIO with gpio interrupt number
Avoid to mismatch between NR_BUILTIN_GPIO and gpio interrupt number.
--- arch/arm/mach-mmp/include/mach/gpio.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/include/mach/gpio.h +1 -1
@@ -10,7 +10,7 @@#define BANK_OFF (n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))#define GPIO_REG (x) (*((volatile u32 *)(GPIO_REGS_VIRT + (x)))) -#define NR_BUILTIN_GPIO (192) +#define NR_BUILTIN_GPIO IRQ_GPIO_NUM#define gpio_to_bank (gpio) ((gpio) >> 5)#define gpio_to_irq (gpio) (IRQ_GPIO_START + (gpio))
Signature · 1 line
1.5.6.5
PATCH 7/7 ARM: mmp: enable max7312 gpio expander in dkb
Support max7312 gpio expander in TTC DKB.
--- arch/arm/mach-mmp/ttc_dkb.c | 31 ++++++++++++++++++++++++++++++- 1 files changed, 30 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/ttc_dkb.c +30 -1
@@ -15,6 +15,8 @@#include <linux/mtd/partitions.h> #include <linux/mtd/onenand.h> #include <linux/interrupt.h> +#include <linux/gpio.h> +#include <linux/i2c/pca953x.h> #include <asm/mach-types.h> #include <asm/mach/arch.h>
@@ -25,7 +27,17 @@#include "common.h" -#define TTCDKB_NR_IRQS (IRQ_BOARD_START + 24) +#define TTCDKB_GPIO_EXT0 (x) (NR_BUILTIN_GPIO + ((x < 0) ? 0 : \ + ((x < 16) ? x : 15))) +#define TTCDKB_GPIO_EXT1 (x) (NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \ + ((x < 16) ? x : 15))) + +/* +* 16 board interrupts -- MAX7312 GPIO expander +* 16 board interrupts -- PCA9575 GPIO expander +* 24 board interrupts -- 88PM860x PMIC +*/ +#define TTCDKB_NR_IRQS (IRQ_BOARD_START + 16 + 16 + 24)static unsigned long ttc_dkb_pin_config[]__initdata = {/* UART2 */
@@ -113,6 +125,22 @@ static struct platform_device *ttc_dkb_devices[] = { &ttc_dkb_device_onenand, }; +static struct pca953x_platform_data max7312_data[] = { + { + .gpio_base =TTCDKB_GPIO_EXT0 (0 ), + .irq_base =IRQ_BOARD_START , + }, +}; + +static struct i2c_board_info ttc_dkb_i2c_info[] = { + { + .type ="max7312" , + .addr =0x23 , + .irq =IRQ_GPIO (80 ), + .platform_data = &max7312_data, + }, +}; +static void __init ttc_dkb_init (void ) {mfp_config (ARRAY_AND_SIZE (ttc_dkb_pin_config));
@@ -121,6 +149,7 @@ static void __init ttc_dkb_init(void)pxa910_add_uart (1 );/* off-chip devices */ +pxa910_add_twsi (0 ,NULL ,ARRAY_AND_SIZE (ttc_dkb_i2c_info));platform_add_devices (ARRAY_AND_SIZE (ttc_dkb_devices)); }
Signature · 1 line
1.5.6.5
Eric Miao
AppliedPATCH 5/7 ARM: pxa: align NR_BUILTIN_GPIO with GPIO interrupt number
In reply to Haojian ZhuangQuoted 3 lines · Haojian Zhuang
Avoid to mismatch between
NR_BUILTIN_GPIOand GPIO interrupt numberSigned-off-by Haojian Zhuang <[email protected]>
Applied to 'fix'.
Quoted 21 lines
---
?arch/arm/mach-pxa/include/mach/gpio.h | ? ?2 +-
?1 files changed, 1 insertions(+), 1 deletions(-)arch/arm/mach-pxa/include/mach/gpio.h +1
-2@@ -99,7 +99,7 @@ ?#define GAFR(x) ? ? ? ? ? ? ? ?GPIO_REG(0x54 + (((x) & 0x70) >> 2)) -#define NR_BUILTIN_GPIO 128 +#define NR_BUILTIN_GPIO ? ? ? ? ? ? ? ?PXA_GPIO_IRQ_NUM ?#define gpio_to_bank(gpio) ? ? ((gpio) >> 5) ?#define gpio_to_irq(gpio) ? ? ?IRQ_GPIO(gpio) --1.5.6.5
PATCH 3/7 ARM: mmp: set correct uart according to board
In reply to Haojian ZhuangQuoted 3 lines · Haojian Zhuang
UART3 is the default console in jasper, brownstone and avengers lite.
Change-Id: Iacfe665cc0e20a47d50e0b2ad8724097f28e7d2c
Please don't include Change-Ids in patch submissions.
Quoted 6 lines
arch/arm/mach-mmp/include/mach/debug-macro.S +0
-0@@ -14,8 +14,14 @@ .macro addruart, rp, rv
arch/arm/mach-mmp/include/mach/debug-macro.S line 24
Quoted 10 lines
arch/arm/mach-mmp/include/mach/debug-macro.S +6
-0ldr \rp, =APB_PHYS_BASE @ physical ldr \rv, =APB_VIRT_BASE @ virtual +#if defined(CONFIG_MACH_BROWNSTONE) || defined(CONFIG_MACH_MARVELL_JASPER) \ + || defined(CONFIG_MACH_AVENGERS_LITE) + orr \rp, \rp, #0x00018000 + orr \rv, \rv, #0x00018000 +#else orr \rp, \rp, #0x00017000 orr \rv, \rv, #0x00017000 +#endif
It probably makes more sense to have this in the configuration scripts:
choice
prompt "PXA debug uart"
default DEBUG_PXA_UART0
config DEBUG_PXA_UART0
bool "UART 0"
config DEBUG_PXA_UART1
bool "UART 1" default y if MACH_BROWNSTONE || MACH_MARVELL_JASPER || MACH_AVENGERS_LITE
endchoice
and select the debug uart address using these symbols. That'd avoid the need to couple lots of platform specific stuff into the compiled files.
Alternatively, you could do more in the Kconfig like this:
config DEBUG_PXA_UART
hex default 0x17000 if DEBUG_PXA_UART0 default 0x18000 if DEBUG_PXA_UART1
and use CONFIG_DEBUG_PXA_UART in the assembly code, eliminating the need to change sourcecode for additional uarts. Or maybe combine the two ideas.
PATCH 3/7 ARM: mmp: set correct uart according to board
Quoted 44 lines · Russell King - ARM Linux
Quoted 3 lines · Haojian Zhuang
UART3 is the default console in jasper, brownstone and avengers lite.
Change-Id: Iacfe665cc0e20a47d50e0b2ad8724097f28e7d2c
Please don't include Change-Ids in patch submissions.
Quoted 13 lines
arch/arm/mach-mmp/include/mach/debug-macro.S +0
-0@@ -14,8 +14,14 @@? ? ? ? ? ? ? .macro ?addruart, rp, rv
? ? ? ? ? ? ? ldr ? ? \rp, =APB_PHYS_BASE ? ? ? ? ? ? @ physical ? ? ? ? ? ? ? ldr ? ? \rv, =APB_VIRT_BASE ? ? ? ? ? ? @ virtualarch/arm/mach-mmp/include/mach/debug-macro.S +5
-0+#if defined(CONFIG_MACH_BROWNSTONE) || defined(CONFIG_MACH_MARVELL_JASPER) \ + ? ? || defined(CONFIG_MACH_AVENGERS_LITE) + ? ? ? ? ? ? orr ? ? \rp, \rp, #0x00018000 + ? ? ? ? ? ? orr ? ? \rv, \rv, #0x00018000 +#elseQuoted 3 lines
? ? ? ? ? ? ? orr ? ? \rp, \rp, #0x00017000
? ? ? ? ? ? ? orr ? ? \rv, \rv, #0x00017000
+#endifIt probably makes more sense to have this in the configuration scripts:
choice
? ? ? ?prompt "PXA debug uart"
? ? ? ?defaultDEBUG_PXA_UART0config
DEBUG_PXA_UART0
? ? ? ?bool "UART 0"config
DEBUG_PXA_UART1
? ? ? ?bool "UART 1"
? ? ? ?default y ifMACH_BROWNSTONE||MACH_MARVELL_JASPER||MACH_AVENGERS_LITEendchoice
and select the debug uart address using these symbols. ?That'd avoid the need to couple lots of platform specific stuff into the compiled files.
Alternatively, you could do more in the
Kconfiglike this:
Quoted 9 lines
config
DEBUG_PXA_UART
? ? ? ?hex
? ? ? ?default0x17000ifDEBUG_PXA_UART0
? ? ? ?default0x18000ifDEBUG_PXA_UART1and use
CONFIG_DEBUG_PXA_UARTin the assembly code, eliminating the need to change sourcecode for additional uarts. ?Or maybe combine the two ideas.
This looks much cleaner. I was actually thinking if it's necessary to make this run-time determined, when multiple boards are all selected.
Eric Miao
AppliedPATCH 2/7 ARM: pxa: always clear LPM bits for PXA168 MFPR
In reply to Haojian ZhuangQuoted 3 lines · Haojian Zhuang
Bit[9:7] should always be zero in PXA168.
Signed-off-by Haojian Zhuang <[email protected]>
Applied to 'fix'.
Quoted 28 lines
---
?arch/arm/mach-mmp/include/mach/mfp-pxa168.h | ? ?9 +++++++++ ?1 files changed, 9 insertions(+), 0 deletions(-)arch/arm/mach-mmp/include/mach/mfp-pxa168.h +9
-0@@ -8,6 +8,15 @@ ?#define MFP_DRIVE_MEDIUM ? ? ? (0x2 << 13) ?#define MFP_DRIVE_FAST ? ? ? ? (0x3 << 13) +#undef MFP_CFG +#undef MFP_CFG_DRV + +#define MFP_CFG (pin, af) ? ? ? ? ? ? ? \ + ? ? ? (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_MEDIUM) + +#define MFP_CFG_DRV (pin, af, drv) ? ? ?\ + ? ? ? (MFP_LPM_INPUT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_##drv) +?/* GPIO */
?#defineGPIO0_GPIO? ? ? ? ? ?MFP_CFG(GPIO0, AF5)?#defineGPIO1_GPIO? ? ? ? ? ?MFP_CFG(GPIO1, AF5)--
1.5.6.5
Eric Miao
AppliedPATCH 1/7 ARM: pxa: add clk_set_rate()
In reply to Haojian ZhuangQuoted 5 lines · Haojian Zhuang
Since there're mulitple clock rates in some device controllers, enable
clk_set_rate()for this usage.Signed-off-by Haojian Zhuang <[email protected]>Acked-by Eric Miao <[email protected]>
Applied.
Quoted 84 lines
---
?arch/arm/mach-mmp/clock.c | ? 15 +++++++++++++++ ?arch/arm/mach-mmp/clock.h | ? ?1 + ?arch/arm/mach-pxa/clock.c | ? 15 +++++++++++++++ ?arch/arm/mach-pxa/clock.h | ? ?1 +?4 files changed, 32 insertions(+), 0 deletions(-)
arch/arm/mach-mmp/clock.c +15
-0@@ -88,3 +88,18 @@ unsigned long clk_get_rate(struct clk *clk) ? ? ? ?return rate; ?} ?EXPORT_SYMBOL(clk_get_rate); + +int clk_set_rate (struct clk *clk,unsigned long rate) +{ + ? ? ? unsigned long flags; + ? ? ? int ret = -EINVAL; + + ? ? ? if (clk->ops->setrate) { + ? ? ? ? ? ? ? spin_lock_irqsave(&clocks_lock, flags); + ? ? ? ? ? ? ? ret = clk->ops->setrate(clk, rate); + ? ? ? ? ? ? ? spin_unlock_irqrestore(&clocks_lock, flags); + ? ? ? } + + ? ? ? return ret; +} +EXPORT_SYMBOL (clk_set_rate);arch/arm/mach-mmp/clock.h +1
-0@@ -12,6 +12,7 @@ struct clkops { ? ? ? ?void ? ? ? ? ? ? ? ? ? ?(*enable)(struct clk *); ? ? ? ?void ? ? ? ? ? ? ? ? ? ?(*disable)(struct clk *); ? ? ? ?unsigned long ? ? ? ? ? (*getrate)(struct clk *); + ? ? ? int ? ? ? ? ? ? ? ? ? ? (*setrate)(struct clk *, unsigned long); ?}; ?struct clk {arch/arm/mach-pxa/clock.c +15
-0@@ -53,6 +53,21 @@ unsigned long clk_get_rate(struct clk *clk) ?} ?EXPORT_SYMBOL(clk_get_rate); +int clk_set_rate (struct clk *clk,unsigned long rate) +{ + ? ? ? unsigned long flags; + ? ? ? int ret = -EINVAL; + + ? ? ? if (clk->ops->setrate) { + ? ? ? ? ? ? ? spin_lock_irqsave(&clocks_lock, flags); + ? ? ? ? ? ? ? ret = clk->ops->setrate(clk, rate); + ? ? ? ? ? ? ? spin_unlock_irqrestore(&clocks_lock, flags); + ? ? ? } + + ? ? ? return ret; +} +EXPORT_SYMBOL (clk_set_rate); + ?void clk_dummy_enable(struct clk *clk) ?{ ?}arch/arm/mach-pxa/clock.h +1
-1@@ -5,6 +5,7 @@ struct clkops { ? ? ? ?void ? ? ? ? ? ? ? ? ? ?(*enable)(struct clk *); ? ? ? ?void ? ? ? ? ? ? ? ? ? ?(*disable)(struct clk *); ? ? ? ?unsigned long ? ? ? ? ? (*getrate)(struct clk *); + ? ? ? int ? ? ? ? ? ? ? ? ? ? (*setrate)(struct clk *, unsigned long); ?}; ?struct clk { --1.5.6.5