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ARM: pxa: enable pxa95x interrupt handler

PATCH New Haojian Zhuang 2 participants 5 messages Apr 15, 2011 – Jul 5, 2011 1 message not in the archive

Subsystems (4)
Arm (32-bit) Arm sub-architectures PXA2xx/PXA3xx support Mmp support
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A message that is not in the archive (sent off-list or not yet received): 2011041501

Haojian Zhuang

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#1 lore raw

PATCH 1/3 ARM: pxa: enable pxa95x interrupt handler

PXA27x/PXA3xx silicons need to access CP15 co-processor to get interrupt information. PXA95x needs to access interrupt controller register.

So make PXA95x support multiple handler interrupt.

Signed-off-by Haojian Zhuang <[email protected]>
---
 arch/arm/mach-pxa/Kconfig             |    1 +
 arch/arm/mach-pxa/Makefile            |    2 +-
 arch/arm/mach-pxa/entry-pxa95x-intc.S |   38 +++++++++++++++++++++++++++++++++
 arch/arm/mach-pxa/generic.h           |    1 +
 arch/arm/mach-pxa/saarb.c             |    1 +
 5 files changed, 42 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/mach-pxa/entry-pxa95x-intc.S
arch/arm/mach-pxa/Kconfig +1 -0
index 2fc9f94..9811f0e 100644
@@ -660,6 +660,7 @@ config CPU_PXA935
 config PXA95x
 	bool
 	select CPU_PJ4
+	select MULTI_IRQ_HANDLER
 	help
 	  Select code specific to PXA95x variants
arch/arm/mach-pxa/Makefile +1 -1
index cc39d17..ed80260 100644
@@ -19,7 +19,7 @@ endif
 obj-$(CONFIG_PXA25x)		+= mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o
 obj-$(CONFIG_PXA27x)		+= mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o
 obj-$(CONFIG_PXA3xx)		+= mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o
-obj-$(CONFIG_PXA95x)		+= mfp-pxa3xx.o clock-pxa3xx.o pxa95x.o smemc.o
+obj-$(CONFIG_PXA95x)		+= mfp-pxa3xx.o clock-pxa3xx.o pxa95x.o smemc.o entry-pxa95x-intc.o
 obj-$(CONFIG_CPU_PXA300)	+= pxa300.o
 obj-$(CONFIG_CPU_PXA320)	+= pxa320.o
 obj-$(CONFIG_CPU_PXA930)	+= pxa930.o
arch/arm/mach-pxa/entry-pxa95x-intc.S new file +38 -0
new file mode 100644
index 0000000..4a62486
@@ -0,0 +1,38 @@
+/*
+ *  arch/arm/mach-pxa/entry-pxa95x-intc.S
+ *
+ *  Low-level IRQ helper macros for PXA95x-based platforms
+ *
+ *  Copyright (C) 2011 Marvell International Ltd.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License version 2 as
+ *  publishhed by the Free Software Foundation.
+ */
+#include <asm/entry-macro-multi.S>
+#include <mach/hardware.h>
+#include <mach/irqs.h>
+
+		.macro	get_pxa95x_irqnr_and_base, irqnr, irqstat, base, tmp
+		mov	\base, #io_p2v(0x40000000)	@ IIR Ctl = 0x40d00000
+		add	\base, \base, #0x00d00000
+		ldr	\irqstat, [\base, #0x18]	@ ICHP offset
+		tst	\irqstat, #0x80000000
+		beq	2001f
+		bic	\irqstat, \irqstat, #0x80000000
+		mov	\irqnr, \irqstat, lsr #16
+		add	\irqnr, \irqnr, #(PXA_IRQ(0))
+2001:
+		.endm
+
+		.align	5
+		.global pxa95x_handle_irq_intc
+pxa95x_handle_irq_intc:
+		mov	r4, lr
+1:		get_pxa95x_irqnr_and_base r0, r6, r5, lr
+		movne	r1, sp
+
+		@ routine called with r0 = irq number, r1 = struct pt_regs *
+		adrne	lr, BSYM(1b)
+		bne	asm_do_IRQ
+		mov	pc, r4
arch/arm/mach-pxa/generic.h +1 -0
index a079d8b..e47f863 100644
@@ -30,6 +30,7 @@ extern void __init pxa27x_map_io(void);
 extern void __init pxa3xx_map_io(void);
 
 extern unsigned int get_clk_frequency_khz(int info);
+extern void pxa95x_handle_irq_intc(struct pt_regs *);
 
 #define SET_BANK(__nr,__start,__size) \
 	mi->bank[__nr].start = (__start), \
arch/arm/mach-pxa/saarb.c +1 -0
index 9322fe5..f98ff38 100644
@@ -107,6 +107,7 @@ MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)")
 	.map_io         = pxa_map_io,
 	.nr_irqs	= SAARB_NR_IRQS,
 	.init_irq       = pxa95x_init_irq,
+	.handle_irq	= pxa95x_handle_irq_intc,
 	.timer          = &pxa_timer,
 	.init_machine   = saarb_init,
 MACHINE_END
Signature · 1 line
1.5.6.5
author
#2 lore raw

PATCH 2/3 ARM: mmp: enable one wire controller in ttc dkb

Enable one wire controller in TTC DKB platform.

Signed-off-by Haojian Zhuang <[email protected]>
---
 arch/arm/mach-mmp/include/mach/mfp-pxa910.h |    3 +++
 arch/arm/mach-mmp/include/mach/pxa910.h     |    2 ++
 arch/arm/mach-mmp/pxa910.c                  |   15 +++++++++++++++
 arch/arm/mach-mmp/ttc_dkb.c                 |   13 ++++++++++++-
 4 files changed, 32 insertions(+), 1 deletions(-)
arch/arm/mach-mmp/include/mach/mfp-pxa910.h +3 -0
index fbd7ee8..4f8b7e8 100644
@@ -40,6 +40,9 @@
 #define GPIO124_MN_CLK_OUT	MFP_CFG_DRV(GPIO124, AF1, MEDIUM)
 #define GPIO123_CLK_REQ		MFP_CFG_DRV(GPIO123, AF0, MEDIUM)
 
+/* one wire */
+#define ONEWIRE_CLK_REQ		MFP_CFG(GPIO123, AF2)
+
 /* DFI */
 #define DF_IO0_ND_IO0		MFP_CFG(DF_IO0, AF0)
 #define DF_IO1_ND_IO1		MFP_CFG(DF_IO1, AF0)
arch/arm/mach-mmp/include/mach/pxa910.h +2 -0
index 91be755..38afd28 100644
@@ -21,6 +21,8 @@ extern struct pxa_device_desc pxa910_device_pwm3;
 extern struct pxa_device_desc pxa910_device_pwm4;
 extern struct pxa_device_desc pxa910_device_nand;
 
+extern struct platform_device pxa910_device_1wire;
+
 static inline int pxa910_add_uart(int id)
 {
 	struct pxa_device_desc *d = NULL;
arch/arm/mach-mmp/pxa910.c +15 -0
index 8f92ccd..b1c9fcf 100644
@@ -13,6 +13,7 @@
 #include <linux/init.h>
 #include <linux/list.h>
 #include <linux/io.h>
+#include <linux/platform_device.h>
 
 #include <asm/mach/time.h>
 #include <mach/addr-map.h>

@@ -109,6 +110,7 @@ static APBC_CLK(pwm1, PXA910_PWM1, 1, 13000000);
 static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
 static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
 static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
+static APBC_CLK(w1, PXA910_ONEWIRE, 0, 26000000);
 
 static APMU_CLK(nand, NAND, 0x01db, 208000000);
 static APMU_CLK(u2o, USB, 0x1b, 480000000);

@@ -125,6 +127,7 @@ static struct clk_lookup pxa910_clkregs[] = {
 	INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
 	INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
 	INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"),
+	INIT_CLKREG(&clk_w1, "pxa3xx-w1", NULL),
 };
 
 static int __init pxa910_init(void)

@@ -180,3 +183,15 @@ PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
 PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
 PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
 PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
+
+static struct resource pxa910_resource_1wire[] = {
+	{0xd4011800,         0xd4011813,         "ds1wm-mem", IORESOURCE_MEM,},
+	{IRQ_PXA910_ONEWIRE, IRQ_PXA910_ONEWIRE, "ds1wm-irq", IORESOURCE_IRQ,},
+};
+
+struct platform_device pxa910_device_1wire = {
+	.name		= "pxa3xx-w1",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(pxa910_resource_1wire),
+	.resource	= pxa910_resource_1wire,
+};
arch/arm/mach-mmp/ttc_dkb.c +12 -1
index e411039..1820071 100644
@@ -11,10 +11,11 @@
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
+#include <linux/interrupt.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/onenand.h>
-#include <linux/interrupt.h>
+#include <linux/mfd/ds1wm.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

@@ -55,6 +56,9 @@ static unsigned long ttc_dkb_pin_config[] __initdata = {
 	DF_WEn_DF_WEn,
 	DF_REn_DF_REn,
 	DF_RDY0_DF_RDY0,
+
+	/* ONE WIRE */
+	ONEWIRE_CLK_REQ,
 };
 
 static struct mtd_partition ttc_dkb_onenand_partitions[] = {

@@ -109,7 +113,12 @@ static struct platform_device ttc_dkb_device_onenand = {
 	},
 };
 
+static struct ds1wm_driver_data ttc_dkb_1wire_data = {
+	.active_high	= 1,
+};
+
 static struct platform_device *ttc_dkb_devices[] = {
+	&pxa910_device_1wire,
 	&ttc_dkb_device_onenand,
 };
 

@@ -121,6 +130,8 @@ static void __init ttc_dkb_init(void)
 	pxa910_add_uart(1);
 
 	/* off-chip devices */
+	platform_device_add_data(&pxa910_device_1wire, &ttc_dkb_1wire_data,
+				 sizeof(struct ds1wm_driver_data));
 	platform_add_devices(ARRAY_AND_SIZE(ttc_dkb_devices));
 }
Signature · 1 line
1.5.6.5
author
#3 lore raw

PATCH 3/3 ARM: pxa: enable 1wire controller

Support 1wire controller in both PXA3xx and PXA95x. Enable it in saarb platform.

Signed-off-by Haojian Zhuang <[email protected]>
---
 arch/arm/mach-pxa/devices.c                 |   12 ++++++++++++
 arch/arm/mach-pxa/devices.h                 |    1 +
 arch/arm/mach-pxa/include/mach/mfp-pxa930.h |    1 +
 arch/arm/mach-pxa/pxa3xx.c                  |    2 ++
 arch/arm/mach-pxa/pxa95x.c                  |    2 ++
 arch/arm/mach-pxa/saarb.c                   |   20 ++++++++++++++++++++
 6 files changed, 38 insertions(+), 0 deletions(-)
arch/arm/mach-pxa/devices.c +12 -0
index 2e04254..451caa0 100644
@@ -1067,3 +1067,15 @@ void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
 	pd->dev.platform_data = info;
 	platform_device_add(pd);
 }
+
+static struct resource pxa3xx_resource_w1[] = {
+	{0x41b00000,	0x41b00013,	"ds1wm-mem", IORESOURCE_MEM,},
+	{IRQ_1WIRE,	IRQ_1WIRE,	"ds1wm-irq", IORESOURCE_IRQ,},
+};
+
+struct platform_device pxa3xx_device_w1 = {
+	.name		= "pxa3xx-w1",
+	.id		= -1,
+	.num_resources	= ARRAY_SIZE(pxa3xx_resource_w1),
+	.resource	= pxa3xx_resource_w1,
+};
arch/arm/mach-pxa/devices.h +1 -0
index 2fd5a8b..3625e62 100644
@@ -36,6 +36,7 @@ extern struct platform_device pxa27x_device_pwm1;
 
 extern struct platform_device pxa3xx_device_nand;
 extern struct platform_device pxa3xx_device_i2c_power;
+extern struct platform_device pxa3xx_device_w1;
 
 extern struct platform_device pxa3xx_device_gcu;
arch/arm/mach-pxa/include/mach/mfp-pxa930.h +1 -0
index 04f7c97..18bcb5d 100644
@@ -493,6 +493,7 @@
 #define DF_ADDR2_CLK13MOUTDMD	MFP_CFG(DF_ADDR2, AF3)
 
 /* 1 wire */
+#define GPIO16_OW_DQ_IN		MFP_CFG(GPIO16, AF3)
 #define GPIO95_OW_DQ_IN		MFP_CFG(GPIO95, AF5)
 
 #endif /* __ASM_ARCH_MFP_PXA9xx_H */
arch/arm/mach-pxa/pxa3xx.c +2 -0
index 8dd1073..6f87659 100644
@@ -57,6 +57,7 @@ static DEFINE_PXA3_CKEN(pxa3xx_pwm0, PWM0, 13000000, 0);
 static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0);
 static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0);
 static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0);
+static DEFINE_PXA3_CKEN(pxa3xx_w1, 1WIRE, 13000000, 0);
 
 static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
 static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops);

@@ -89,6 +90,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {
 	INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL),
 	INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL),
 	INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL),
+	INIT_CLKREG(&clk_pxa3xx_w1, "pxa3xx-w1", NULL),
 };
 
 #ifdef CONFIG_PM
arch/arm/mach-pxa/pxa95x.c +2 -0
index 23b229b..1477eef 100644
@@ -214,6 +214,7 @@ static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0);
 static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0);
 static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0);
 static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0);
+static DEFINE_PXA3_CKEN(pxa95x_w1, 1WIRE, 13000000, 0);
 
 static struct clk_lookup pxa95x_clkregs[] = {
 	INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),

@@ -232,6 +233,7 @@ static struct clk_lookup pxa95x_clkregs[] = {
 	INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL),
 	INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL),
 	INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL),
+	INIT_CLKREG(&clk_pxa95x_w1, "pxa3xx-w1", NULL),
 };
 
 void __init pxa95x_init_irq(void)
arch/arm/mach-pxa/saarb.c +20 -0
index f98ff38..e9b252d 100644
@@ -12,9 +12,11 @@
 
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <linux/platform_device.h>
 #include <linux/i2c.h>
 #include <linux/i2c/pxa-i2c.h>
 #include <linux/mfd/88pm860x.h>
+#include <linux/mfd/ds1wm.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>

@@ -26,9 +28,14 @@
 #include <mach/gpio.h>
 
 #include "generic.h"
+#include "devices.h"
 
 #define SAARB_NR_IRQS	(IRQ_BOARD_START + 40)
 
+static mfp_cfg_t saarb_pin_config[] __initdata = {
+	GPIO16_OW_DQ_IN,
+};
+
 static struct pm860x_touch_pdata saarb_touch = {
 	.gpadc_prebias	= 1,
 	.slot_cycle	= 1,

@@ -95,11 +102,24 @@ static struct i2c_board_info saarb_i2c_info[] = {
 	},
 };
 
+static struct ds1wm_driver_data saarb_1wire_data = {
+	.active_high	= 1,
+};
+
+static struct platform_device *saarb_devices[] __initdata = {
+	&pxa3xx_device_w1,
+};
+
 static void __init saarb_init(void)
 {
+	pxa3xx_mfp_config(ARRAY_AND_SIZE(saarb_pin_config));
 	pxa_set_ffuart_info(NULL);
 	pxa_set_i2c_info(NULL);
 	i2c_register_board_info(0, ARRAY_AND_SIZE(saarb_i2c_info));
+
+	platform_device_add_data(&pxa3xx_device_w1, &saarb_1wire_data,
+				 sizeof(struct ds1wm_driver_data));
+	platform_add_devices(ARRAY_AND_SIZE(saarb_devices));
 }
 
 MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)")
Signature · 1 line
1.5.6.5
#4 lore raw

PATCH 2/3 ARM: mmp: enable one wire controller in ttc dkb

In reply to Haojian Zhuang
Quoted 29 lines · Haojian Zhuang

Enable one wire controller in TTC DKB platform.

Signed-off-by Haojian Zhuang <[email protected]>

---

?arch/arm/mach-mmp/include/mach/mfp-pxa910.h | ? ?3 +++
?arch/arm/mach-mmp/include/mach/pxa910.h ? ? | ? ?2 ++
?arch/arm/mach-mmp/pxa910.c ? ? ? ? ? ? ? ? ?| ? 15 +++++++++++++++
?arch/arm/mach-mmp/ttc_dkb.c ? ? ? ? ? ? ? ? | ? 13 ++++++++++++-

?4 files changed, 32 insertions(+), 1 deletions(-)

arch/arm/mach-mmp/include/mach/mfp-pxa910.h +3 -0
index fbd7ee8..4f8b7e8 100644
@@ -40,6 +40,9 @@
 ?#define GPIO124_MN_CLK_OUT ? ? MFP_CFG_DRV(GPIO124, AF1, MEDIUM)
 ?#define GPIO123_CLK_REQ ? ? ? ? ? ? ? ?MFP_CFG_DRV(GPIO123, AF0, MEDIUM)
 
+/* one wire */
+#define ONEWIRE_CLK_REQ ? ? ? ? ? ? ? ?MFP_CFG(GPIO123, AF2)
+

?/* DFI */
?#define DF_IO0_ND_IO0 ? ? ? ? ?MFP_CFG(DF_IO0, AF0) ?#define DF_IO1_ND_IO1 ? ? ? ? ?MFP_CFG(DF_IO1, AF0)

arch/arm/mach-mmp/include/mach/pxa910.h +0 -0
index 91be755..38afd28 100644

arch/arm/mach-mmp/include/mach/pxa910.h extern struct pxa_device_desc pxa910_device_pwm3; · line 25

Quoted 5 lines
arch/arm/mach-mmp/include/mach/pxa910.h +2 -0
@@ -21,6 +21,8 @@ extern struct pxa_device_desc pxa910_device_pwm3;
 ?extern struct pxa_device_desc pxa910_device_pwm4;
 ?extern struct pxa_device_desc pxa910_device_nand;
 
+extern struct platform_device pxa910_device_1wire;
+

And add the function below as well?

static inline int pxa910_add_1wire(struct ds1wm_driver_data *)

Quoted 37 lines
arch/arm/mach-mmp/include/mach/pxa910.h +0 -0
 ?static inline int pxa910_add_uart(int id)
 ?{
 ? ? ? ?struct pxa_device_desc *d = NULL;
arch/arm/mach-mmp/pxa910.c +0 -0
index 8f92ccd..b1c9fcf 100644
@@ -13,6 +13,7 @@

?#include <linux/init.h>
?#include <linux/list.h>
?#include <linux/io.h>
+#include <linux/platform_device.h>

?#include <asm/mach/time.h>
?#include <mach/addr-map.h>

arch/arm/mach-mmp/pxa910.c +4 -0
@@ -109,6 +110,7 @@ static APBC_CLK(pwm1, PXA910_PWM1, 1, 13000000);
 ?static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
 ?static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
 ?static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
+static APBC_CLK(w1, PXA910_ONEWIRE, 0, 26000000);
 
 ?static APMU_CLK(nand, NAND, 0x01db, 208000000);
 ?static APMU_CLK(u2o, USB, 0x1b, 480000000);

@@ -125,6 +127,7 @@ static struct clk_lookup pxa910_clkregs[] = {
 ? ? ? ?INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
 ? ? ? ?INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
 ? ? ? ?INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"),
+ ? ? ? INIT_CLKREG(&clk_w1, "pxa3xx-w1", NULL),
 ?};
 
 ?static int __init pxa910_init(void)

@@ -180,3 +183,15 @@ PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
 ?PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
 ?PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
 ?PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
+
+static struct resource pxa910_resource_1wire[] = {

arch/arm/mach-mmp/pxa910.c PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10); · line 197

Quoted 10 lines
arch/arm/mach-mmp/pxa910.c +10 -0
+ ? ? ? {0xd4011800, ? ? ? ? 0xd4011813, ? ? ? ? "ds1wm-mem", IORESOURCE_MEM,},
+ ? ? ? {IRQ_PXA910_ONEWIRE, IRQ_PXA910_ONEWIRE, "ds1wm-irq", IORESOURCE_IRQ,},
+};
+
+struct platform_device pxa910_device_1wire = {
+ ? ? ? .name ? ? ? ? ? = "pxa3xx-w1",
+ ? ? ? .id ? ? ? ? ? ? = -1,
+ ? ? ? .num_resources ?= ARRAY_SIZE(pxa910_resource_1wire),
+ ? ? ? .resource ? ? ? = pxa910_resource_1wire,
+};

Is

PXA910_DEVICE(w1, "pxa3xx-w1", -1, ONEWIRE, 0xd4011800, 0x20);

sufficient to describe the device?

Quoted 43 lines
arch/arm/mach-mmp/ttc_dkb.c +0 -0
index e411039..1820071 100644
@@ -11,10 +11,11 @@

?#include <linux/init.h>
?#include <linux/kernel.h>
?#include <linux/platform_device.h>
+#include <linux/interrupt.h>
?#include <linux/mtd/mtd.h>
?#include <linux/mtd/partitions.h>
?#include <linux/mtd/onenand.h>

arch/arm/mach-mmp/ttc_dkb.c +1 -1
-#include <linux/interrupt.h>
+#include <linux/mfd/ds1wm.h>

?#include <asm/mach-types.h>
?#include <asm/mach/arch.h>

arch/arm/mach-mmp/ttc_dkb.c +8 -0
@@ -55,6 +56,9 @@ static unsigned long ttc_dkb_pin_config[] __initdata = {
 ? ? ? ?DF_WEn_DF_WEn,
 ? ? ? ?DF_REn_DF_REn,
 ? ? ? ?DF_RDY0_DF_RDY0,
+
+ ? ? ? /* ONE WIRE */
+ ? ? ? ONEWIRE_CLK_REQ,
 ?};
 
 ?static struct mtd_partition ttc_dkb_onenand_partitions[] = {

@@ -109,7 +113,12 @@ static struct platform_device ttc_dkb_device_onenand = {
 ? ? ? ?},
 ?};
 
+static struct ds1wm_driver_data ttc_dkb_1wire_data = {
+ ? ? ? .active_high ? ?= 1,
+};
+
 ?static struct platform_device *ttc_dkb_devices[] = {
+ ? ? ? &pxa910_device_1wire,
 ? ? ? ?&ttc_dkb_device_onenand,
 ?};
 

@@ -121,6 +130,8 @@ static void __init ttc_dkb_init(void)
 ? ? ? ?pxa910_add_uart(1);
Quoted 3 lines

? ? ? ?/* off-chip devices */
+ ? ? ? platform_device_add_data(&pxa910_device_1wire, &ttc_dkb_1wire_data,
+ ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?sizeof(struct ds1wm_driver_data));

Then simply:

pxa910_add_1wire(&ttc_dkb_1wire_data);

here

Quoted 7 lines

? ? ? ?platform_add_devices(ARRAY_AND_SIZE(ttc_dkb_devices)); ?}

--
1.5.6.5

#5 lore raw

PATCH 1/3 ARM: pxa: enable pxa95x interrupt handler

In reply to Haojian Zhuang
Quoted 10 lines · Haojian Zhuang

PXA27x/PXA3xx silicons need to access CP15 co-processor to get interrupt information. PXA95x needs to access interrupt controller register.

So make PXA95x support multiple handler interrupt.

Signed-off-by Haojian Zhuang <[email protected]>

---

?arch/arm/mach-pxa/Kconfig ? ? ? ? ? ? | ? ?1 +
?arch/arm/mach-pxa/Makefile ? ? ? ? ? ?| ? ?2 +-
?arch/arm/mach-pxa/entry-pxa95x-intc.S | ? 38 +++++++++++++++++++++++++++++++++

Hi Haojian,

The function doesn't need to be assembly code, see my -devel branch for example. A simple C function should be sufficient to handle this simple case.

Quoted 102 lines

?arch/arm/mach-pxa/generic.h ? ? ? ? ? | ? ?1 + ?arch/arm/mach-pxa/saarb.c ? ? ? ? ? ? | ? ?1 + ?5 files changed, 42 insertions(+), 1 deletions(-) ?create mode 100644 arch/arm/mach-pxa/entry-pxa95x-intc.S

arch/arm/mach-pxa/Kconfig +0 -0
index 2fc9f94..9811f0e 100644
@@ -660,6 +660,7 @@ config CPU_PXA935

?config PXA95x
? ? ? ?bool
? ? ? ?select CPU_PJ4
+ ? ? ? select MULTI_IRQ_HANDLER
? ? ? ?help
? ? ? ? ?Select code specific to PXA95x variants

arch/arm/mach-pxa/Makefile +0 -0
index cc39d17..ed80260 100644
@@ -19,7 +19,7 @@ endif

?obj-$(CONFIG_PXA25x) ? ? ? ? ? += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa25x.o ?obj-$(CONFIG_PXA27x) ? ? ? ? ? += mfp-pxa2xx.o clock-pxa2xx.o pxa2xx.o pxa27x.o ?obj-$(CONFIG_PXA3xx) ? ? ? ? ? += mfp-pxa3xx.o clock-pxa3xx.o pxa3xx.o smemc.o pxa3xx-ulpi.o

arch/arm/mach-pxa/Makefile +1 -1
-obj-$(CONFIG_PXA95x) ? ? ? ? ? += mfp-pxa3xx.o clock-pxa3xx.o pxa95x.o smemc.o
+obj-$(CONFIG_PXA95x) ? ? ? ? ? += mfp-pxa3xx.o clock-pxa3xx.o pxa95x.o smemc.o entry-pxa95x-intc.o

?obj-$(CONFIG_CPU_PXA300) ? ? ? += pxa300.o
?obj-$(CONFIG_CPU_PXA320) ? ? ? += pxa320.o
?obj-$(CONFIG_CPU_PXA930) ? ? ? += pxa930.o

arch/arm/mach-pxa/entry-pxa95x-intc.S new file +38 -0
new file mode 100644
index 0000000..4a62486
@@ -0,0 +1,38 @@
+/*
+ * ?arch/arm/mach-pxa/entry-pxa95x-intc.S
+ *
+ * ?Low-level IRQ helper macros for PXA95x-based platforms
+ *
+ * ?Copyright (C) 2011 Marvell International Ltd.
+ *
+ * ?This program is free software; you can redistribute it and/or modify
+ * ?it under the terms of the GNU General Public License version 2 as
+ * ?publishhed by the Free Software Foundation.
+ */
+#include <asm/entry-macro-multi.S>
+#include <mach/hardware.h>
+#include <mach/irqs.h>
+
+ ? ? ? ? ? ? ? .macro ?get_pxa95x_irqnr_and_base, irqnr, irqstat, base, tmp
+ ? ? ? ? ? ? ? mov ? ? \base, #io_p2v(0x40000000) ? ? ?@ IIR Ctl = 0x40d00000
+ ? ? ? ? ? ? ? add ? ? \base, \base, #0x00d00000
+ ? ? ? ? ? ? ? ldr ? ? \irqstat, [\base, #0x18] ? ? ? ?@ ICHP offset
+ ? ? ? ? ? ? ? tst ? ? \irqstat, #0x80000000
+ ? ? ? ? ? ? ? beq ? ? 2001f
+ ? ? ? ? ? ? ? bic ? ? \irqstat, \irqstat, #0x80000000
+ ? ? ? ? ? ? ? mov ? ? \irqnr, \irqstat, lsr #16
+ ? ? ? ? ? ? ? add ? ? \irqnr, \irqnr, #(PXA_IRQ(0))
+2001:
+ ? ? ? ? ? ? ? .endm
+
+ ? ? ? ? ? ? ? .align ?5
+ ? ? ? ? ? ? ? .global pxa95x_handle_irq_intc
+pxa95x_handle_irq_intc:
+ ? ? ? ? ? ? ? mov ? ? r4, lr
+1: ? ? ? ? ? ? get_pxa95x_irqnr_and_base r0, r6, r5, lr
+ ? ? ? ? ? ? ? movne ? r1, sp
+
+ ? ? ? ? ? ? ? @ routine called with r0 = irq number, r1 = struct pt_regs *
+ ? ? ? ? ? ? ? adrne ? lr, BSYM(1b)
+ ? ? ? ? ? ? ? bne ? ? asm_do_IRQ
+ ? ? ? ? ? ? ? mov ? ? pc, r4
arch/arm/mach-pxa/generic.h +1 -0
index a079d8b..e47f863 100644
@@ -30,6 +30,7 @@ extern void __init pxa27x_map_io(void);
 ?extern void __init pxa3xx_map_io(void);
 
 ?extern unsigned int get_clk_frequency_khz(int info);
+extern void pxa95x_handle_irq_intc(struct pt_regs *);
 
 ?#define SET_BANK(__nr,__start,__size) \
 ? ? ? ?mi->bank[__nr].start = (__start), \
arch/arm/mach-pxa/saarb.c +1 -0
index 9322fe5..f98ff38 100644
@@ -107,6 +107,7 @@ MACHINE_START(SAARB, "PXA955 Handheld Platform (aka SAARB)")
 ? ? ? ?.map_io ? ? ? ? = pxa_map_io,
 ? ? ? ?.nr_irqs ? ? ? ?= SAARB_NR_IRQS,
 ? ? ? ?.init_irq ? ? ? = pxa95x_init_irq,
+ ? ? ? .handle_irq ? ? = pxa95x_handle_irq_intc,
 ? ? ? ?.timer ? ? ? ? ?= &pxa_timer,
 ? ? ? ?.init_machine ? = saarb_init,

?MACHINE_END
--
1.5.6.5