amd iommu: Implement p2m sharing
PATCH v2 3/4 amd iommu: Implement p2m sharing
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Advanced Micro Devices GmbH
Sitz: Dornach, Gemeinde Aschheim,
Landkreis München Registergericht München,
HRB Nr. 43632
WEEE-Reg-Nr: DE 12919551
Geschäftsführer:
Alberto Bozzo, Andrew Bowd
# HG changeset patch
# User Wei Wang <[email protected]>
# Node ID 1d9b0e45566ec3cd0e293212d9a454920116b2b1 # Parent c7359ee0b22f8b81841ed495ba58957e0714646e Implement p2m table sharing for AMD IOMMU.
Signed-off-by Wei Wang <[email protected]>
xen/arch/x86/mm/p2m.c +25 -7
@@ -35,6 +35,7 @@#include <asm/mem_sharing.h> #include <xen/event.h> #include <asm/hvm/nestedhvm.h> +#include <asm/hvm/svm/amd-iommu-proto.h> /* Debugging and auditing of the P2M code? */ #define P2M_AUDIT 0
@@ -1418,6 +1419,7 @@ p2m_set_entry(struct p2m_domain *p2m, ununsigned int iommu_pte_flags = (p2mt == p2m_ram_rw) ? IOMMUF_readable|IOMMUF_writable:0 ; +unsigned long old_mfn =0 ;if ( tb_init_done ) {
@@ -1468,7 +1470,10 @@ p2m_set_entry(struct p2m_domain *p2m, un entry_content.l1 = l3e_content.l3;if ( entry_content.l1 !=0 ) + {p2m_add_iommu_flags (&entry_content,0 , iommu_pte_flags); + old_mfn =l1e_get_pfn (*p2m_entry); + } p2m->write_p2m_entry (p2m, gfn, p2m_entry, table_mfn, entry_content,3 );/* NB: paging_write_p2m_entry() handles tlb flushes properly */
@@ -1510,8 +1515,10 @@ p2m_set_entry(struct p2m_domain *p2m, un entry_content =l1e_empty ();if ( entry_content.l1 !=0 ) + {p2m_add_iommu_flags (&entry_content,0 , iommu_pte_flags); - + old_mfn =l1e_get_pfn (*p2m_entry); + }/* level 1 entry */ p2m->write_p2m_entry (p2m, gfn, p2m_entry, table_mfn, entry_content,1 );/* NB: paging_write_p2m_entry() handles tlb flushes properly */
@@ -1544,7 +1551,10 @@ p2m_set_entry(struct p2m_domain *p2m, un entry_content.l1 = l2e_content.l2;if ( entry_content.l1 !=0 ) + {p2m_add_iommu_flags (&entry_content,0 , iommu_pte_flags); + old_mfn =l1e_get_pfn (*p2m_entry); + } p2m->write_p2m_entry (p2m, gfn, p2m_entry, table_mfn, entry_content,2 );/* NB: paging_write_p2m_entry() handles tlb flushes properly */
@@ -1561,13 +1571,21 @@ p2m_set_entry(struct p2m_domain *p2m, unif ( iommu_enabled &&need_iommu (p2m->domain) ) { -if ( p2mt == p2m_ram_rw ) -for ( i =0 ; i < (1UL << page_order); i++ ) -iommu_map_page (p2m->domain, gfn+i,mfn_x (mfn)+i, - IOMMUF_readable|IOMMUF_writable); +if ( iommu_hap_pt_share ) + { +if ( old_mfn && (old_mfn !=mfn_x (mfn)) ) +amd_iommu_flush_pages (p2m->domain, gfn, page_order); + }else -for (int i =0 ; i < (1UL << page_order); i++ ) -iommu_unmap_page (p2m->domain, gfn+i); + { +if ( p2mt == p2m_ram_rw ) +for ( i =0 ; i < (1UL << page_order); i++ ) +iommu_map_page (p2m->domain, gfn+i,mfn_x (mfn)+i, + IOMMUF_readable|IOMMUF_writable); +else +for (int i =0 ; i < (1UL << page_order); i++ ) +iommu_unmap_page (p2m->domain, gfn+i); + } }/* Success */
xen/drivers/passthrough/amd/iommu_init.c +1 -1
@@ -889,7 +889,7 @@ static void invalidate_all_domain_pages( {struct domain *d;for_each_domain ( d ) -invalidate_all_iommu_pages (d); +amd_iommu_flush_all_pages (d); }static void invalidate_all_devices (void )
xen/drivers/passthrough/amd/iommu_map.c +71 -20
169 lines not on this page · raw message
xen/drivers/passthrough/amd/pci_amd_iommu.c +4 -1
@@ -362,6 +362,9 @@ static void deallocate_iommu_page_tables {struct hvm_iommu *hd =domain_hvm_iommu (d); +if ( iommu_hap_pt_share ) +return ; +spin_lock (&hd->mapping_lock);if ( hd->root_table ) {
@@ -375,7 +378,7 @@ static void amd_iommu_domain_destroy(strstatic void amd_iommu_domain_destroy (struct domain *d) {deallocate_iommu_page_tables (d); -invalidate_all_iommu_pages (d); +amd_iommu_flush_all_pages (d); } static int amd_iommu_return_device(
xen/include/asm-x86/hvm/svm/amd-iommu-proto.h +9 -2
@@ -51,10 +51,17 @@ int amd_iommu_map_page(struct domain *d,int amd_iommu_map_page (struct domain *d,unsigned long gfn,unsigned long mfn,unsigned int flags);int amd_iommu_unmap_page (struct domain *d,unsigned long gfn); +void amd_iommu_flush_pages (struct domain *d,unsigned long gfn, +unsigned int order); +void amd_iommu_flush_all_pages (struct domain *d); +u64 amd_iommu_get_next_table_from_pte (u32 *entry);int amd_iommu_reserve_domain_unity_map (struct domain *domain, -u64 phys_addr,unsigned long size,int iw,int ir); -void invalidate_all_iommu_pages (struct domain *d); +u64 phys_addr,unsigned long size, +int iw,int ir); + +/* Share p2m table with iommu */ +void amd_iommu_share_p2m (struct domain *d);/* device table functions */ int get_dma_requestor_id (u16 bdf);
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