x86/uv changes for v3.1
Subsystems (3)
Linus,
Please pull the latest x86-uv-for-linus git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip.git x86-uv-for-linus
I just noticed a beauty wart in the changelogs: the patches were submitted as '[email protected] <[email protected]>' and thus the email address got into the commit, instead of 'Cliff Wickman'.
I typically notice such mistakes but this one slipped through. Can rebase them if it's too ugly.
Thanks,
Ingo
------------------>
Jack Steiner (2):
x86, UV: Clean up uv_mmrs.h
x66, UV: Enable 64-bit ACPI MFCG support for SGI UV2 platform
[email protected] (8):
x86, UV: Fix smp_processor_id() use in a preemptable region x86, UV: Inline header file functions
x86, UV: Allow for non-consecutive sockets
x86, UV: Correct reset_with_ipi()
x86, UV: Rename hubmask to pnmask
x86, UV: Remove cpumask_t from the stack
x86, UV: Correct failed topology memory leak
x86, UV: Correct UV2 BAU destination timeout
arch/x86/include/asm/uv/uv_bau.h | 59 +- arch/x86/include/asm/uv/uv_mmrs.h | 2889 +++++++++++++++++++++---------------- arch/x86/pci/mmconfig-shared.c | 3 +- arch/x86/platform/uv/tlb_uv.c | 69 +- 4 files changed, 1691 insertions(+), 1329 deletions(-)
arch/x86/include/asm/uv/uv_bau.h +34 -25
@@ -67,7 +67,7 @@* we're using 655us, similar to UV1: 65 units of 10us */ #define UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD (9UL) -#define UV2_INTD_SOFT_ACK_TIMEOUT_PERIOD (65*10UL) +#define UV2_INTD_SOFT_ACK_TIMEOUT_PERIOD (15UL)#define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD (is_uv1_hub() ? \ UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD : \
@@ -106,12 +106,20 @@#define DS_SOURCE_TIMEOUT 3/* * bits put together from HRP_LB_BAU_SB_ACTIVATION_STATUS_0/1/2 -* values 1 and 5 will not occur +* values 1 and 3 will not occur +* Decoded meaning ERROR BUSY AUX ERR +* ------------------------------- ---- ----- ------- +* IDLE 0 0 0 +* BUSY (active) 0 1 0 +* SW Ack Timeout (destination) 1 0 0 +* SW Ack INTD rejected (strong NACK) 1 0 1 +* Source Side Time Out Detected 1 1 0 +* Destination Side PUT Failed 1 1 1 */ #define UV2H_DESC_IDLE 0 -#define UV2H_DESC_DEST_TIMEOUT 2 -#define UV2H_DESC_DEST_STRONG_NACK 3 -#define UV2H_DESC_BUSY 4 +#define UV2H_DESC_BUSY 2 +#define UV2H_DESC_DEST_TIMEOUT 4 +#define UV2H_DESC_DEST_STRONG_NACK 5#define UV2H_DESC_SOURCE_TIMEOUT 6#define UV2H_DESC_DEST_PUT_ERR 7
@@ -183,7 +191,7 @@* 'base_dest_nasid' field of the header corresponds to the * destination nodeID associated with that specified bit. */ -struct bau_targ_hubmask { +struct pnmask {unsigned long bits[BITS_TO_LONGS (UV_DISTRIBUTION_SIZE )]; };
@@ -314,7 +322,7 @@ struct bau_msg_header {* Should be 64 bytes */ struct bau_desc { -struct bau_targ_hubmask distribution; +struct pnmask distribution;/* * message template, consisting of header and payload: */
@@ -488,6 +496,7 @@ struct bau_control {struct bau_control *uvhub_master;struct bau_control *socket_master;struct ptc_stats *statp; +cpumask_t *cpumask;unsigned long timeout_interval;unsigned long set_bau_on_time;atomic_t active_descriptor_count;
@@ -526,90 +535,90 @@ struct bau_control {struct hub_and_pnode *thp; }; -static unsigned long read_mmr_uv2_status (void ) +static inline unsigned long read_mmr_uv2_status (void ) {return read_lmmr (UV2H_LB_BAU_SB_ACTIVATION_STATUS_2 ); } -static void write_mmr_data_broadcast (int pnode,unsigned long mmr_image) +static inline void write_mmr_data_broadcast (int pnode,unsigned long mmr_image) {write_gmmr (pnode,UVH_BAU_DATA_BROADCAST , mmr_image); } -static void write_mmr_descriptor_base (int pnode,unsigned long mmr_image) +static inline void write_mmr_descriptor_base (int pnode,unsigned long mmr_image) {write_gmmr (pnode,UVH_LB_BAU_SB_DESCRIPTOR_BASE , mmr_image); } -static void write_mmr_activation (unsigned long index) +static inline void write_mmr_activation (unsigned long index) {write_lmmr (UVH_LB_BAU_SB_ACTIVATION_CONTROL , index); } -static void write_gmmr_activation (int pnode,unsigned long mmr_image) +static inline void write_gmmr_activation (int pnode,unsigned long mmr_image) {write_gmmr (pnode,UVH_LB_BAU_SB_ACTIVATION_CONTROL , mmr_image); } -static void write_mmr_payload_first (int pnode,unsigned long mmr_image) +static inline void write_mmr_payload_first (int pnode,unsigned long mmr_image) {write_gmmr (pnode,UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST , mmr_image); } -static void write_mmr_payload_tail (int pnode,unsigned long mmr_image) +static inline void write_mmr_payload_tail (int pnode,unsigned long mmr_image) {write_gmmr (pnode,UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL , mmr_image); } -static void write_mmr_payload_last (int pnode,unsigned long mmr_image) +static inline void write_mmr_payload_last (int pnode,unsigned long mmr_image) {write_gmmr (pnode,UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST , mmr_image); } -static void write_mmr_misc_control (int pnode,unsigned long mmr_image) +static inline void write_mmr_misc_control (int pnode,unsigned long mmr_image) {write_gmmr (pnode,UVH_LB_BAU_MISC_CONTROL , mmr_image); } -static unsigned long read_mmr_misc_control (int pnode) +static inline unsigned long read_mmr_misc_control (int pnode) {return read_gmmr (pnode,UVH_LB_BAU_MISC_CONTROL ); } -static void write_mmr_sw_ack (unsigned long mr) +static inline void write_mmr_sw_ack (unsigned long mr) {uv_write_local_mmr (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS , mr); } -static unsigned long read_mmr_sw_ack (void ) +static inline unsigned long read_mmr_sw_ack (void ) {return read_lmmr (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE ); } -static unsigned long read_gmmr_sw_ack (int pnode) +static inline unsigned long read_gmmr_sw_ack (int pnode) {return read_gmmr (pnode,UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE ); } -static void write_mmr_data_config (int pnode,unsigned long mr) +static inline void write_mmr_data_config (int pnode,unsigned long mr) {uv_write_global_mmr64 (pnode,UVH_BAU_DATA_CONFIG , mr); } -static inline int bau_uvhub_isset (int uvhub,struct bau_targ_hubmask *dstp) +static inline int bau_uvhub_isset (int uvhub,struct pnmask *dstp) {return constant_test_bit (uvhub, &dstp->bits[0 ]); } -static inline void bau_uvhub_set (int pnode,struct bau_targ_hubmask *dstp) +static inline void bau_uvhub_set (int pnode,struct pnmask *dstp) {__set_bit (pnode, &dstp->bits[0 ]); } -static inline void bau_uvhubs_clear (struct bau_targ_hubmask *dstp, +static inline void bau_uvhubs_clear (struct pnmask *dstp,int nbits) {bitmap_zero (&dstp->bits[0 ], nbits); } -static inline int bau_uvhub_weight (struct bau_targ_hubmask *dstp) +static inline int bau_uvhub_weight (struct pnmask *dstp) {return bitmap_weight ((unsigned long *)&dstp->bits[0 ],UV_DISTRIBUTION_SIZE );
arch/x86/include/asm/uv/uv_mmrs.h +1608 -1281
2,837 lines not on this page · raw message
arch/x86/platform/uv/tlb_uv.c +47 -22
69 lines not on this page · raw message
The rest of this diff is not shown. View the raw message.
Part of the diff is not shown here. View the raw message.