timers/clocksource change for v3.1

GIT PULL Ingo Molnar 1 participant 1 message Jul 23, 2011

Subsystems (2)

x86 Clocksource, clockevent drivers

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Ingo Molnar

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2011-07-23 09:02 UTC #0 lore raw

Linus,

Please pull the latest timers-clocksource-for-linus git tree from:

git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip.git timers-clocksource-for-linus

Thanks,

Ingo

------------------>
Jamie Iles (1):
clocksource: apb: Share APB timer code with other platforms

 arch/x86/Kconfig                   |    1 +
 arch/x86/include/asm/apb_timer.h   |   22 +--
 arch/x86/kernel/apb_timer.c        |  409 ++++++------------------------------
 drivers/clocksource/Kconfig        |    3 +
 drivers/clocksource/Makefile       |    1 +
 drivers/clocksource/dw_apb_timer.c |  401 +++++++++++++++++++++++++++++++++++
 include/linux/dw_apb_timer.h       |   56 +++++
 7 files changed, 533 insertions(+), 360 deletions(-)
 create mode 100644 drivers/clocksource/dw_apb_timer.c
 create mode 100644 include/linux/dw_apb_timer.h

arch/x86/Kconfig +1 -0

index da34972..10ce62f 100644
@@ -617,6 +617,7 @@ config HPET_EMULATE_RTC
 config APB_TIMER
        def_bool y if MRST
        prompt "Langwell APB Timer Support" if X86_MRST
+       select DW_APB_TIMER
        help
          APB timer is the replacement for 8254, HPET on X86 MID platforms.
          The APBT provides a stable time base on SMP

arch/x86/include/asm/apb_timer.h +2 ~~-20~~

index 2fefa50..230000f 100644
@@ -18,24 +18,6 @@
 
 #ifdef CONFIG_APB_TIMER
 
-/* Langwell DW APB timer registers */
-#define APBTMR_N_LOAD_COUNT    0x00
-#define APBTMR_N_CURRENT_VALUE 0x04
-#define APBTMR_N_CONTROL       0x08
-#define APBTMR_N_EOI           0x0c
-#define APBTMR_N_INT_STATUS    0x10
-
-#define APBTMRS_INT_STATUS     0xa0
-#define APBTMRS_EOI            0xa4
-#define APBTMRS_RAW_INT_STATUS 0xa8
-#define APBTMRS_COMP_VERSION   0xac
-#define APBTMRS_REG_SIZE       0x14
-
-/* register bits */
-#define APBTMR_CONTROL_ENABLE  (1<<0)
-#define APBTMR_CONTROL_MODE_PERIODIC   (1<<1) /*1: periodic 0:free running */
-#define APBTMR_CONTROL_INT     (1<<2)
-
 /* default memory mapped register base */
 #define LNW_SCU_ADDR           0xFF100000
 #define LNW_EXT_TIMER_OFFSET   0x1B800

@@ -43,8 +25,8 @@
 #define LNW_EXT_TIMER_PGOFFSET         0x800
 
 /* APBT clock speed range from PCLK to fabric base, 25-100MHz */
-#define APBT_MAX_FREQ          50
-#define APBT_MIN_FREQ          1
+#define APBT_MAX_FREQ          50000000
+#define APBT_MIN_FREQ          1000000
 #define APBT_MMAP_SIZE         1024
 
 #define APBT_DEV_USED  1

arch/x86/kernel/apb_timer.c +69 ~~-340~~

609 lines not on this page · raw message

drivers/clocksource/Kconfig +3 -0

index 96c9219..141417f 100644
@@ -3,3 +3,6 @@ config CLKSRC_I8253
 
 config CLKSRC_MMIO
 	bool
+
+config DW_APB_TIMER
+	bool

drivers/clocksource/Makefile +1 -0

index b995942..4c3d8fd 100644
@@ -8,3 +8,4 @@ obj-$(CONFIG_SH_TIMER_MTU2)	+= sh_mtu2.o
 obj-$(CONFIG_SH_TIMER_TMU)	+= sh_tmu.o
 obj-$(CONFIG_CLKSRC_I8253)	+= i8253.o
 obj-$(CONFIG_CLKSRC_MMIO)	+= mmio.o
+obj-$(CONFIG_DW_APB_TIMER)	+= dw_apb_timer.o

drivers/clocksource/dw_apb_timer.c new file +401 -0

401 lines not on this page · raw message

include/linux/dw_apb_timer.h new file +56 -0

56 lines not on this page · raw message