perf: remove deprecated warn_on_once()
Subsystems (2)
PATCH 1/1 perf: remove deprecated warn_on_once()
With the new throttling/unthrottling code introduced with commit e050e3f, we hit two warn_on_once() in:
- intel_pmu_pebs_enable()
- intel_pmu_lbr_enable()
The assertions are no longer problematic. There is a valid path where they can trigger but it is harmless.
The assertion can be triggered with:
$ perf record -e instructions:pp ....
Leading to paths:
intel_pmu_pebs_enable
intel_pmu_enable_event
x86_perf_event_set_period
x86_pmu_start
perf_adjust_freq_unthr_context
perf_event_task_tick
scheduler_tick
And:
intel_pmu_lbr_enable
intel_pmu_enable_event
x86_perf_event_set_period
x86_pmu_start
perf_adjust_freq_unthr_context.
perf_event_task_tick
scheduler_tick
cpuc->enabled is always on because when we get to perf_adjust_freq_unthr_context() the PMU is not totally disabled. Furthermore when we need to adjust a period, we only stop the event we need to change and not the entire PMU. Thus, when we re-enable, cpuc->enabled is already set. Note that when we stop the event, both pebs and lbr are stopped if necessary (and possible).
---
arch/x86/kernel/cpu/perf_event_intel_ds.c +0 -1
@@ -439,7 +439,6 @@ void intel_pmu_pebs_enable(struct perf_event *event) hwc->config &= ~ARCH_PERFMON_EVENTSEL_INT ; cpuc->pebs_enabled |=1ULL << hwc->idx; -WARN_ON_ONCE (cpuc->enabled);if (x86_pmu.intel_cap.pebs_trap && event->attr.precise_ip >1 )intel_pmu_lbr_enable (event);
arch/x86/kernel/cpu/perf_event_intel_lbr.c +0 -2
@@ -72,8 +72,6 @@ void intel_pmu_lbr_enable(struct perf_event *event)if (!x86_pmu.lbr_nr)return ; -WARN_ON_ONCE (cpuc->enabled); -/* * Reset the LBR stack if we changed task context to * avoid data leaks.
[tip:perf/urgent] perf: Remove deprecated WARN_ON_ONCE()
Commit-ID: 84f2b9b2edc09595569c7397cc3c888764ffd78b Gitweb: http://git.kernel.org/tip/84f2b9b2edc09595569c7397cc3c888764ffd78b Author: Stephane Eranian <[email protected]> AuthorDate: Thu, 2 Feb 2012 12:04:01 +0100 Committer: Ingo Molnar <[email protected]> CommitDate: Fri, 3 Feb 2012 08:24:40 +0100
perf: Remove deprecated WARN_ON_ONCE()
With the new throttling/unthrottling code introduced with commit:
e050e3f0a71b ("perf: Fix broken interrupt rate throttling")
we occasionally hit two WARN_ON_ONCE() checks in:
- intel_pmu_pebs_enable()
- intel_pmu_lbr_enable()
- x86_pmu_start()
The assertions are no longer problematic. There is a valid path where they can trigger but it is harmless.
The assertion can be triggered with:
$ perf record -e instructions:pp ....
Leading to paths:
intel_pmu_pebs_enable
intel_pmu_enable_event
x86_perf_event_set_period
x86_pmu_start
perf_adjust_freq_unthr_context
perf_event_task_tick
scheduler_tick
And:
intel_pmu_lbr_enable
intel_pmu_enable_event
x86_perf_event_set_period
x86_pmu_start
perf_adjust_freq_unthr_context.
perf_event_task_tick
scheduler_tick
cpuc->enabled is always on because when we get to perf_adjust_freq_unthr_context() the PMU is not totally disabled. Furthermore when we need to adjust a period, we only stop the event we need to change and not the entire PMU. Thus, when we re-enable, cpuc->enabled is already set. Note that when we stop the event, both pebs and lbr are stopped if necessary (and possible).
--- arch/x86/kernel/cpu/perf_event.c | 3 --- arch/x86/kernel/cpu/perf_event_intel_ds.c | 1 - arch/x86/kernel/cpu/perf_event_intel_lbr.c | 2 -- 3 files changed, 0 insertions(+), 6 deletions(-)
arch/x86/kernel/cpu/perf_event.c +0 -3
@@ -986,9 +986,6 @@ static void x86_pmu_start(struct perf_event *event, int flags)struct cpu_hw_events *cpuc = &__get_cpu_var (cpu_hw_events);int idx = event->hw.idx; -if (WARN_ON_ONCE (!(event->hw.state &PERF_HES_STOPPED ))) -return ; -if (WARN_ON_ONCE (idx ==-1 ))return ;
arch/x86/kernel/cpu/perf_event_intel_ds.c +0 -1
@@ -439,7 +439,6 @@ void intel_pmu_pebs_enable(struct perf_event *event) hwc->config &= ~ARCH_PERFMON_EVENTSEL_INT ; cpuc->pebs_enabled |=1ULL << hwc->idx; -WARN_ON_ONCE (cpuc->enabled);if (x86_pmu.intel_cap.pebs_trap && event->attr.precise_ip >1 )intel_pmu_lbr_enable (event);
arch/x86/kernel/cpu/perf_event_intel_lbr.c +0 -2
@@ -72,8 +72,6 @@ void intel_pmu_lbr_enable(struct perf_event *event)if (!x86_pmu.lbr_nr)return ; -WARN_ON_ONCE (cpuc->enabled); -/* * Reset the LBR stack if we changed task context to * avoid data leaks.