Add support for Mini2440

---
Changes for v2:
- Coding style cleanup
- Remove unnecessary files modification
- Remove unnecessary board configuration set

---
 arch/arm/include/asm/arch-s3c24x0/s3c24x0.h |   51 +-----
 board/friendlyarm/mini2440/Makefile         |   45 +++++
 board/friendlyarm/mini2440/lowlevel_init.S  |  177 +++++++++++++++++
 board/friendlyarm/mini2440/mini2440.c       |  283
+++++++++++++++++++++++++++ boards.cfg                                  | 
  1 +
 include/configs/mini2440.h                  |  203 +++++++++++++++++++
 6 files changed, 710 insertions(+), 50 deletions(-)
 create mode 100644 board/friendlyarm/mini2440/Makefile
 create mode 100644 board/friendlyarm/mini2440/lowlevel_init.S
 create mode 100644 board/friendlyarm/mini2440/mini2440.c
 create mode 100644 include/configs/mini2440.h

(quoted diff) +0 -0

b/arch/arm/include/asm/arch-s3c24x0/s3c24x0.h index ca978c9..96e623b 100644

arch/arm/include/asm/arch-s3c24x0/s3c24x0.h +1 -40

@@ -416,7 +416,7 @@ struct s3c24x0_gpio {
 	u32	misccr;
 	u32	extint;
 #endif
-#ifdef CONFIG_S3C2410
+#if defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
 	u32	gpacon;
 	u32	gpadat;
 	u32	res1[2];

@@ -467,55 +467,6 @@ struct s3c24x0_gpio {
 	u32	gstatus4;
 #endif
 #if defined(CONFIG_S3C2440)
-	u32	gpacon;
-	u32	gpadat;
-	u32	res1[2];
-	u32	gpbcon;
-	u32	gpbdat;
-	u32	gpbup;
-	u32	res2;
-	u32	gpccon;
-	u32	gpcdat;
-	u32	gpcup;
-	u32	res3;
-	u32	gpdcon;
-	u32	gpddat;
-	u32	gpdup;
-	u32	res4;
-	u32	gpecon;
-	u32	gpedat;
-	u32	gpeup;
-	u32	res5;
-	u32	gpfcon;
-	u32	gpfdat;
-	u32	gpfup;
-	u32	res6;
-	u32	gpgcon;
-	u32	gpgdat;
-	u32	gpgup;
-	u32	res7;
-	u32	gphcon;
-	u32	gphdat;
-	u32	gphup;
-	u32	res8;
-
-	u32	misccr;
-	u32	dclkcon;
-	u32	extint0;
-	u32	extint1;
-	u32	extint2;
-	u32	eintflt0;
-	u32	eintflt1;

board/friendlyarm/mini2440/Makefile new file +43 -0

+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS	:= mini2440.o
+SOBJS	:= lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

(quoted diff) +0 -0

b/board/friendlyarm/mini2440/lowlevel_init.S new file mode 100644 index 0000000..2a057ea

board/friendlyarm/mini2440/lowlevel_init.S new file +26 -0

+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+
+/*
+ * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
+ * Copyright (C) 2002 Samsung Electronics SW.LEE 

<[email protected]> + */

board/friendlyarm/mini2440/lowlevel_init.S new file +71 -0

+
+#define BWSCON      0x48000000
+#define INTMSK      0x4A000008	/* Interupt-Controller base addresses */
+#define INTSUBMSK   0x4A00001C
+
+/* BWSCON */
+#define DW8			(0x0)
+#define DW16		(0x1)
+#define DW32		(0x2)
+#define WAIT		(0x1<<2)
+#define UBLB		(0x1<<3)
+
+#define B1_BWSCON		(DW32)
+#define B2_BWSCON		(DW16)
+#define B3_BWSCON		(DW16 + WAIT + UBLB)
+#define B4_BWSCON		(DW16 + WAIT + UBLB)
+#define B5_BWSCON		(DW16)
+#define B6_BWSCON		(DW32)
+#define B7_BWSCON		(DW32)
+
+/* BANK0CON */
+#define B0_Tacs			0x0	/*  0clk */
+#define B0_Tcos			0x0	/*  0clk */
+#define B0_Tacc			0x7	/* 14clk */
+#define B0_Tcoh			0x0	/*  0clk */
+#define B0_Tah			0x0	/*  0clk */
+#define B0_Tacp			0x0
+#define B0_PMC			0x0	/* normal */
+
+/* BANK1CON */
+#define B1_Tacs			0x0	/*  0clk */
+#define B1_Tcos			0x0	/*  0clk */
+#define B1_Tacc			0x7	/* 14clk */
+#define B1_Tcoh			0x0	/*  0clk */
+#define B1_Tah			0x0	/*  0clk */
+#define B1_Tacp			0x0
+#define B1_PMC			0x0
+
+#define B2_Tacs			0x0
+#define B2_Tcos			0x0
+#define B2_Tacc			0x7
+#define B2_Tcoh			0x0
+#define B2_Tah			0x0
+#define B2_Tacp			0x0
+#define B2_PMC			0x0
+
+#define B3_Tacs			0x0	/*  0clk */
+#define B3_Tcos			0x3	/*  4clk */
+#define B3_Tacc			0x7	/* 14clk */
+#define B3_Tcoh			0x1	/*  1clk */
+#define B3_Tah			0x3	/*  4clk */
+#define B3_Tacp			0x0 /*  2clk */
+#define B3_PMC			0x0	/* normal */
+
+#define B4_Tacs			0x0
+#define B4_Tcos			0x3
+#define B4_Tacc			0x7
+#define B4_Tcoh			0x1
+#define B4_Tah			0x3
+#define B4_Tacp			0x0
+#define B4_PMC			0x0
+
+#define B5_Tacs			0x0	/*  0clk */
+#define B5_Tcos			0x0	/*  0clk */
+#define B5_Tacc			0x7	/* 14clk */
+#define B5_Tcoh			0x0	/*  0clk */
+#define B5_Tah			0x0	/*  0clk */
+#define B5_Tacp			0x0
+#define B5_PMC			0x0	/* normal */
+
+#define SDRAM_MT		0x3	/* SDRAM */

board/friendlyarm/mini2440/lowlevel_init.S new file +36 -0

+	mov	r1, #0xffffffff
+	ldr	r0, =INTMSK
+	str	r1, [r0]
+
+	ldr	r1, =0x7fff
+	ldr	r0, =INTSUBMSK
+	str	r1, [r0]
+
+	/* memory control configuration */
+	/* make r0 relative the current location so that it */
+	/* reads SMRDATA out of FLASH rather than memory ! */
+	ldr     r0, =SMRDATA
+	ldr	r1, _TEXT_BASE
+	sub	r0, r0, r1
+	ldr	r1, =BWSCON	/* Bus Width Status Controller */
+	add     r2, r0, #13*4
+0:
+	ldr     r3, [r0], #4
+	str     r3, [r1], #4
+	cmp     r2, r0
+	bne     0b
+
+	/*
+	 * SDRAM configuration for 64MB
+	 */
+	ldr	r1, =BWSCON+(7*4)
+	ldr	r0, =SDRAM_64MB
+	str	r0, [r1], #4
+	str	r0, [r1]
+return:
+	/* everything is fine now */
+	mov	pc, lr
+
+	.ltorg
+SMRDATA:
+    .word

(0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCO
N<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28)) + .word
((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tac
p<<2)+(B0_PMC)) + .word
((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tac
p<<2)+(B1_PMC)) + .word
((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tac

p<<2)+(B2_PMC)) + .word
((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tac
p<<2)+(B3_PMC)) + .word
((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tac
p<<2)+(B4_PMC)) + .word
((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tac
p<<2)+(B5_PMC)) + .word SDRAM_128MB
+ .word SDRAM_128MB

board/friendlyarm/mini2440/lowlevel_init.S new file +4 -0

+    .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
+    .word 0xb2 /* enable burst */
+    .word 0x30
+    .word 0x30

(quoted diff) +0 -0

b/board/friendlyarm/mini2440/mini2440.c new file mode 100644 index 0000000..ecfb519

board/friendlyarm/mini2440/mini2440.c new file +45 -0

@@ -0,0 +1,283 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <[email protected]>
+ *
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <[email protected]>
+ *
+ * (C) Copyright 2009
+ * Michel Pollet <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/s3c2440.h>
+#include <video_fb.h>
+
+#ifdef CONFIG_DRIVER_DM9000
+#include <netdev.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* FCLK = 405 MHz, HCLK = 101 MHz, PCLK = 50 MHz, UCLK = 48 MHz */
+#define CLKDIVN_VAL	7
+#define M_MDIV		0x7f
+#define M_PDIV		0x2
+#define M_SDIV		0x1

board/friendlyarm/mini2440/mini2440.c new file +15 -0

+
+//TFT 240320
+#define LCD_XSIZE_TFT_240320	(240)
+#define LCD_YSIZE_TFT_240320	(320)
+
+//TFT240320
+#define HOZVAL_TFT_240320	(LCD_XSIZE_TFT_240320-1)
+#define LINEVAL_TFT_240320	(LCD_YSIZE_TFT_240320-1)
+
+//Timing parameter for NEC3.5"
+#define VBPD_240320		(3)
+#define VFPD_240320		(10)
+#define VSPW_240320		(1)
+
+#define HBPD_240320		(5)

board/friendlyarm/mini2440/mini2440.c new file +5 -0

+}
+
+int arch_cpu_init (void)
+{
+	struct s3c24x0_clock_power * const clk_power =

s3c24x0_get_base_clock_power(); + int i;

board/friendlyarm/mini2440/mini2440.c new file +16 -0

+
+	/* configure MPLL */
+	clk_power->mpllcon = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
+
+	/* some delay between MPLL and UPLL */
+	for(i = 0; i < 500000; i++);
+
+	return 0;
+}
+
+/*
+ * Miscellaneous platform dependent initialisations
+ */
+int board_init (void)
+{
+	struct s3c24x0_clock_power * const clk_power =

s3c24x0_get_base_clock_power(); + struct s3c24x0_gpio * const gpio =
s3c24x0_get_base_gpio();

board/friendlyarm/mini2440/mini2440.c new file +29 -0

+
+	/* to reduce PLL lock time, adjust the LOCKTIME register */
+	clk_power->locktime = 0xFFFFFF;
+	clk_power->clkdivn = CLKDIVN_VAL;
+
+	/* configure UPLL */
+	clk_power->upllcon = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
+	/* some delay between MPLL and UPLL */
+	delay (10);
+	/* configure MPLL */
+	clk_power->mpllcon = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
+
+	/* some delay between MPLL and UPLL */
+	delay (8000);
+
+	gpio->gpacon = 0x007FFFFF;	/* Port A is all "special" */
+	// port B outputs reconfigured
+	gpio->gpbcon =
+		(0x1 <<  0) | // GPB0	OUT	TOUT0		PWM Buzzer
+		(0x2 <<  2) | // GPB1	OUT	TOUT1		LCD Backlight
+		(0x1 <<  4) | // GPB2	OUT	L3MODE
+		(0x1 <<  6) | // GBP3	OUT	L3DATA
+		(0x1 <<  8) | // GBP4	OUT	L3CLOCK
+		(0x1 << 10) | // GBP5	OUT	LED1
+		(0x1 << 12) | // GBP6	OUT	LED2
+		(0x1 << 14) | // GBP7	OUT	LED3
+		(0x1 << 16) | // GBP8	OUT	LED4
+		(0x2 << 18) | // GBP9	---	nXDACK0		CON5 EBI
+		(0x2 << 20) | // GBP10	---	nXDREQ0		CON5 EBI

board/friendlyarm/mini2440/mini2440.c new file +17 -0

+	gpio->gpccon	= (0xAAAAAAAA &	/* all default IN but ... */
+			~(0x3 << 10)) |	/* not pin 5 ... */
+		(0x1 << 10);	/* that is output (USBD) */
+	gpio->gpcup	= 0xFFFFFFFF;
+	gpio->gpcdat	= 0;
+
+	gpio->gpdcon	= 0xAAAAAAAA;
+	gpio->gpdup	= 0xFFFFFFFF;
+	// port E is set for all it's special functions (i2c, spi etc)
+	gpio->gpecon	= 0xAAAAAAAA;
+	gpio->gpeup	= 0x0000FFFF;
+
+	gpio->gpfcon	=
+		(0x1 <<  0) | // GPG0	EINT0	OUT
+		(0x1 <<  2) | // GPG1	EINT1	OUT
+		(0x1 <<  4) | // GPG2	EINT2	OUT
+		(0x1 <<  6) | // GPG3	EINT3	OUT

board/friendlyarm/mini2440/mini2440.c new file +4 -0

+	gpio->gpgcon	=
+		(0x0 <<  0) | // GPG0	EINT8	IN	Key1
+		(0x1 <<  2) | // GPG1	EINT9	OUT		Con5
+		(0x1 <<  4) | // GPG2	EINT10	OUT

board/friendlyarm/mini2440/mini2440.c new file +22 -0

+		(0x0 << 26) | // GPG13	EINT18	IN	// hard pullups
+		(0x0 << 28) | // GPG14	EINT18	IN
+		(0x0 << 30) | // GPG15	EINT18	IN
+		0;
+	gpio->gpgup = (1 << 15) -1;	// disable pullups for all pins
+
+	gpio->gphcon =
+		(0x2 <<  0) | // GPH0	nCTS0			---
+		(0x2 <<  2) | // GPH1	nRTS0			---
+		(0x2 <<  4) | // GPH2	TXD0			---
+		(0x2 <<  6) | // GPH3	RXD0			---
+		(0x2 <<  8) | // GPH4	TXD1			---
+		(0x2 << 10) | // GPH5	RXD1			---
+		(0x2 << 12) | // GPH6	[TXD2]	nRTS1
+		(0x2 << 14) | // GPH7	[RXD2]	nCTS1
+		(0x1 << 16) | // GPH8	UEXTCLK			OUT
+		(0x1 << 18) | // GPH9	CLKOUT0			OUT
+		(0x1 << 20) | // GPH10	CLKOUT1			OUT
+		0;
+	gpio->gphup = (1 << 10) - 1; // disable pullups for all pins
+
+	gpio->extint0=0x22222222;

board/friendlyarm/mini2440/mini2440.c new file +18 -0

+	gd->bd->bi_arch_number = MACH_TYPE_MINI2440;
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = 0x30000100;
+
+	return 0;
+}
+
+void board_video_init(GraphicDevice *pGD)
+{
+	struct s3c24x0_lcd * const lcd = s3c24x0_get_base_lcd();
+
+	/* FIXME: select LCM type by env variable */
+	/* Configuration for GTA01 LCM on QT2410 */
+	lcd->lcdcon1 = 0x00000378; /* CLKVAL=4, BPPMODE=16bpp, TFT, ENVID=0 */
+	lcd->lcdcon5 = 0x00000f09;
+
+	lcd->lcdcon2 =

(VBPD_240320<<24)|(LINEVAL_TFT_240320<<14)|(VFPD_240320<<6)|(VSPW_240320);

board/friendlyarm/mini2440/mini2440.c new file +5 -0

+	lcd->lcdcon3 = (HBPD_240320<<19)|(HOZVAL_TFT_240320<<8)|(HFPD_240320);
+	lcd->lcdcon4 = (MVAL<<8)|(HSPW_240320);
+
+	lcd->lpcsel  = 0x00000000;
+}

board/friendlyarm/mini2440/mini2440.c new file +18 -0

+}
+
+int dram_init (void)
+{
+	gd->ram_size = 64*1024*1024;
+	return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+#ifdef CONFIG_DRIVER_DM9000
+	return dm9000_initialize(bis);
+#else
+	return 0;
+#endif
+}
+
+/* The sum of all part_size[]s must equal to the NAND size, i.e.,

0x4000000 */ +unsigned int dynpart_size[] = { 0x40000, 0x20000, 0x500000, 0xffffffff, 0 }; +char *dynpart_names[] = { "u-boot", "u-boot_env", "kernel", "rootfs", NULL }; diff --git a/boards.cfg b/boards.cfg index 3cf75c3..93eeb3c 100644

boards.cfg +0 -0

@@ -61,6 +61,7 @@ mx1ads                       arm         arm920t     -   
               - scb9328                      arm         arm920t     -   
               -              imx cm4008                       arm        

arm920t - - ks8695 cm41xx
arm arm920t - - ks8695
+mini2440 arm arm920t mini2440
friendlyarm s3c24x0 VCMA9 arm arm920t
vcma9 mpl s3c24x0 smdk2410
arm arm920t - samsung s3c24x0
omap1510inn arm arm925t -
ti diff --git a/include/configs/mini2440.h b/include/configs/mini2440.h new file mode 100644
index 0000000..8b04a76

include/configs/mini2440.h new file +33 -0

@@ -0,0 +1,203 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <[email protected]>
+ * Gary Jennejohn <[email protected]>
+ * David Mueller <[email protected]>
+ *
+ * (C) Copyright 2009-2010
+ * Michel Pollet <[email protected]>
+ *
+ * (C) Copyright 2012
+ * Gabriel Huau <[email protected]>
+ *
+ * Configuation settings for the MINI2440 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */

*/

include/configs/mini2440.h new file +10 -0

+#define CONFIG_MINI2440		1	/* on a MIN2440 Board  */
+
+/*
+ * It is possible to have u-boot save it's environment in NOR, however,
+ * reember it is incompatible with booting from NAND as the NOR is not
+ * available at that point. So use this only if you use nand as storage
+ * and will never boot from it
+ */
+#define CONFIG_MINI2440_NOR_ENV	1
+#define CONFIG_MINI2440_OVERCLOCK 1	/* allow use of frequencies over

405Mhz */ +

include/configs/mini2440.h new file +4 -0

+/*
+ * input clock of PLL
+ */
+#define CONFIG_SYS_CLK_FREQ	12000000	/* MINI2440 has 12.0000MHz input

clock */ +#define CONFIG_ARCH_CPU_INIT 1 /* for the initialization of PLL */ +

include/configs/mini2440.h new file +8 -0

+#define USE_920T_MMU		1
+#define CONFIG_BAUDRATE		115200
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2048*1024)
+#define CONFIG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial

data */ +

include/configs/mini2440.h new file +24 -0

+/*
+ * Hardware drivers
+ */
+#define CONFIG_DRIVER_DM9000		1
+#define CONFIG_DRIVER_DM9000_NO_EEPROM	1
+#define CONFIG_DM9000_BASE		0x20000300
+#define DM9000_IO			CONFIG_DM9000_BASE
+#define DM9000_DATA			(CONFIG_DM9000_BASE+4)
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_S3C24X0_SERIAL
+#define CONFIG_SERIAL1          1	/* we use SERIAL 1 on MINI2440 */
+
+/*
+ * allow to overwrite serial and ethaddr
+ */
+#define CONFIG_ENV_OVERWRITE
+
+/*
+ * Command definition
+ */
+#include <config_cmd_default.h>

+#define CONFIG_SYS_PROMPT "MINI2440 # " /* Monitor

Command Prompt */
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O

+#define CONFIG_SYS_PBSIZE

/* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 32

command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument

Size */ +
+#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on

+#define CONFIG_SYS_MEMTEST_END 0x34000000 /* 64 MB in DRAM

include/configs/mini2440.h new file +26 -0

+
+/*
+ * the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need
+ * it to wrap 100 times (total 1562500) to get 1 sec.
+ */
+#define	CONFIG_SYS_HZ			1562500
+
+/*
+ * valid baudrates
+ */
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Stack sizes
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ	(8*1024)	/* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
+#endif
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS        1          /* we have 1 bank of DRAM

*/ +#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */

include/configs/mini2440.h new file +5 -0

+					 GENERATED_GBL_DATA_SIZE)
+
+/*
+ * When booting from NAND, it is impossible to access the lowest addresses
+ * due to the SteppingStone being in the way. Luckily the NOR doesn't

really + * care about the highest 16 bits of address, so we set the controlers + * registers to go and poke over there, instead.
+ */

include/configs/mini2440.h new file +4 -0

+#define PHYS_FLASH_1 0x0
+#define CONFIG_SYS_FLASH_BASE		0x0
+
+/*

blocks */ +#define CONFIG_FLASH_SHOW_PROGRESS 1

include/configs/mini2440.h new file +6 -0

+
+/*
+ * u-boot environmnent
+ */
+#define CONFIG_BOOTDELAY	3
+#define CONFIG_BOOTARGS		"root=/dev/mtdblock3 rootfstype=jffs2

console=ttySAC0,115200" +#define CONFIG_ETHADDR

include/configs/mini2440.h new file +1 -0

+	/* This size must be the size of a common denominator for the NAND erase

block */ + #define CONFIG_ENV_SIZE 0x20000 /* 128k Total

environment */ + #define CONFIG_ENV_SIZE 0x4000 /* 16k

Environment Sector */ +#endif

include/configs/mini2440.h new file +10 -0

+#define CONFIG_PREBOOT_OVERRIDE	1
+
+/* ATAG configuration */
+#define CONFIG_INITRD_TAG		1
+#define CONFIG_SETUP_MEMORY_TAGS	1
+#define CONFIG_CMDLINE_TAG		1
+#define CONFIG_CMDLINE_EDITING		1
+#define CONFIG_AUTO_COMPLETE		1
+
+#endif	/* __CONFIG_H */

---
Changes for v2:
- Coding style cleanup
- Remove unnecessary files modification
- Remove unnecessary board configuration set

Changes for v3:
- Coding style cleanup
- Move some macro definition from lowlevel_init.S to a new header
- Remove some "magic bloat" with I/O board initialization
- Add a pll_delay and replace loop by it
- Somme cleanup in the configuration file
- Cancel modifications on an SoC specific header
- Add my name to copyright

---
 board/friendlyarm/mini2440/Makefile        |   45 ++++++
 board/friendlyarm/mini2440/lowlevel_init.S |   76 ++++++++++
 board/friendlyarm/mini2440/mini2440.c      |  139 ++++++++++++++++++
 board/friendlyarm/mini2440/mini2440.h      |  104 ++++++++++++++
 boards.cfg                                 |    1 +
 include/configs/mini2440.h                 |  215
++++++++++++++++++++++++++++ 6 files changed, 580 insertions(+)
 create mode 100644 board/friendlyarm/mini2440/Makefile
 create mode 100644 board/friendlyarm/mini2440/lowlevel_init.S
 create mode 100644 board/friendlyarm/mini2440/mini2440.c
 create mode 100644 board/friendlyarm/mini2440/mini2440.h
 create mode 100644 include/configs/mini2440.h

(quoted diff) +0 -0

b/board/friendlyarm/mini2440/Makefile new file mode 100644 index 0000000..e8d68cb

board/friendlyarm/mini2440/Makefile new file +45 -0

@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2012
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS	:= mini2440.o
+SOBJS	:= lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

(quoted diff) +0 -0

b/board/friendlyarm/mini2440/lowlevel_init.S new file mode 100644 index 0000000..f69a08c

board/friendlyarm/mini2440/lowlevel_init.S new file +63 -0

@@ -0,0 +1,76 @@
+/*
+ * Memory Setup stuff - taken from blob memsetup.S
+ *
+ * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw at its.tudelft.nl) and
+ *                     Jan-Derk Bakker (J.D.Bakker at its.tudelft.nl)
+ *
+ * Modified for the Samsung SMDK2410 by
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <[email protected]>
+ *
+ * (C) Copyright 2012
+ * Gabriel Huau <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+#include "mini2440.h"
+
+_TEXT_BASE:
+	.word	CONFIG_SYS_TEXT_BASE
+
+.globl lowlevel_init
+lowlevel_init:
+	/* memory control configuration */
+	/* make r0 relative the current location so that it */
+	/* reads SMRDATA out of FLASH rather than memory ! */
+	ldr     r0, =SMRDATA
+	ldr	r1, _TEXT_BASE
+	sub	r0, r0, r1
+	ldr	r1, =BWSCON	/* Bus Width Status Controller */
+	add     r2, r0, #13*4
+0:
+	ldr     r3, [r0], #4
+	str     r3, [r1], #4
+	cmp     r2, r0
+	bne     0b
+
+	/* everything is fine now */
+	mov	pc, lr
+
+	.ltorg
+/* the literal pools origin */
+
+SMRDATA:
+    .word

(0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCO
N<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28)) + .word
((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tac
p<<2)+(B0_PMC)) + .word
((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tac
p<<2)+(B1_PMC)) + .word
((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tac
p<<2)+(B2_PMC)) + .word
((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tac
p<<2)+(B3_PMC)) + .word
((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tac
p<<2)+(B4_PMC)) + .word
((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tac p<<2)+(B5_PMC)) +

(quoted diff) +0 -0

b/board/friendlyarm/mini2440/mini2440.c new file mode 100644 index 0000000..9ba8d39

board/friendlyarm/mini2440/mini2440.c new file +61 -0

@@ -0,0 +1,139 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <[email protected]>
+ *
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <[email protected]>
+ *
+ * (C) Copyright 2009
+ * Michel Pollet <[email protected]>
+ *
+ * (C) Copyright 2012
+ * Gabriel Huau <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/s3c2440.h>
+#include <asm/io.h>
+#include <video_fb.h>
+#include "mini2440.h"
+
+#ifdef CONFIG_DRIVER_DM9000
+#include <netdev.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static inline void pll_delay(unsigned long loops)
+{
+	__asm__ volatile ("1:\n"
+	  "subs %0, %1, #1\n"
+	  "bne 1b" : "=r" (loops) : "0" (loops));
+}
+
+int arch_cpu_init(void)
+{
+	struct s3c24x0_clock_power * const clk_power =
+					s3c24x0_get_base_clock_power();
+
+	/* to reduce PLL lock time, adjust the LOCKTIME register */
+	clk_power->locktime = 0xFFFFFF;
+	clk_power->clkdivn = CLKDIVN_VAL;
+

board/friendlyarm/mini2440/mini2440.c new file +66 -0

+
+	return 0;
+}
+
+/*
+ * Miscellaneous platform dependent initialisations
+ */
+int board_init(void)
+{
+	struct s3c24x0_clock_power * const clk_power =
+					s3c24x0_get_base_clock_power();
+	struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
+
+	/* to reduce PLL lock time, adjust the LOCKTIME register */
+	clk_power->locktime = 0xFFFFFF;
+	clk_power->clkdivn = CLKDIVN_VAL;
+
+	/* configure UPLL */
+	clk_power->upllcon = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
+	/* some delay between MPLL and UPLL */
+	udelay(10);
+	/* configure MPLL */
+	clk_power->mpllcon = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
+
+	/* some delay between MPLL and UPLL */
+	udelay(8000);
+
+	/* set up the I/O ports */
+	writel(0x007FFFFF, &gpio->gpacon);
+	writel(0x00044555, &gpio->gpbcon);
+	writel(0x000007FF, &gpio->gpbup);
+	writel(0xAAAAAAAA, &gpio->gpccon);
+	writel(0x0000FFFF, &gpio->gpcup);
+	writel(0xAAAAAAAA, &gpio->gpdcon);
+	writel(0x0000FFFF, &gpio->gpdup);
+	writel(0xAAAAAAAA, &gpio->gpecon);
+	writel(0x0000FFFF, &gpio->gpeup);
+	writel(0x000055AA, &gpio->gpfcon);
+	writel(0x000000FF, &gpio->gpfup);
+	writel(0xFF95FFBA, &gpio->gpgcon);
+	writel(0x0000FFFF, &gpio->gpgup);
+	writel(0x002AFAAA, &gpio->gphcon);
+	writel(0x000007FF, &gpio->gphup);
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_BOOT_PARAM_ADDR;
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->ram_size = PHYS_SDRAM_1_SIZE;
+	return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+#ifdef CONFIG_DRIVER_DM9000
+	return dm9000_initialize(bis);
+#else
+	return 0;
+#endif
+}
+
+/* The sum of all part_size[]s must equal to the NAND size, i.e.,

0x4000000 */ +unsigned int dynpart_size[] = { 0x40000, 0x20000, 0x500000, 0xffffffff, 0 }; +char *dynpart_names[] = { "u-boot", "u-boot_env", "kernel", "rootfs", NULL }; diff --git a/board/friendlyarm/mini2440/mini2440.h b/board/friendlyarm/mini2440/mini2440.h new file mode 100644 index 0000000..02197c8

board/friendlyarm/mini2440/mini2440.h new file +3 -0

@@ -0,0 +1,104 @@
+/*
+ * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
+ * Copyright (C) 2002 Samsung Electronics SW.LEE 

<[email protected]> + */

board/friendlyarm/mini2440/mini2440.h new file +100 -0

+
+#ifndef BOARD_LL_MINI2440_H
+#define BOARD_LL_MINI2440_H
+
+/*
+ * PLL/Clock configuration
+ */
+/* FCLK = 405 MHz, HCLK = 101 MHz, PCLK = 50 MHz, UCLK = 48 MHz */
+#define CLKDIVN_VAL	7
+#define M_MDIV		0x7f
+#define M_PDIV		0x2
+#define M_SDIV		0x1
+
+#define U_M_MDIV	0x38
+#define U_M_PDIV	0x2
+#define U_M_SDIV	0x2
+
+/* BWSCON */
+#define BWSCON	0x48000000
+#define DW8		(0x0)
+#define DW16	(0x1)
+#define DW32	(0x2)
+#define WAIT	(0x1<<2)
+#define UBLB	(0x1<<3)
+
+#define B1_BWSCON		(DW32)
+#define B2_BWSCON		(DW16)
+#define B3_BWSCON		(DW16 + WAIT + UBLB)
+#define B4_BWSCON		(DW16)
+#define B5_BWSCON		(DW16)
+#define B6_BWSCON		(DW32)
+#define B7_BWSCON		(DW32)
+
+/* BANK0CON */
+#define B0_Tacs		0x0	/*  0clk */
+#define B0_Tcos		0x0	/*  0clk */
+#define B0_Tacc		0x7	/* 14clk */
+#define B0_Tcoh		0x0	/*  0clk */
+#define B0_Tah		0x0	/*  0clk */
+#define B0_Tacp		0x0
+#define B0_PMC		0x0	/* normal */
+
+/* BANK1CON */
+#define B1_Tacs		0x0	/*  0clk */
+#define B1_Tcos		0x0	/*  0clk */
+#define B1_Tacc		0x7	/* 14clk */
+#define B1_Tcoh		0x0	/*  0clk */
+#define B1_Tah		0x0	/*  0clk */
+#define B1_Tacp		0x0
+#define B1_PMC		0x0
+
+#define B2_Tacs		0x0
+#define B2_Tcos		0x0
+#define B2_Tacc		0x7
+#define B2_Tcoh		0x0
+#define B2_Tah		0x0
+#define B2_Tacp		0x0
+#define B2_PMC		0x0
+
+#define B3_Tacs		0x0	/*  0clk */
+#define B3_Tcos		0x3	/*  4clk */
+#define B3_Tacc		0x7	/* 14clk */
+#define B3_Tcoh		0x1	/*  1clk */
+#define B3_Tah		0x0	/*  0clk */
+#define B3_Tacp		0x3     /*  6clk */
+#define B3_PMC		0x0	/* normal */
+
+#define B4_Tacs		0x0	/*  0clk */
+#define B4_Tcos		0x0	/*  0clk */
+#define B4_Tacc		0x7	/* 14clk */
+#define B4_Tcoh		0x0	/*  0clk */
+#define B4_Tah		0x0	/*  0clk */
+#define B4_Tacp		0x0
+#define B4_PMC		0x0	/* normal */
+
+#define B5_Tacs		0x0	/*  0clk */
+#define B5_Tcos		0x0	/*  0clk */
+#define B5_Tacc		0x7	/* 14clk */
+#define B5_Tcoh		0x0	/*  0clk */
+#define B5_Tah		0x0	/*  0clk */
+#define B5_Tacp		0x0
+#define B5_PMC		0x0	/* normal */
+
+#define B6_MT		0x3	/* SDRAM */
+#define B6_Trcd		0x1
+#define B6_SCAN		0x1	/* 9bit */
+
+#define B7_MT		0x3	/* SDRAM */
+#define B7_Trcd		0x1	/* 3clk */
+#define B7_SCAN		0x1	/* 9bit */
+
+/* REFRESH parameter */
+#define REFEN		0x1	/* Refresh enable */
+#define TREFMD		0x0	/* CBR(CAS before RAS)/Auto refresh */
+#define Trp			0x0	/* 2clk */
+#define Trc			0x3	/* 7clk */
+#define Tchr		0x2	/* 3clk */
+#define REFCNT		1113	/* period=15.6us, HCLK=60Mhz */
+
+#endif

boards.cfg +0 -0

index 3cf75c3..93eeb3c 100644
@@ -61,6 +61,7 @@ mx1ads                       arm         arm920t     -   
               - scb9328                      arm         arm920t     -   
               -              imx cm4008                       arm        

arm920t - - ks8695 cm41xx
arm arm920t - - ks8695
+mini2440 arm arm920t mini2440
friendlyarm s3c24x0 VCMA9 arm arm920t
vcma9 mpl s3c24x0 smdk2410
arm arm920t - samsung s3c24x0
omap1510inn arm arm925t -
ti diff --git a/include/configs/mini2440.h b/include/configs/mini2440.h new file mode 100644
index 0000000..a3f06d0

include/configs/mini2440.h new file +33 -0

@@ -0,0 +1,215 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <[email protected]>
+ * Gary Jennejohn <[email protected]>
+ * David Mueller <[email protected]>
+ *
+ * (C) Copyright 2009-2010
+ * Michel Pollet <[email protected]>
+ *
+ * (C) Copyright 2012
+ * Gabriel Huau <[email protected]>
+ *
+ * Configuation settings for the MINI2440 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */

include/configs/mini2440.h new file +61 -0

+#define CONFIG_S3C24X0		1	/* in a SAMSUNG S3C2440 SoC */
+#define CONFIG_S3C2440		1	/* in a SAMSUNG S3C2440 SoC */
+#define CONFIG_MINI2440		1	/* on a MIN2440 Board       */
+
+#define	MACH_TYPE_MINI2440	1999
+#define	CONFIG_MACH_TYPE	MACH_TYPE_MINI2440
+
+/*
+ * It is possible to have u-boot save it's environment in NOR, however,
+ * reember it is incompatible with booting from NAND as the NOR is not
+ * available at that point. So use this only if you use nand as storage
+ * and will never boot from it
+ */
+#define CONFIG_MINI2440_NOR_ENV	1
+/* allow use of frequencies over 405Mhz */
+#define CONFIG_MINI2440_OVERCLOCK 1
+
+/*
+ * input clock of PLL
+ */
+/* MINI2440 has 12.0000MHz input clock */
+#define CONFIG_SYS_CLK_FREQ	12000000
+#define CONFIG_ARCH_CPU_INIT 1 /* for the initialization of PLL */
+
+#define USE_920T_MMU		1
+#define CONFIG_BAUDRATE		115200
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + 2048*1024)
+/* size in bytes reserved for initial data */
+#define CONFIG_GBL_DATA_SIZE	128
+
+/*
+ * Hardware drivers
+ */
+#define CONFIG_DRIVER_DM9000			1
+#define CONFIG_DRIVER_DM9000_NO_EEPROM	1
+#define CONFIG_DM9000_BASE				0x20000300
+#define DM9000_IO		CONFIG_DM9000_BASE
+#define DM9000_DATA		(CONFIG_DM9000_BASE+4)
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_S3C24X0_SERIAL
+#define CONFIG_SERIAL1			1
+
+/*
+ * allow to overwrite serial and ethaddr
+ */
+#define CONFIG_ENV_OVERWRITE
+
+/*
+ * Command definition
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PORTIO

include/configs/mini2440.h new file +35 -0

+
+/* everything, incl board info, in Hz */
+#undef  CONFIG_CLKS_IN_HZ
+
+/* default load address	*/
+#define	CONFIG_SYS_LOAD_ADDR		0x32000000
+
+/* boot parameters address */
+#define	CONFIG_BOOT_PARAM_ADDR		0x30000100
+
+/*
+ * the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need
+ * it to wrap 100 times (total 1562500) to get 1 sec.
+ */
+#define	CONFIG_SYS_HZ			1562500
+
+/*
+ * valid baudrates
+ */
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Stack sizes
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ	(8*1024)	/* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
+#endif
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS        1          /* we have 1 bank of DRAM

*/ +#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */

include/configs/mini2440.h new file +5 -0

+							GENERATED_GBL_DATA_SIZE)
+
+/*
+ * When booting from NAND, it is impossible to access the lowest addresses
+ * due to the SteppingStone being in the way. Luckily the NOR doesn't

really + * care about the highest 16 bits of address, so we set the controlers + * registers to go and poke over there, instead.
+ */

include/configs/mini2440.h new file +18 -0

+#define PHYS_FLASH_1			0x0
+#define CONFIG_SYS_FLASH_BASE	0x0
+
+/*
+ * NOR FLASH organization
+ * Now uses the standard CFI interface
+ * FLASH and environment organization
+ */
+#define CONFIG_SYS_FLASH_CFI		1
+#define CONFIG_FLASH_CFI_DRIVER		1
+#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
+#define CONFIG_SYS_MONITOR_BASE		0x0
+/* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+/* 512 * 4096 sectors, or 32 * 64k blocks */
+#define CONFIG_SYS_MAX_FLASH_SECT	512
+#define CONFIG_FLASH_SHOW_PROGRESS	1
+

include/configs/mini2440.h new file +21 -0

+
+/*
+ * Config for NOR flash
+ */
+#define CONFIG_ENV_IS_IN_FLASH	1
+#define CONFIG_MY_ENV_OFFSET	0x40000
+/* addr of environment */
+#define CONFIG_ENV_ADDR		(PHYS_FLASH_1 + CONFIG_MY_ENV_OFFSET)
+/* 16k Total Size of Environment Sector */
+#define CONFIG_ENV_SIZE		0x4000
+
+#define CONFIG_PREBOOT_OVERRIDE	1
+
+/* ATAG configuration */
+#define CONFIG_INITRD_TAG			1
+#define CONFIG_SETUP_MEMORY_TAGS	1
+#define CONFIG_CMDLINE_TAG			1
+#define CONFIG_CMDLINE_EDITING		1
+#define CONFIG_AUTO_COMPLETE		1
+
+#endif	/* __CONFIG_H */

Dear Gabriel Huau,

Quoted 163 lines

---
Changes for v2:
- Coding style cleanup
- Remove unnecessary files modification
- Remove unnecessary board configuration set

Changes for v3:
- Coding style cleanup
- Move some macro definition from lowlevel_init.S to a new header
- Remove some "magic bloat" with I/O board initialization
- Add a pll_delay and replace loop by it
- Somme cleanup in the configuration file
- Cancel modifications on an SoC specific header
- Add my name to copyright

---
 board/friendlyarm/mini2440/Makefile        |   45 ++++++
 board/friendlyarm/mini2440/lowlevel_init.S |   76 ++++++++++
 board/friendlyarm/mini2440/mini2440.c      |  139 ++++++++++++++++++
 board/friendlyarm/mini2440/mini2440.h      |  104 ++++++++++++++
 boards.cfg                                 |    1 +
 include/configs/mini2440.h                 |  215
++++++++++++++++++++++++++++ 6 files changed, 580 insertions(+)
 create mode 100644 board/friendlyarm/mini2440/Makefile
 create mode 100644 board/friendlyarm/mini2440/lowlevel_init.S
 create mode 100644 board/friendlyarm/mini2440/mini2440.c
 create mode 100644 board/friendlyarm/mini2440/mini2440.h
 create mode 100644 include/configs/mini2440.h

(quoted diff) +0 -0

b/board/friendlyarm/mini2440/Makefile new file mode 100644 index 0000000..e8d68cb

board/friendlyarm/mini2440/Makefile new file +45 -0

@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2012
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS	:= mini2440.o
+SOBJS	:= lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

(quoted diff) +0 -0

b/board/friendlyarm/mini2440/lowlevel_init.S new file mode 100644 index 0000000..f69a08c

board/friendlyarm/mini2440/lowlevel_init.S new file +63 -0

@@ -0,0 +1,76 @@
+/*
+ * Memory Setup stuff - taken from blob memsetup.S
+ *
+ * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw at its.tudelft.nl) and
+ *                     Jan-Derk Bakker (J.D.Bakker at its.tudelft.nl)
+ *
+ * Modified for the Samsung SMDK2410 by
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <[email protected]>
+ *
+ * (C) Copyright 2012
+ * Gabriel Huau <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+#include "mini2440.h"
+
+_TEXT_BASE:
+	.word	CONFIG_SYS_TEXT_BASE
+
+.globl lowlevel_init
+lowlevel_init:
+	/* memory control configuration */
+	/* make r0 relative the current location so that it */
+	/* reads SMRDATA out of FLASH rather than memory ! */
+	ldr     r0, =SMRDATA
+	ldr	r1, _TEXT_BASE
+	sub	r0, r0, r1
+	ldr	r1, =BWSCON	/* Bus Width Status Controller */
+	add     r2, r0, #13*4
+0:
+	ldr     r3, [r0], #4
+	str     r3, [r1], #4
+	cmp     r2, r0
+	bne     0b
+
+	/* everything is fine now */
+	mov	pc, lr
+
+	.ltorg
+/* the literal pools origin */
+
+SMRDATA:
+    .word

(0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCO
N<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28)) + .word
((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tac
p<<2)+(B0_PMC)) + .word
((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tac
p<<2)+(B1_PMC)) + .word
((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tac
p<<2)+(B2_PMC)) + .word
((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tac
p<<2)+(B3_PMC)) + .word
((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tac
p<<2)+(B4_PMC)) + .word
((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tac p<<2)+(B5_PMC)) +

board/friendlyarm/mini2440/lowlevel_init.S line 76

Quoted 6 lines

board/friendlyarm/mini2440/lowlevel_init.S new file +6 -0

+    .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
+    .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
+    .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
+    .word 0x32
+    .word 0x30
+    .word 0x30

What this undocumented stuff?

Quoted 72 lines

(quoted diff) +0 -0

b/board/friendlyarm/mini2440/mini2440.c new file mode 100644 index 0000000..9ba8d39

board/friendlyarm/mini2440/mini2440.c new file +65 -0

@@ -0,0 +1,139 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <[email protected]>
+ *
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <[email protected]>
+ *
+ * (C) Copyright 2009
+ * Michel Pollet <[email protected]>
+ *
+ * (C) Copyright 2012
+ * Gabriel Huau <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/s3c2440.h>
+#include <asm/io.h>
+#include <video_fb.h>
+#include "mini2440.h"
+
+#ifdef CONFIG_DRIVER_DM9000
+#include <netdev.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static inline void pll_delay(unsigned long loops)
+{
+	__asm__ volatile ("1:\n"
+	  "subs %0, %1, #1\n"
+	  "bne 1b" : "=r" (loops) : "0" (loops));
+}
+
+int arch_cpu_init(void)
+{
+	struct s3c24x0_clock_power * const clk_power =
+					s3c24x0_get_base_clock_power();
+
+	/* to reduce PLL lock time, adjust the LOCKTIME register */
+	clk_power->locktime = 0xFFFFFF;
+	clk_power->clkdivn = CLKDIVN_VAL;
+
+	/* configure UPLL */
+	clk_power->upllcon = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
+	/* some delay between MPLL and UPLL */
+	pll_delay(100000);

board/friendlyarm/mini2440/mini2440.c line 71

Quoted 6 lines

board/friendlyarm/mini2440/mini2440.c new file +6 -0

+
+	/* configure MPLL */
+	clk_power->mpllcon = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
+
+	/* some delay between MPLL and UPLL */
+	pll_delay(500000);

You use udelay() below, do you need pll_delay() at all?

Quoted 233 lines

board/friendlyarm/mini2440/mini2440.c new file +66 -0

+
+	return 0;
+}
+
+/*
+ * Miscellaneous platform dependent initialisations
+ */
+int board_init(void)
+{
+	struct s3c24x0_clock_power * const clk_power =
+					s3c24x0_get_base_clock_power();
+	struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
+
+	/* to reduce PLL lock time, adjust the LOCKTIME register */
+	clk_power->locktime = 0xFFFFFF;
+	clk_power->clkdivn = CLKDIVN_VAL;
+
+	/* configure UPLL */
+	clk_power->upllcon = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
+	/* some delay between MPLL and UPLL */
+	udelay(10);
+	/* configure MPLL */
+	clk_power->mpllcon = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
+
+	/* some delay between MPLL and UPLL */
+	udelay(8000);
+
+	/* set up the I/O ports */
+	writel(0x007FFFFF, &gpio->gpacon);
+	writel(0x00044555, &gpio->gpbcon);
+	writel(0x000007FF, &gpio->gpbup);
+	writel(0xAAAAAAAA, &gpio->gpccon);
+	writel(0x0000FFFF, &gpio->gpcup);
+	writel(0xAAAAAAAA, &gpio->gpdcon);
+	writel(0x0000FFFF, &gpio->gpdup);
+	writel(0xAAAAAAAA, &gpio->gpecon);
+	writel(0x0000FFFF, &gpio->gpeup);
+	writel(0x000055AA, &gpio->gpfcon);
+	writel(0x000000FF, &gpio->gpfup);
+	writel(0xFF95FFBA, &gpio->gpgcon);
+	writel(0x0000FFFF, &gpio->gpgup);
+	writel(0x002AFAAA, &gpio->gphcon);
+	writel(0x000007FF, &gpio->gphup);
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_BOOT_PARAM_ADDR;
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->ram_size = PHYS_SDRAM_1_SIZE;
+	return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+#ifdef CONFIG_DRIVER_DM9000
+	return dm9000_initialize(bis);
+#else
+	return 0;
+#endif
+}
+
+/* The sum of all part_size[]s must equal to the NAND size, i.e.,

0x4000000 */ +unsigned int dynpart_size[] = { 0x40000, 0x20000, 0x500000, 0xffffffff, 0 }; +char *dynpart_names[] = { "u-boot", "u-boot_env", "kernel", "rootfs", NULL }; diff --git a/board/friendlyarm/mini2440/mini2440.h b/board/friendlyarm/mini2440/mini2440.h new file mode 100644 index 0000000..02197c8

board/friendlyarm/mini2440/mini2440.h new file +3 -0

@@ -0,0 +1,104 @@
+/*
+ * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
+ * Copyright (C) 2002 Samsung Electronics SW.LEE 

<[email protected]> + */

board/friendlyarm/mini2440/mini2440.h new file +100 -0

+
+#ifndef BOARD_LL_MINI2440_H
+#define BOARD_LL_MINI2440_H
+
+/*
+ * PLL/Clock configuration
+ */
+/* FCLK = 405 MHz, HCLK = 101 MHz, PCLK = 50 MHz, UCLK = 48 MHz */
+#define CLKDIVN_VAL	7
+#define M_MDIV		0x7f
+#define M_PDIV		0x2
+#define M_SDIV		0x1
+
+#define U_M_MDIV	0x38
+#define U_M_PDIV	0x2
+#define U_M_SDIV	0x2
+
+/* BWSCON */
+#define BWSCON	0x48000000
+#define DW8		(0x0)
+#define DW16	(0x1)
+#define DW32	(0x2)
+#define WAIT	(0x1<<2)
+#define UBLB	(0x1<<3)
+
+#define B1_BWSCON		(DW32)
+#define B2_BWSCON		(DW16)
+#define B3_BWSCON		(DW16 + WAIT + UBLB)
+#define B4_BWSCON		(DW16)
+#define B5_BWSCON		(DW16)
+#define B6_BWSCON		(DW32)
+#define B7_BWSCON		(DW32)
+
+/* BANK0CON */
+#define B0_Tacs		0x0	/*  0clk */
+#define B0_Tcos		0x0	/*  0clk */
+#define B0_Tacc		0x7	/* 14clk */
+#define B0_Tcoh		0x0	/*  0clk */
+#define B0_Tah		0x0	/*  0clk */
+#define B0_Tacp		0x0
+#define B0_PMC		0x0	/* normal */
+
+/* BANK1CON */
+#define B1_Tacs		0x0	/*  0clk */
+#define B1_Tcos		0x0	/*  0clk */
+#define B1_Tacc		0x7	/* 14clk */
+#define B1_Tcoh		0x0	/*  0clk */
+#define B1_Tah		0x0	/*  0clk */
+#define B1_Tacp		0x0
+#define B1_PMC		0x0
+
+#define B2_Tacs		0x0
+#define B2_Tcos		0x0
+#define B2_Tacc		0x7
+#define B2_Tcoh		0x0
+#define B2_Tah		0x0
+#define B2_Tacp		0x0
+#define B2_PMC		0x0
+
+#define B3_Tacs		0x0	/*  0clk */
+#define B3_Tcos		0x3	/*  4clk */
+#define B3_Tacc		0x7	/* 14clk */
+#define B3_Tcoh		0x1	/*  1clk */
+#define B3_Tah		0x0	/*  0clk */
+#define B3_Tacp		0x3     /*  6clk */
+#define B3_PMC		0x0	/* normal */
+
+#define B4_Tacs		0x0	/*  0clk */
+#define B4_Tcos		0x0	/*  0clk */
+#define B4_Tacc		0x7	/* 14clk */
+#define B4_Tcoh		0x0	/*  0clk */
+#define B4_Tah		0x0	/*  0clk */
+#define B4_Tacp		0x0
+#define B4_PMC		0x0	/* normal */
+
+#define B5_Tacs		0x0	/*  0clk */
+#define B5_Tcos		0x0	/*  0clk */
+#define B5_Tacc		0x7	/* 14clk */
+#define B5_Tcoh		0x0	/*  0clk */
+#define B5_Tah		0x0	/*  0clk */
+#define B5_Tacp		0x0
+#define B5_PMC		0x0	/* normal */
+
+#define B6_MT		0x3	/* SDRAM */
+#define B6_Trcd		0x1
+#define B6_SCAN		0x1	/* 9bit */
+
+#define B7_MT		0x3	/* SDRAM */
+#define B7_Trcd		0x1	/* 3clk */
+#define B7_SCAN		0x1	/* 9bit */
+
+/* REFRESH parameter */
+#define REFEN		0x1	/* Refresh enable */
+#define TREFMD		0x0	/* CBR(CAS before RAS)/Auto refresh */
+#define Trp			0x0	/* 2clk */
+#define Trc			0x3	/* 7clk */
+#define Tchr		0x2	/* 3clk */
+#define REFCNT		1113	/* period=15.6us, HCLK=60Mhz */
+
+#endif

boards.cfg +0 -0

index 3cf75c3..93eeb3c 100644
@@ -61,6 +61,7 @@ mx1ads                       arm         arm920t     -   
               - scb9328                      arm         arm920t     -   
               -              imx cm4008                       arm        

arm920t - - ks8695 cm41xx
arm arm920t - - ks8695
+mini2440 arm arm920t mini2440
friendlyarm s3c24x0 VCMA9 arm arm920t
vcma9 mpl s3c24x0 smdk2410
arm arm920t - samsung s3c24x0
omap1510inn arm arm925t -
ti diff --git a/include/configs/mini2440.h b/include/configs/mini2440.h new file mode 100644
index 0000000..a3f06d0

include/configs/mini2440.h new file +33 -0

@@ -0,0 +1,215 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <[email protected]>
+ * Gary Jennejohn <[email protected]>
+ * David Mueller <[email protected]>
+ *
+ * (C) Copyright 2009-2010
+ * Michel Pollet <[email protected]>
+ *
+ * (C) Copyright 2012
+ * Gabriel Huau <[email protected]>
+ *
+ * Configuation settings for the MINI2440 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */

include/configs/mini2440.h line 43

Quoted 10 lines

include/configs/mini2440.h new file +10 -0

+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_SYS_TEXT_BASE 0x0
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_ARM920T		1	/* This is an ARM920T Core	

*/

Quoted 61 lines

include/configs/mini2440.h new file +61 -0

+#define CONFIG_S3C24X0		1	/* in a SAMSUNG S3C2440 SoC */
+#define CONFIG_S3C2440		1	/* in a SAMSUNG S3C2440 SoC */
+#define CONFIG_MINI2440		1	/* on a MIN2440 Board       */
+
+#define	MACH_TYPE_MINI2440	1999
+#define	CONFIG_MACH_TYPE	MACH_TYPE_MINI2440
+
+/*
+ * It is possible to have u-boot save it's environment in NOR, however,
+ * reember it is incompatible with booting from NAND as the NOR is not
+ * available at that point. So use this only if you use nand as storage
+ * and will never boot from it
+ */
+#define CONFIG_MINI2440_NOR_ENV	1
+/* allow use of frequencies over 405Mhz */
+#define CONFIG_MINI2440_OVERCLOCK 1
+
+/*
+ * input clock of PLL
+ */
+/* MINI2440 has 12.0000MHz input clock */
+#define CONFIG_SYS_CLK_FREQ	12000000
+#define CONFIG_ARCH_CPU_INIT 1 /* for the initialization of PLL */
+
+#define USE_920T_MMU		1
+#define CONFIG_BAUDRATE		115200
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + 2048*1024)
+/* size in bytes reserved for initial data */
+#define CONFIG_GBL_DATA_SIZE	128
+
+/*
+ * Hardware drivers
+ */
+#define CONFIG_DRIVER_DM9000			1
+#define CONFIG_DRIVER_DM9000_NO_EEPROM	1
+#define CONFIG_DM9000_BASE				0x20000300
+#define DM9000_IO		CONFIG_DM9000_BASE
+#define DM9000_DATA		(CONFIG_DM9000_BASE+4)
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_S3C24X0_SERIAL
+#define CONFIG_SERIAL1			1
+
+/*
+ * allow to overwrite serial and ethaddr
+ */
+#define CONFIG_ENV_OVERWRITE
+
+/*
+ * Command definition
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PORTIO

include/configs/mini2440.h

Quoted 10 lines

include/configs/mini2440.h new file +10 -0

+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SAVES
+
+/*
+ * Miscellaneous configurable options
+ */
+#define	CONFIG_LONGHELP
+#define	CONFIG_SYS_PROMPT		"MINI2440 => "
+#define	CONFIG_SYS_CBSIZE		256
+#define	CONFIG_SYS_PBSIZE	

(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)

include/configs/mini2440.h

Quoted 5 lines

include/configs/mini2440.h new file +5 -0

+#define	CONFIG_SYS_MAXARGS		32
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_MEMTEST_START	0x30000000
+#define CONFIG_SYS_MEMTEST_END		0x34000000	/* 64MB in DRAM	

*/

Quoted 36 lines

include/configs/mini2440.h new file +35 -0

+
+/* everything, incl board info, in Hz */
+#undef  CONFIG_CLKS_IN_HZ
+
+/* default load address	*/
+#define	CONFIG_SYS_LOAD_ADDR		0x32000000
+
+/* boot parameters address */
+#define	CONFIG_BOOT_PARAM_ADDR		0x30000100
+
+/*
+ * the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need
+ * it to wrap 100 times (total 1562500) to get 1 sec.
+ */
+#define	CONFIG_SYS_HZ			1562500
+
+/*
+ * valid baudrates
+ */
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Stack sizes
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ	(8*1024)	/* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
+#endif
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS        1          /* we have 1 bank of DRAM

*/ +#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */

include/configs/mini2440.h

Quoted 3 lines

include/configs/mini2440.h new file +3 -0

+#define PHYS_SDRAM_1_SIZE           (64*1024*1024) /* 64MB of DRAM */
+#define CONFIG_SYS_SDRAM_BASE       PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x1000 

- \

Quoted 30 lines

include/configs/mini2440.h new file +5 -0

+							GENERATED_GBL_DATA_SIZE)
+
+/*
+ * When booting from NAND, it is impossible to access the lowest addresses
+ * due to the SteppingStone being in the way. Luckily the NOR doesn't

really + * care about the highest 16 bits of address, so we set the controlers + * registers to go and poke over there, instead.
+ */

include/configs/mini2440.h new file +22 -0

+#define PHYS_FLASH_1			0x0
+#define CONFIG_SYS_FLASH_BASE	0x0
+
+/*
+ * NOR FLASH organization
+ * Now uses the standard CFI interface
+ * FLASH and environment organization
+ */
+#define CONFIG_SYS_FLASH_CFI		1
+#define CONFIG_FLASH_CFI_DRIVER		1
+#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
+#define CONFIG_SYS_MONITOR_BASE		0x0
+/* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+/* 512 * 4096 sectors, or 32 * 64k blocks */
+#define CONFIG_SYS_MAX_FLASH_SECT	512
+#define CONFIG_FLASH_SHOW_PROGRESS	1
+
+/*
+ * u-boot environmnent
+ */
+#define CONFIG_BOOTDELAY	3

include/configs/mini2440.h line 194

Quoted 6 lines

include/configs/mini2440.h new file +6 -0

+#define CONFIG_BOOTARGS		"root=/dev/sdb1 console=ttySAC0,115200"
+#define CONFIG_NETMASK      255.255.255.0
+#define CONFIG_IPADDR		192.168.0.2
+#define CONFIG_SERVERIP		192.168.0.1
+#define CONFIG_DOS_PARTITION	1
+#define CONFIG_BOOTCOMMAND "tftp 0x32000000 uImage;bootm"

DROP THIS!

Quoted 21 lines

include/configs/mini2440.h new file +21 -0

+
+/*
+ * Config for NOR flash
+ */
+#define CONFIG_ENV_IS_IN_FLASH	1
+#define CONFIG_MY_ENV_OFFSET	0x40000
+/* addr of environment */
+#define CONFIG_ENV_ADDR		(PHYS_FLASH_1 + CONFIG_MY_ENV_OFFSET)
+/* 16k Total Size of Environment Sector */
+#define CONFIG_ENV_SIZE		0x4000
+
+#define CONFIG_PREBOOT_OVERRIDE	1
+
+/* ATAG configuration */
+#define CONFIG_INITRD_TAG			1
+#define CONFIG_SETUP_MEMORY_TAGS	1
+#define CONFIG_CMDLINE_TAG			1
+#define CONFIG_CMDLINE_EDITING		1
+#define CONFIG_AUTO_COMPLETE		1
+
+#endif	/* __CONFIG_H */

Quoted 171 lines

Dear Gabriel Huau,

Quoted 169 lines

---

Changes for v2:
- Coding style cleanup
- Remove unnecessary files modification
- Remove unnecessary board configuration set

Changes for v3:
- Coding style cleanup
- Move some macro definition from lowlevel_init.S to a new header
- Remove some "magic bloat" with I/O board initialization
- Add a pll_delay and replace loop by it
- Somme cleanup in the configuration file
- Cancel modifications on an SoC specific header
- Add my name to copyright

---

 board/friendlyarm/mini2440/Makefile        |   45 ++++++
 board/friendlyarm/mini2440/lowlevel_init.S |   76 ++++++++++
 board/friendlyarm/mini2440/mini2440.c      |  139 ++++++++++++++++++
 board/friendlyarm/mini2440/mini2440.h      |  104 ++++++++++++++
 boards.cfg                                 |    1 +
 include/configs/mini2440.h                 |  215

++++++++++++++++++++++++++++ 6 files changed, 580 insertions(+)

 create mode 100644 board/friendlyarm/mini2440/Makefile
 create mode 100644 board/friendlyarm/mini2440/lowlevel_init.S
 create mode 100644 board/friendlyarm/mini2440/mini2440.c
 create mode 100644 board/friendlyarm/mini2440/mini2440.h
 create mode 100644 include/configs/mini2440.h

(quoted diff) +0 -0

b/board/friendlyarm/mini2440/Makefile new file mode 100644 index 0000000..e8d68cb

board/friendlyarm/mini2440/Makefile new file +38 -0

@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2012
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS	:= mini2440.o
+SOBJS	:= lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+######################################################################

### +

board/friendlyarm/mini2440/Makefile new file +6 -0

+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+######################################################################

### diff --git a/board/friendlyarm/mini2440/lowlevel_init.S b/board/friendlyarm/mini2440/lowlevel_init.S new file mode 100644 index 0000000..f69a08c

board/friendlyarm/mini2440/lowlevel_init.S new file +4 -0

@@ -0,0 +1,76 @@
+/*
+ * Memory Setup stuff - taken from blob memsetup.S
+ *
+ * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw at its.tudelft.nl)

and + * Jan-Derk Bakker
(J.D.Bakker at its.tudelft.nl) + *
+ * Modified for the Samsung SMDK2410 by
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <[email protected]>
+ *
+ * (C) Copyright 2012
+ * Gabriel Huau <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */

board/friendlyarm/mini2440/lowlevel_init.S new file +32 -0

+
+#include <config.h>
+#include <version.h>
+#include "mini2440.h"
+
+_TEXT_BASE:
+	.word	CONFIG_SYS_TEXT_BASE
+
+.globl lowlevel_init
+lowlevel_init:
+	/* memory control configuration */
+	/* make r0 relative the current location so that it */
+	/* reads SMRDATA out of FLASH rather than memory ! */
+	ldr     r0, =SMRDATA
+	ldr	r1, _TEXT_BASE
+	sub	r0, r0, r1
+	ldr	r1, =BWSCON	/* Bus Width Status Controller */
+	add     r2, r0, #13*4
+0:
+	ldr     r3, [r0], #4
+	str     r3, [r1], #4
+	cmp     r2, r0
+	bne     0b
+
+	/* everything is fine now */
+	mov	pc, lr
+
+	.ltorg
+/* the literal pools origin */
+
+SMRDATA:
+    .word

(0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BW
SCO N<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28)) + .word
((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_
Tac p<<2)+(B0_PMC)) + .word
((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_
Tac p<<2)+(B1_PMC)) + .word
((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_
Tac p<<2)+(B2_PMC)) + .word
((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_
Tac p<<2)+(B3_PMC)) + .word
((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_
Tac p<<2)+(B4_PMC)) + .word
((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_ Tac p<<2)+(B5_PMC)) +
+ .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))

Quoted 8 lines

board/friendlyarm/mini2440/lowlevel_init.S line 76

Quoted 6 lines

board/friendlyarm/mini2440/lowlevel_init.S new file +2 -0

+    .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
+    .word

((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) + .word 0x32

board/friendlyarm/mini2440/lowlevel_init.S new file +2 -0

+    .word 0x30
+    .word 0x30

What this undocumented stuff?

SoC specific, I pasted it from smdk2410, it's for initialize the DRAM.

Quoted 71 lines

Quoted 71 lines

(quoted diff) +0 -0

b/board/friendlyarm/mini2440/mini2440.c new file mode 100644 index 0000000..9ba8d39

board/friendlyarm/mini2440/mini2440.c new file +65 -0

@@ -0,0 +1,139 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <[email protected]>
+ *
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <[email protected]>
+ *
+ * (C) Copyright 2009
+ * Michel Pollet <[email protected]>
+ *
+ * (C) Copyright 2012
+ * Gabriel Huau <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/s3c2440.h>
+#include <asm/io.h>
+#include <video_fb.h>
+#include "mini2440.h"
+
+#ifdef CONFIG_DRIVER_DM9000
+#include <netdev.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static inline void pll_delay(unsigned long loops)
+{
+	__asm__ volatile ("1:\n"
+	  "subs %0, %1, #1\n"
+	  "bne 1b" : "=r" (loops) : "0" (loops));
+}
+
+int arch_cpu_init(void)
+{
+	struct s3c24x0_clock_power * const clk_power =
+					s3c24x0_get_base_clock_power();
+
+	/* to reduce PLL lock time, adjust the LOCKTIME register */
+	clk_power->locktime = 0xFFFFFF;
+	clk_power->clkdivn = CLKDIVN_VAL;
+
+	/* configure UPLL */
+	clk_power->upllcon = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
+	/* some delay between MPLL and UPLL */
+	pll_delay(100000);

Quoted 8 lines

board/friendlyarm/mini2440/mini2440.c line 71

Quoted 6 lines

board/friendlyarm/mini2440/mini2440.c new file +6 -0

+
+	/* configure MPLL */
+	clk_power->mpllcon = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
+
+	/* some delay between MPLL and UPLL */
+	pll_delay(500000);

You use udelay() below, do you need pll_delay() at all?

Yes, because initialisation of PLL is done before timer_init(), so we can't use udelay().

Quoted 347 lines

Quoted 240 lines

board/friendlyarm/mini2440/mini2440.c new file +66 -0

+
+	return 0;
+}
+
+/*
+ * Miscellaneous platform dependent initialisations
+ */
+int board_init(void)
+{
+	struct s3c24x0_clock_power * const clk_power =
+					s3c24x0_get_base_clock_power();
+	struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
+
+	/* to reduce PLL lock time, adjust the LOCKTIME register */
+	clk_power->locktime = 0xFFFFFF;
+	clk_power->clkdivn = CLKDIVN_VAL;
+
+	/* configure UPLL */
+	clk_power->upllcon = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
+	/* some delay between MPLL and UPLL */
+	udelay(10);
+	/* configure MPLL */
+	clk_power->mpllcon = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
+
+	/* some delay between MPLL and UPLL */
+	udelay(8000);
+
+	/* set up the I/O ports */
+	writel(0x007FFFFF, &gpio->gpacon);
+	writel(0x00044555, &gpio->gpbcon);
+	writel(0x000007FF, &gpio->gpbup);
+	writel(0xAAAAAAAA, &gpio->gpccon);
+	writel(0x0000FFFF, &gpio->gpcup);
+	writel(0xAAAAAAAA, &gpio->gpdcon);
+	writel(0x0000FFFF, &gpio->gpdup);
+	writel(0xAAAAAAAA, &gpio->gpecon);
+	writel(0x0000FFFF, &gpio->gpeup);
+	writel(0x000055AA, &gpio->gpfcon);
+	writel(0x000000FF, &gpio->gpfup);
+	writel(0xFF95FFBA, &gpio->gpgcon);
+	writel(0x0000FFFF, &gpio->gpgup);
+	writel(0x002AFAAA, &gpio->gphcon);
+	writel(0x000007FF, &gpio->gphup);
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_BOOT_PARAM_ADDR;
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->ram_size = PHYS_SDRAM_1_SIZE;
+	return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+#ifdef CONFIG_DRIVER_DM9000
+	return dm9000_initialize(bis);
+#else
+	return 0;
+#endif
+}
+
+/* The sum of all part_size[]s must equal to the NAND size, i.e.,

0x4000000 */ +unsigned int dynpart_size[] = { 0x40000, 0x20000, 0x500000, 0xffffffff, 0 }; +char *dynpart_names[] = { "u-boot", "u-boot_env", "kernel", "rootfs", NULL }; diff --git a/board/friendlyarm/mini2440/mini2440.h b/board/friendlyarm/mini2440/mini2440.h new file mode 100644 index 0000000..02197c8

board/friendlyarm/mini2440/mini2440.h new file +3 -0

@@ -0,0 +1,104 @@
+/*
+ * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
+ * Copyright (C) 2002 Samsung Electronics SW.LEE

<[email protected]> + */

board/friendlyarm/mini2440/mini2440.h new file +100 -0

+
+#ifndef BOARD_LL_MINI2440_H
+#define BOARD_LL_MINI2440_H
+
+/*
+ * PLL/Clock configuration
+ */
+/* FCLK = 405 MHz, HCLK = 101 MHz, PCLK = 50 MHz, UCLK = 48 MHz */
+#define CLKDIVN_VAL	7
+#define M_MDIV		0x7f
+#define M_PDIV		0x2
+#define M_SDIV		0x1
+
+#define U_M_MDIV	0x38
+#define U_M_PDIV	0x2
+#define U_M_SDIV	0x2
+
+/* BWSCON */
+#define BWSCON	0x48000000
+#define DW8		(0x0)
+#define DW16	(0x1)
+#define DW32	(0x2)
+#define WAIT	(0x1<<2)
+#define UBLB	(0x1<<3)
+
+#define B1_BWSCON		(DW32)
+#define B2_BWSCON		(DW16)
+#define B3_BWSCON		(DW16 + WAIT + UBLB)
+#define B4_BWSCON		(DW16)
+#define B5_BWSCON		(DW16)
+#define B6_BWSCON		(DW32)
+#define B7_BWSCON		(DW32)
+
+/* BANK0CON */
+#define B0_Tacs		0x0	/*  0clk */
+#define B0_Tcos		0x0	/*  0clk */
+#define B0_Tacc		0x7	/* 14clk */
+#define B0_Tcoh		0x0	/*  0clk */
+#define B0_Tah		0x0	/*  0clk */
+#define B0_Tacp		0x0
+#define B0_PMC		0x0	/* normal */
+
+/* BANK1CON */
+#define B1_Tacs		0x0	/*  0clk */
+#define B1_Tcos		0x0	/*  0clk */
+#define B1_Tacc		0x7	/* 14clk */
+#define B1_Tcoh		0x0	/*  0clk */
+#define B1_Tah		0x0	/*  0clk */
+#define B1_Tacp		0x0
+#define B1_PMC		0x0
+
+#define B2_Tacs		0x0
+#define B2_Tcos		0x0
+#define B2_Tacc		0x7
+#define B2_Tcoh		0x0
+#define B2_Tah		0x0
+#define B2_Tacp		0x0
+#define B2_PMC		0x0
+
+#define B3_Tacs		0x0	/*  0clk */
+#define B3_Tcos		0x3	/*  4clk */
+#define B3_Tacc		0x7	/* 14clk */
+#define B3_Tcoh		0x1	/*  1clk */
+#define B3_Tah		0x0	/*  0clk */
+#define B3_Tacp		0x3     /*  6clk */
+#define B3_PMC		0x0	/* normal */
+
+#define B4_Tacs		0x0	/*  0clk */
+#define B4_Tcos		0x0	/*  0clk */
+#define B4_Tacc		0x7	/* 14clk */
+#define B4_Tcoh		0x0	/*  0clk */
+#define B4_Tah		0x0	/*  0clk */
+#define B4_Tacp		0x0
+#define B4_PMC		0x0	/* normal */
+
+#define B5_Tacs		0x0	/*  0clk */
+#define B5_Tcos		0x0	/*  0clk */
+#define B5_Tacc		0x7	/* 14clk */
+#define B5_Tcoh		0x0	/*  0clk */
+#define B5_Tah		0x0	/*  0clk */
+#define B5_Tacp		0x0
+#define B5_PMC		0x0	/* normal */
+
+#define B6_MT		0x3	/* SDRAM */
+#define B6_Trcd		0x1
+#define B6_SCAN		0x1	/* 9bit */
+
+#define B7_MT		0x3	/* SDRAM */
+#define B7_Trcd		0x1	/* 3clk */
+#define B7_SCAN		0x1	/* 9bit */
+
+/* REFRESH parameter */
+#define REFEN		0x1	/* Refresh enable */
+#define TREFMD		0x0	/* CBR(CAS before RAS)/Auto refresh */
+#define Trp			0x0	/* 2clk */
+#define Trc			0x3	/* 7clk */
+#define Tchr		0x2	/* 3clk */
+#define REFCNT		1113	/* period=15.6us, HCLK=60Mhz */
+
+#endif

boards.cfg +0 -1

index 3cf75c3..93eeb3c 100644
@@ -61,6 +61,7 @@ mx1ads                       arm         arm920t    
-
 
               - scb9328                      arm         arm920t     -
               -              imx cm4008                       arm
 

arm920t - - ks8695 cm41xx

arm arm920t - -
ks8695

+mini2440 arm arm920t mini2440
friendlyarm s3c24x0 VCMA9 arm arm920t

vcma9 mpl s3c24x0 smdk2410

arm arm920t - samsung s3c24x0
omap1510inn arm arm925t -
ti diff --git a/include/configs/mini2440.h b/include/configs/mini2440.h new file mode 100644
index 0000000..a3f06d0

include/configs/mini2440.h new file +33 -0

@@ -0,0 +1,215 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <[email protected]>
+ * Gary Jennejohn <[email protected]>
+ * David Mueller <[email protected]>
+ *
+ * (C) Copyright 2009-2010
+ * Michel Pollet <[email protected]>
+ *
+ * (C) Copyright 2012
+ * Gabriel Huau <[email protected]>
+ *
+ * Configuation settings for the MINI2440 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */

include/configs/mini2440.h line 43

Quoted 10 lines

include/configs/mini2440.h new file +10 -0

+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_SYS_TEXT_BASE 0x0
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_ARM920T		1	/* This is an ARM920T Core

*/

Quoted 61 lines

include/configs/mini2440.h new file +9 -0

+#define CONFIG_S3C24X0		1	/* in a SAMSUNG S3C2440 SoC */
+#define CONFIG_S3C2440		1	/* in a SAMSUNG S3C2440 SoC */
+#define CONFIG_MINI2440		1	/* on a MIN2440 Board       */
+
+#define	MACH_TYPE_MINI2440	1999
+#define	CONFIG_MACH_TYPE	MACH_TYPE_MINI2440
+
+/*
+ * It is possible to have u-boot save it's environment in NOR,

however, + * reember it is incompatible with booting from NAND as the NOR is not + * available at that point. So use this only if you use nand as storage + * and will never boot from it
+ */

include/configs/mini2440.h new file +48 -0

+#define CONFIG_MINI2440_NOR_ENV	1
+/* allow use of frequencies over 405Mhz */
+#define CONFIG_MINI2440_OVERCLOCK 1
+
+/*
+ * input clock of PLL
+ */
+/* MINI2440 has 12.0000MHz input clock */
+#define CONFIG_SYS_CLK_FREQ	12000000
+#define CONFIG_ARCH_CPU_INIT 1 /* for the initialization of PLL */
+
+#define USE_920T_MMU		1
+#define CONFIG_BAUDRATE		115200
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + 2048*1024)
+/* size in bytes reserved for initial data */
+#define CONFIG_GBL_DATA_SIZE	128
+
+/*
+ * Hardware drivers
+ */
+#define CONFIG_DRIVER_DM9000			1
+#define CONFIG_DRIVER_DM9000_NO_EEPROM	1
+#define CONFIG_DM9000_BASE				0x20000300
+#define DM9000_IO		CONFIG_DM9000_BASE
+#define DM9000_DATA		(CONFIG_DM9000_BASE+4)
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_S3C24X0_SERIAL
+#define CONFIG_SERIAL1			1
+
+/*
+ * allow to overwrite serial and ethaddr
+ */
+#define CONFIG_ENV_OVERWRITE
+
+/*
+ * Command definition
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PORTIO

include/configs/mini2440.h

Quoted 10 lines

include/configs/mini2440.h new file +10 -0

+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SAVES
+
+/*
+ * Miscellaneous configurable options
+ */
+#define	CONFIG_LONGHELP
+#define	CONFIG_SYS_PROMPT		"MINI2440 => "
+#define	CONFIG_SYS_CBSIZE		256
+#define	CONFIG_SYS_PBSIZE

(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)

include/configs/mini2440.h

Quoted 5 lines

include/configs/mini2440.h new file +5 -0

+#define	CONFIG_SYS_MAXARGS		32
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_MEMTEST_START	0x30000000
+#define CONFIG_SYS_MEMTEST_END		0x34000000	/* 64MB in DRAM

*/

Quoted 12 lines

include/configs/mini2440.h new file +12 -0

+
+/* everything, incl board info, in Hz */
+#undef  CONFIG_CLKS_IN_HZ
+
+/* default load address	*/
+#define	CONFIG_SYS_LOAD_ADDR		0x32000000
+
+/* boot parameters address */
+#define	CONFIG_BOOT_PARAM_ADDR		0x30000100
+
+/*
+ * the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need

Quoted 8 lines

include/configs/mini2440.h

Quoted 8 lines

+ * it to wrap 100 times (total 1562500) to get 1 sec.
+ */

include/configs/mini2440.h new file +6 -0

+#define	CONFIG_SYS_HZ			1562500
+
+/*
+ * valid baudrates
+ */
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 

Quoted 53 lines

Quoted 15 lines

} +

include/configs/mini2440.h new file +14 -0

+/*
+ * Stack sizes
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ	(8*1024)	/* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
+#endif
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS        1          /* we have 1 bank of

Quoted 4 lines

DRAM */ +#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank
#1 */ +#define PHYS_SDRAM_1_SIZE (64*1024*1024) /* 64MB of
DRAM */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000

- \

Quoted 31 lines

include/configs/mini2440.h new file +4 -0

+							GENERATED_GBL_DATA_SIZE)
+
+/*
+ * When booting from NAND, it is impossible to access the lowest

addresses + * due to the SteppingStone being in the way. Luckily the NOR doesn't really + * care about the highest 16 bits of address, so we set the controlers + * registers to go and poke over there, instead.
+ */

include/configs/mini2440.h new file +22 -0

+#define PHYS_FLASH_1			0x0
+#define CONFIG_SYS_FLASH_BASE	0x0
+
+/*
+ * NOR FLASH organization
+ * Now uses the standard CFI interface
+ * FLASH and environment organization
+ */
+#define CONFIG_SYS_FLASH_CFI		1
+#define CONFIG_FLASH_CFI_DRIVER		1
+#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
+#define CONFIG_SYS_MONITOR_BASE		0x0
+/* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+/* 512 * 4096 sectors, or 32 * 64k blocks */
+#define CONFIG_SYS_MAX_FLASH_SECT	512
+#define CONFIG_FLASH_SHOW_PROGRESS	1
+
+/*
+ * u-boot environmnent
+ */
+#define CONFIG_BOOTDELAY	3

Quoted 8 lines

include/configs/mini2440.h line 194

Quoted 6 lines

include/configs/mini2440.h new file +6 -0

+#define CONFIG_BOOTARGS		"root=/dev/sdb1 console=ttySAC0,115200"
+#define CONFIG_NETMASK      255.255.255.0
+#define CONFIG_IPADDR		192.168.0.2
+#define CONFIG_SERVERIP		192.168.0.1
+#define CONFIG_DOS_PARTITION	1
+#define CONFIG_BOOTCOMMAND "tftp 0x32000000 uImage;bootm"

DROP THIS!

ok :-)

Quoted 21 lines

Quoted 21 lines

include/configs/mini2440.h new file +21 -0

+
+/*
+ * Config for NOR flash
+ */
+#define CONFIG_ENV_IS_IN_FLASH	1
+#define CONFIG_MY_ENV_OFFSET	0x40000
+/* addr of environment */
+#define CONFIG_ENV_ADDR		(PHYS_FLASH_1 + CONFIG_MY_ENV_OFFSET)
+/* 16k Total Size of Environment Sector */
+#define CONFIG_ENV_SIZE		0x4000
+
+#define CONFIG_PREBOOT_OVERRIDE	1
+
+/* ATAG configuration */
+#define CONFIG_INITRD_TAG			1
+#define CONFIG_SETUP_MEMORY_TAGS	1
+#define CONFIG_CMDLINE_TAG			1
+#define CONFIG_CMDLINE_EDITING		1
+#define CONFIG_AUTO_COMPLETE		1
+
+#endif	/* __CONFIG_H */

Dear Gabriel Huau,

Quoted 181 lines · Marek Vasut

Quoted 179 lines

Dear Gabriel Huau,

Quoted 173 lines

---

Changes for v2:
- Coding style cleanup
- Remove unnecessary files modification
- Remove unnecessary board configuration set

Changes for v3:
- Coding style cleanup
- Move some macro definition from lowlevel_init.S to a new header
- Remove some "magic bloat" with I/O board initialization
- Add a pll_delay and replace loop by it
- Somme cleanup in the configuration file
- Cancel modifications on an SoC specific header
- Add my name to copyright

---

 board/friendlyarm/mini2440/Makefile        |   45 ++++++
 board/friendlyarm/mini2440/lowlevel_init.S |   76 ++++++++++
 board/friendlyarm/mini2440/mini2440.c      |  139 ++++++++++++++++++
 board/friendlyarm/mini2440/mini2440.h      |  104 ++++++++++++++
 boards.cfg                                 |    1 +
 include/configs/mini2440.h                 |  215

++++++++++++++++++++++++++++ 6 files changed, 580 insertions(+)

 create mode 100644 board/friendlyarm/mini2440/Makefile
 create mode 100644 board/friendlyarm/mini2440/lowlevel_init.S
 create mode 100644 board/friendlyarm/mini2440/mini2440.c
 create mode 100644 board/friendlyarm/mini2440/mini2440.h
 create mode 100644 include/configs/mini2440.h

(quoted diff) +0 -0

b/board/friendlyarm/mini2440/Makefile new file mode 100644 index 0000000..e8d68cb

board/friendlyarm/mini2440/Makefile new file +38 -0

@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2012
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS	:= mini2440.o
+SOBJS	:= lowlevel_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+######################################################################

### +

board/friendlyarm/mini2440/Makefile new file +6 -0

+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+######################################################################

### diff --git a/board/friendlyarm/mini2440/lowlevel_init.S b/board/friendlyarm/mini2440/lowlevel_init.S new file mode 100644 index 0000000..f69a08c

board/friendlyarm/mini2440/lowlevel_init.S new file +4 -0

@@ -0,0 +1,76 @@
+/*
+ * Memory Setup stuff - taken from blob memsetup.S
+ *
+ * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw at its.tudelft.nl)

and + * Jan-Derk Bakker
(J.D.Bakker at its.tudelft.nl) + *
+ * Modified for the Samsung SMDK2410 by
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <[email protected]>
+ *
+ * (C) Copyright 2012
+ * Gabriel Huau <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */

board/friendlyarm/mini2440/lowlevel_init.S new file +32 -0

+
+#include <config.h>
+#include <version.h>
+#include "mini2440.h"
+
+_TEXT_BASE:
+	.word	CONFIG_SYS_TEXT_BASE
+
+.globl lowlevel_init
+lowlevel_init:
+	/* memory control configuration */
+	/* make r0 relative the current location so that it */
+	/* reads SMRDATA out of FLASH rather than memory ! */
+	ldr     r0, =SMRDATA
+	ldr	r1, _TEXT_BASE
+	sub	r0, r0, r1
+	ldr	r1, =BWSCON	/* Bus Width Status Controller */
+	add     r2, r0, #13*4
+0:
+	ldr     r3, [r0], #4
+	str     r3, [r1], #4
+	cmp     r2, r0
+	bne     0b
+
+	/* everything is fine now */
+	mov	pc, lr
+
+	.ltorg
+/* the literal pools origin */
+
+SMRDATA:
+    .word

(0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BW
SCO N<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28)) + .word
((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_
Tac p<<2)+(B0_PMC)) + .word
((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_
Tac p<<2)+(B1_PMC)) + .word
((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_
Tac p<<2)+(B2_PMC)) + .word
((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_
Tac p<<2)+(B3_PMC)) + .word
((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_
Tac p<<2)+(B4_PMC)) + .word
((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_ Tac p<<2)+(B5_PMC)) +

board/friendlyarm/mini2440/lowlevel_init.S new file +3 -0

+    .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
+    .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
+    .word

((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) + .word 0x32

board/friendlyarm/mini2440/lowlevel_init.S line 76

Quoted 2 lines

board/friendlyarm/mini2440/lowlevel_init.S new file +2 -0

+    .word 0x30
+    .word 0x30

What this undocumented stuff?

Quoted 1 line

SoC specific, I pasted it from smdk2410, it's for initialize the DRAM.

Can't you init DRAM in some more fitting place? Also document this?

Quoted 80 lines

Quoted 79 lines

Quoted 67 lines

(quoted diff) +0 -0

b/board/friendlyarm/mini2440/mini2440.c new file mode 100644 index 0000000..9ba8d39

board/friendlyarm/mini2440/mini2440.c new file +61 -0

@@ -0,0 +1,139 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <[email protected]>
+ *
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG, <[email protected]>
+ *
+ * (C) Copyright 2009
+ * Michel Pollet <[email protected]>
+ *
+ * (C) Copyright 2012
+ * Gabriel Huau <[email protected]>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/s3c2440.h>
+#include <asm/io.h>
+#include <video_fb.h>
+#include "mini2440.h"
+
+#ifdef CONFIG_DRIVER_DM9000
+#include <netdev.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static inline void pll_delay(unsigned long loops)
+{
+	__asm__ volatile ("1:\n"
+	  "subs %0, %1, #1\n"
+	  "bne 1b" : "=r" (loops) : "0" (loops));
+}
+
+int arch_cpu_init(void)
+{
+	struct s3c24x0_clock_power * const clk_power =
+					s3c24x0_get_base_clock_power();
+
+	/* to reduce PLL lock time, adjust the LOCKTIME register */
+	clk_power->locktime = 0xFFFFFF;
+	clk_power->clkdivn = CLKDIVN_VAL;
+

board/friendlyarm/mini2440/mini2440.c line 71

Quoted 10 lines

board/friendlyarm/mini2440/mini2440.c new file +10 -0

+	/* configure UPLL */
+	clk_power->upllcon = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
+	/* some delay between MPLL and UPLL */
+	pll_delay(100000);
+
+	/* configure MPLL */
+	clk_power->mpllcon = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
+
+	/* some delay between MPLL and UPLL */
+	pll_delay(500000);

You use udelay() below, do you need pll_delay() at all?

Quoted 2 lines

Yes, because initialisation of PLL is done before timer_init(), so we can't use udelay().

Maybe fix the timer driver?

Quoted 347 lines

Quoted 347 lines

Quoted 240 lines

board/friendlyarm/mini2440/mini2440.c new file +66 -0

+
+	return 0;
+}
+
+/*
+ * Miscellaneous platform dependent initialisations
+ */
+int board_init(void)
+{
+	struct s3c24x0_clock_power * const clk_power =
+					s3c24x0_get_base_clock_power();
+	struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
+
+	/* to reduce PLL lock time, adjust the LOCKTIME register */
+	clk_power->locktime = 0xFFFFFF;
+	clk_power->clkdivn = CLKDIVN_VAL;
+
+	/* configure UPLL */
+	clk_power->upllcon = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);
+	/* some delay between MPLL and UPLL */
+	udelay(10);
+	/* configure MPLL */
+	clk_power->mpllcon = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);
+
+	/* some delay between MPLL and UPLL */
+	udelay(8000);
+
+	/* set up the I/O ports */
+	writel(0x007FFFFF, &gpio->gpacon);
+	writel(0x00044555, &gpio->gpbcon);
+	writel(0x000007FF, &gpio->gpbup);
+	writel(0xAAAAAAAA, &gpio->gpccon);
+	writel(0x0000FFFF, &gpio->gpcup);
+	writel(0xAAAAAAAA, &gpio->gpdcon);
+	writel(0x0000FFFF, &gpio->gpdup);
+	writel(0xAAAAAAAA, &gpio->gpecon);
+	writel(0x0000FFFF, &gpio->gpeup);
+	writel(0x000055AA, &gpio->gpfcon);
+	writel(0x000000FF, &gpio->gpfup);
+	writel(0xFF95FFBA, &gpio->gpgcon);
+	writel(0x0000FFFF, &gpio->gpgup);
+	writel(0x002AFAAA, &gpio->gphcon);
+	writel(0x000007FF, &gpio->gphup);
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = CONFIG_BOOT_PARAM_ADDR;
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->ram_size = PHYS_SDRAM_1_SIZE;
+	return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+#ifdef CONFIG_DRIVER_DM9000
+	return dm9000_initialize(bis);
+#else
+	return 0;
+#endif
+}
+
+/* The sum of all part_size[]s must equal to the NAND size, i.e.,

0x4000000 */ +unsigned int dynpart_size[] = { 0x40000, 0x20000, 0x500000, 0xffffffff, 0 }; +char *dynpart_names[] = { "u-boot", "u-boot_env", "kernel", "rootfs", NULL }; diff --git a/board/friendlyarm/mini2440/mini2440.h b/board/friendlyarm/mini2440/mini2440.h new file mode 100644 index 0000000..02197c8

board/friendlyarm/mini2440/mini2440.h new file +3 -0

@@ -0,0 +1,104 @@
+/*
+ * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
+ * Copyright (C) 2002 Samsung Electronics SW.LEE

<[email protected]> + */

board/friendlyarm/mini2440/mini2440.h new file +100 -0

+
+#ifndef BOARD_LL_MINI2440_H
+#define BOARD_LL_MINI2440_H
+
+/*
+ * PLL/Clock configuration
+ */
+/* FCLK = 405 MHz, HCLK = 101 MHz, PCLK = 50 MHz, UCLK = 48 MHz */
+#define CLKDIVN_VAL	7
+#define M_MDIV		0x7f
+#define M_PDIV		0x2
+#define M_SDIV		0x1
+
+#define U_M_MDIV	0x38
+#define U_M_PDIV	0x2
+#define U_M_SDIV	0x2
+
+/* BWSCON */
+#define BWSCON	0x48000000
+#define DW8		(0x0)
+#define DW16	(0x1)
+#define DW32	(0x2)
+#define WAIT	(0x1<<2)
+#define UBLB	(0x1<<3)
+
+#define B1_BWSCON		(DW32)
+#define B2_BWSCON		(DW16)
+#define B3_BWSCON		(DW16 + WAIT + UBLB)
+#define B4_BWSCON		(DW16)
+#define B5_BWSCON		(DW16)
+#define B6_BWSCON		(DW32)
+#define B7_BWSCON		(DW32)
+
+/* BANK0CON */
+#define B0_Tacs		0x0	/*  0clk */
+#define B0_Tcos		0x0	/*  0clk */
+#define B0_Tacc		0x7	/* 14clk */
+#define B0_Tcoh		0x0	/*  0clk */
+#define B0_Tah		0x0	/*  0clk */
+#define B0_Tacp		0x0
+#define B0_PMC		0x0	/* normal */
+
+/* BANK1CON */
+#define B1_Tacs		0x0	/*  0clk */
+#define B1_Tcos		0x0	/*  0clk */
+#define B1_Tacc		0x7	/* 14clk */
+#define B1_Tcoh		0x0	/*  0clk */
+#define B1_Tah		0x0	/*  0clk */
+#define B1_Tacp		0x0
+#define B1_PMC		0x0
+
+#define B2_Tacs		0x0
+#define B2_Tcos		0x0
+#define B2_Tacc		0x7
+#define B2_Tcoh		0x0
+#define B2_Tah		0x0
+#define B2_Tacp		0x0
+#define B2_PMC		0x0
+
+#define B3_Tacs		0x0	/*  0clk */
+#define B3_Tcos		0x3	/*  4clk */
+#define B3_Tacc		0x7	/* 14clk */
+#define B3_Tcoh		0x1	/*  1clk */
+#define B3_Tah		0x0	/*  0clk */
+#define B3_Tacp		0x3     /*  6clk */
+#define B3_PMC		0x0	/* normal */
+
+#define B4_Tacs		0x0	/*  0clk */
+#define B4_Tcos		0x0	/*  0clk */
+#define B4_Tacc		0x7	/* 14clk */
+#define B4_Tcoh		0x0	/*  0clk */
+#define B4_Tah		0x0	/*  0clk */
+#define B4_Tacp		0x0
+#define B4_PMC		0x0	/* normal */
+
+#define B5_Tacs		0x0	/*  0clk */
+#define B5_Tcos		0x0	/*  0clk */
+#define B5_Tacc		0x7	/* 14clk */
+#define B5_Tcoh		0x0	/*  0clk */
+#define B5_Tah		0x0	/*  0clk */
+#define B5_Tacp		0x0
+#define B5_PMC		0x0	/* normal */
+
+#define B6_MT		0x3	/* SDRAM */
+#define B6_Trcd		0x1
+#define B6_SCAN		0x1	/* 9bit */
+
+#define B7_MT		0x3	/* SDRAM */
+#define B7_Trcd		0x1	/* 3clk */
+#define B7_SCAN		0x1	/* 9bit */
+
+/* REFRESH parameter */
+#define REFEN		0x1	/* Refresh enable */
+#define TREFMD		0x0	/* CBR(CAS before RAS)/Auto refresh */
+#define Trp			0x0	/* 2clk */
+#define Trc			0x3	/* 7clk */
+#define Tchr		0x2	/* 3clk */
+#define REFCNT		1113	/* period=15.6us, HCLK=60Mhz */
+
+#endif

boards.cfg +0 -1

index 3cf75c3..93eeb3c 100644
@@ -61,6 +61,7 @@ mx1ads                       arm         arm920t    
-
 
               - scb9328                      arm         arm920t     -
               -              imx cm4008                       arm
 

arm920t - - ks8695 cm41xx

arm arm920t - -
ks8695

+mini2440 arm arm920t mini2440
friendlyarm s3c24x0 VCMA9 arm arm920t

vcma9 mpl s3c24x0 smdk2410

arm arm920t - samsung s3c24x0
omap1510inn arm arm925t -
ti diff --git a/include/configs/mini2440.h b/include/configs/mini2440.h new file mode 100644
index 0000000..a3f06d0

include/configs/mini2440.h new file +33 -0

@@ -0,0 +1,215 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <[email protected]>
+ * Gary Jennejohn <[email protected]>
+ * David Mueller <[email protected]>
+ *
+ * (C) Copyright 2009-2010
+ * Michel Pollet <[email protected]>
+ *
+ * (C) Copyright 2012
+ * Gabriel Huau <[email protected]>
+ *
+ * Configuation settings for the MINI2440 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */

include/configs/mini2440.h line 43

Quoted 10 lines

include/configs/mini2440.h new file +10 -0

+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_SYS_TEXT_BASE 0x0
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_ARM920T		1	/* This is an ARM920T Core

*/

Quoted 61 lines

include/configs/mini2440.h new file +9 -0

+#define CONFIG_S3C24X0		1	/* in a SAMSUNG S3C2440 SoC */
+#define CONFIG_S3C2440		1	/* in a SAMSUNG S3C2440 SoC */
+#define CONFIG_MINI2440		1	/* on a MIN2440 Board       */
+
+#define	MACH_TYPE_MINI2440	1999
+#define	CONFIG_MACH_TYPE	MACH_TYPE_MINI2440
+
+/*
+ * It is possible to have u-boot save it's environment in NOR,

however, + * reember it is incompatible with booting from NAND as the NOR is not + * available at that point. So use this only if you use nand as storage + * and will never boot from it
+ */

include/configs/mini2440.h new file +48 -0

+#define CONFIG_MINI2440_NOR_ENV	1
+/* allow use of frequencies over 405Mhz */
+#define CONFIG_MINI2440_OVERCLOCK 1
+
+/*
+ * input clock of PLL
+ */
+/* MINI2440 has 12.0000MHz input clock */
+#define CONFIG_SYS_CLK_FREQ	12000000
+#define CONFIG_ARCH_CPU_INIT 1 /* for the initialization of PLL */
+
+#define USE_920T_MMU		1
+#define CONFIG_BAUDRATE		115200
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + 2048*1024)
+/* size in bytes reserved for initial data */
+#define CONFIG_GBL_DATA_SIZE	128
+
+/*
+ * Hardware drivers
+ */
+#define CONFIG_DRIVER_DM9000			1
+#define CONFIG_DRIVER_DM9000_NO_EEPROM	1
+#define CONFIG_DM9000_BASE				0x20000300
+#define DM9000_IO		CONFIG_DM9000_BASE
+#define DM9000_DATA		(CONFIG_DM9000_BASE+4)
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_S3C24X0_SERIAL
+#define CONFIG_SERIAL1			1
+
+/*
+ * allow to overwrite serial and ethaddr
+ */
+#define CONFIG_ENV_OVERWRITE
+
+/*
+ * Command definition
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PORTIO

include/configs/mini2440.h

Quoted 10 lines

include/configs/mini2440.h new file +10 -0

+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SAVES
+
+/*
+ * Miscellaneous configurable options
+ */
+#define	CONFIG_LONGHELP
+#define	CONFIG_SYS_PROMPT		"MINI2440 => "
+#define	CONFIG_SYS_CBSIZE		256
+#define	CONFIG_SYS_PBSIZE

(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)

include/configs/mini2440.h

Quoted 5 lines

include/configs/mini2440.h new file +5 -0

+#define	CONFIG_SYS_MAXARGS		32
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
+#define CONFIG_SYS_MEMTEST_START	0x30000000
+#define CONFIG_SYS_MEMTEST_END		0x34000000	/* 64MB in DRAM

*/

Quoted 12 lines

include/configs/mini2440.h new file +12 -0

+
+/* everything, incl board info, in Hz */
+#undef  CONFIG_CLKS_IN_HZ
+
+/* default load address	*/
+#define	CONFIG_SYS_LOAD_ADDR		0x32000000
+
+/* boot parameters address */
+#define	CONFIG_BOOT_PARAM_ADDR		0x30000100
+
+/*
+ * the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need

Quoted 8 lines

Quoted 8 lines

include/configs/mini2440.h

Quoted 8 lines

+ * it to wrap 100 times (total 1562500) to get 1 sec.
+ */

include/configs/mini2440.h new file +6 -0

+#define	CONFIG_SYS_HZ			1562500
+
+/*
+ * valid baudrates
+ */
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 

115200

Quoted 85 lines

Quoted 53 lines

Quoted 15 lines

} +

include/configs/mini2440.h new file +14 -0

+/*
+ * Stack sizes
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ	(8*1024)	/* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
+#endif
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS        1          /* we have 1 bank of

Quoted 4 lines

DRAM */ +#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank
#1 */ +#define PHYS_SDRAM_1_SIZE (64*1024*1024) /* 64MB of
DRAM */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000

- \

Quoted 31 lines

include/configs/mini2440.h new file +4 -0

+							GENERATED_GBL_DATA_SIZE)
+
+/*
+ * When booting from NAND, it is impossible to access the lowest

addresses + * due to the SteppingStone being in the way. Luckily the NOR doesn't really + * care about the highest 16 bits of address, so we set the controlers + * registers to go and poke over there, instead.
+ */

include/configs/mini2440.h new file +22 -0

+#define PHYS_FLASH_1			0x0
+#define CONFIG_SYS_FLASH_BASE	0x0
+
+/*
+ * NOR FLASH organization
+ * Now uses the standard CFI interface
+ * FLASH and environment organization
+ */
+#define CONFIG_SYS_FLASH_CFI		1
+#define CONFIG_FLASH_CFI_DRIVER		1
+#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
+#define CONFIG_SYS_MONITOR_BASE		0x0
+/* max number of memory banks */
+#define CONFIG_SYS_MAX_FLASH_BANKS	1
+/* 512 * 4096 sectors, or 32 * 64k blocks */
+#define CONFIG_SYS_MAX_FLASH_SECT	512
+#define CONFIG_FLASH_SHOW_PROGRESS	1
+
+/*
+ * u-boot environmnent
+ */
+#define CONFIG_BOOTDELAY	3

Quoted 8 lines

include/configs/mini2440.h line 194

Quoted 6 lines

include/configs/mini2440.h new file +6 -0

+#define CONFIG_BOOTARGS		"root=/dev/sdb1 console=ttySAC0,115200"
+#define CONFIG_NETMASK      255.255.255.0
+#define CONFIG_IPADDR		192.168.0.2
+#define CONFIG_SERVERIP		192.168.0.1
+#define CONFIG_DOS_PARTITION	1
+#define CONFIG_BOOTCOMMAND "tftp 0x32000000 uImage;bootm"

DROP THIS!

ok :-)

Quoted 21 lines

Quoted 21 lines

include/configs/mini2440.h new file +21 -0

+
+/*
+ * Config for NOR flash
+ */
+#define CONFIG_ENV_IS_IN_FLASH	1
+#define CONFIG_MY_ENV_OFFSET	0x40000
+/* addr of environment */
+#define CONFIG_ENV_ADDR		(PHYS_FLASH_1 + CONFIG_MY_ENV_OFFSET)
+/* 16k Total Size of Environment Sector */
+#define CONFIG_ENV_SIZE		0x4000
+
+#define CONFIG_PREBOOT_OVERRIDE	1
+
+/* ATAG configuration */
+#define CONFIG_INITRD_TAG			1
+#define CONFIG_SETUP_MEMORY_TAGS	1
+#define CONFIG_CMDLINE_TAG			1
+#define CONFIG_CMDLINE_EDITING		1
+#define CONFIG_AUTO_COMPLETE		1
+
+#endif	/* __CONFIG_H */