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drm/nv40: allocate ctxprog with kmalloc

PATCH New Marcin Slusarz 1 participant 1 message Nov 11, 2012

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DRM drivers DRM misc nouveau
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Marcin Slusarz

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PATCH 1/1 drm/nv40: allocate ctxprog with kmalloc

Some archs defconfigs have CONFIG_FRAME_WARN set to 1024, which lead to this warning:
drivers/gpu/drm/nouveau/core/engine/graph/ctxnv40.c: warning: the frame size of 1184 bytes is larger than 1024 bytes

Reported-by Geert Uytterhoeven <[email protected]>
Signed-off-by Marcin Slusarz <[email protected]>
---
 drivers/gpu/drm/nouveau/core/engine/graph/ctxnv40.c | 12 +++++++++---
 drivers/gpu/drm/nouveau/core/engine/graph/nv40.c    |  4 +++-
 drivers/gpu/drm/nouveau/core/engine/graph/nv40.h    |  2 +-
 3 files changed, 13 insertions(+), 5 deletions(-)
drivers/gpu/drm/nouveau/core/engine/graph/ctxnv40.c +9 -3
index e45035e..7bbb1e1 100644
@@ -669,21 +669,27 @@ nv40_grctx_fill(struct nouveau_device *device, struct nouveau_gpuobj *mem)
 			   });
 }
 
-void
+int
 nv40_grctx_init(struct nouveau_device *device, u32 *size)
 {
-	u32 ctxprog[256], i;
+	u32 *ctxprog = kmalloc(256 * 4, GFP_KERNEL), i;
 	struct nouveau_grctx ctx = {
 		.device = device,
 		.mode = NOUVEAU_GRCTX_PROG,
 		.data = ctxprog,
-		.ctxprog_max = ARRAY_SIZE(ctxprog)
+		.ctxprog_max = 256,
 	};
 
+	if (!ctxprog)
+		return -ENOMEM;
+
 	nv40_grctx_generate(&ctx);
 
 	nv_wr32(device, 0x400324, 0);
 	for (i = 0; i < ctx.ctxprog_len; i++)
 		nv_wr32(device, 0x400328, ctxprog[i]);
 	*size = ctx.ctxvals_pos * 4;
+
+	kfree(ctxprog);
+	return 0;
 }
drivers/gpu/drm/nouveau/core/engine/graph/nv40.c +3 -1
index a3742db..0052f09 100644
@@ -374,7 +374,9 @@ nv40_graph_init(struct nouveau_object *object)
 		return ret;
 
 	/* generate and upload context program */
-	nv40_grctx_init(nv_device(priv), &priv->size);
+	ret = nv40_grctx_init(nv_device(priv), &priv->size);
+	if (ret)
+		return ret;
 
 	/* No context present currently */
 	nv_wr32(priv, NV40_PGRAPH_CTXCTL_CUR, 0x00000000);
drivers/gpu/drm/nouveau/core/engine/graph/nv40.h +1 -1
index d2ac975..7da35a4 100644
@@ -15,7 +15,7 @@ nv44_graph_class(void *priv)
 	return !(0x0baf & (1 << (device->chipset & 0x0f)));
 }
 
-void nv40_grctx_init(struct nouveau_device *, u32 *size);
+int  nv40_grctx_init(struct nouveau_device *, u32 *size);
 void nv40_grctx_fill(struct nouveau_device *, struct nouveau_gpuobj *);
 
 #endif
Signature · 1 line
1.7.12