x86/cpu changes for v3.8

GIT PULL Ingo Molnar 1 participant 1 message Dec 11, 2012 x86

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Ingo Molnar

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2012-12-11 10:51 UTC #0 lore raw

Linus,

Please pull the latest x86-cpu-for-linus git tree from:

git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-cpu-for-linus

HEAD: 27d3a8a26ada7660116fdd6830096008c063ee96 x86, cacheinfo: Base cache sharing info on CPUID 0x8000001d on AMD

These changes improve topology discovery on AMD CPUs.

Right now this feeds information displayed in /sys/devices/system/cpu/cpuX/cache/indexY/* - but in the future we could use this to set up a better scheduling topology.

Thanks,

Ingo

------------------>
Andreas Herrmann (4):

      x86: Add cpu_has_topoext
      x86, cacheinfo: Determine number of cache leafs using CPUID 0x8000001d on AMD
      x86, cacheinfo: Make use of CPUID 0x8000001d for cache information on AMD
      x86, cacheinfo: Base cache sharing info on CPUID 0x8000001d on AMD

 arch/x86/include/asm/cpufeature.h     |  1 +
 arch/x86/include/asm/processor.h      |  2 +-
 arch/x86/kernel/cpu/amd.c             |  9 +----
 arch/x86/kernel/cpu/intel_cacheinfo.c | 75 +++++++++++++++++++++++++----------
 arch/x86/kernel/smpboot.c             |  2 +-
 5 files changed, 60 insertions(+), 29 deletions(-)

arch/x86/include/asm/cpufeature.h +1 -0

index 8c297aa..c22a492 100644
@@ -311,6 +311,7 @@ extern const char * const x86_power_flags[32];
 #define cpu_has_cx8		boot_cpu_has(X86_FEATURE_CX8)
 #define cpu_has_cx16		boot_cpu_has(X86_FEATURE_CX16)
 #define cpu_has_eager_fpu	boot_cpu_has(X86_FEATURE_EAGER_FPU)
+#define cpu_has_topoext		boot_cpu_has(X86_FEATURE_TOPOEXT)
 
 #if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64)
 # define cpu_has_invlpg		1

arch/x86/include/asm/processor.h +1 -1

index ad1fc85..db0d8c3 100644
@@ -187,7 +187,7 @@ extern void print_cpu_info(struct cpuinfo_x86 *);
 void print_cpu_msr(struct cpuinfo_x86 *);
 extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c);
 extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
-extern unsigned short num_cache_leaves;
+extern void init_amd_cacheinfo(struct cpuinfo_x86 *c);
 
 extern void detect_extended_topology(struct cpuinfo_x86 *c);
 extern void detect_ht(struct cpuinfo_x86 *c);

arch/x86/kernel/cpu/amd.c +2 -7

index f7e98a2..a8538e6 100644
@@ -304,7 +304,7 @@ static void __cpuinit amd_get_topology(struct cpuinfo_x86 *c)
 	int cpu = smp_processor_id();
 
 	/* get information required for multi-node processors */
-	if (cpu_has(c, X86_FEATURE_TOPOEXT)) {
+	if (cpu_has_topoext) {
 		u32 eax, ebx, ecx, edx;
 
 		cpuid(0x8000001e, &eax, &ebx, &ecx, &edx);

@@ -643,12 +643,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
 	detect_ht(c);
 #endif
 
-	if (c->extended_cpuid_level >= 0x80000006) {
-		if (cpuid_edx(0x80000006) & 0xf000)
-			num_cache_leaves = 4;
-		else
-			num_cache_leaves = 3;
-	}
+	init_amd_cacheinfo(c);
 
 	if (c->x86 >= 0xf)
 		set_cpu_cap(c, X86_FEATURE_K8);

arch/x86/kernel/cpu/intel_cacheinfo.c +55 ~~-20~~

127 lines not on this page · raw message

arch/x86/kernel/smpboot.c +1 -1

index c80a33b..732bf5c 100644
@@ -313,7 +313,7 @@ do {									\
 
 static bool __cpuinit match_smt(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
 {
-	if (cpu_has(c, X86_FEATURE_TOPOEXT)) {
+	if (cpu_has_topoext) {
 		int cpu1 = c->cpu_index, cpu2 = o->cpu_index;
 
 		if (c->phys_proc_id == o->phys_proc_id &&