x86/timers changes for v3.8

GIT PULL Ingo Molnar 1 participant 1 message Dec 11, 2012

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Documentation x86 Hpet: x86

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Ingo Molnar

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2012-12-11 11:20 UTC #0 lore raw

Linus,

Please pull the latest x86-timers-for-linus git tree from:

git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86-timers-for-linus

HEAD: 5074b85bdd3a464efe7b6de2ec163f4c07696a20 x86: hpet: Fix inverted return value check in arch_setup_hpet_msi()

This tree includes HPET fixes and also implements a calibration-free, TSC match driven APIC timer interrupt mode:
"TSC deadline mode" supported in SandyBridge and later CPUs.

Thanks,

Ingo

------------------>
Jan Beulich (2):
x86: hpet: Fix masking of MSI interrupts
x86: hpet: Fix inverted return value check in arch_setup_hpet_msi()

Suresh Siddha (1):
x86: apic: Use tsc deadline for oneshot when available

 Documentation/kernel-parameters.txt |  4 ++
 arch/x86/include/asm/msr-index.h    |  2 +
 arch/x86/kernel/apic/apic.c         | 73 +++++++++++++++++++++++++++----------
 arch/x86/kernel/apic/io_apic.c      |  5 ++-
 arch/x86/kernel/hpet.c              |  4 +-
 5 files changed, 64 insertions(+), 24 deletions(-)

Documentation/kernel-parameters.txt +4 -0

index 9776f06..4aa9ca0 100644
@@ -1304,6 +1304,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
 	lapic		[X86-32,APIC] Enable the local APIC even if BIOS
 			disabled it.
 
+	lapic=		[x86,APIC] "notscdeadline" Do not use TSC deadline
+			value for LAPIC timer one-shot implementation. Default
+			back to the programmable timer unit in the LAPIC.
+
 	lapic_timer_c2_ok	[X86,APIC] trust the local apic timer
 			in C2 power state.

arch/x86/include/asm/msr-index.h +2 -0

index 7f0edce..e400cdb 100644
@@ -337,6 +337,8 @@
 #define MSR_IA32_MISC_ENABLE_TURBO_DISABLE	(1ULL << 38)
 #define MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE	(1ULL << 39)
 
+#define MSR_IA32_TSC_DEADLINE		0x000006E0
+
 /* P4/Xeon+ specific */
 #define MSR_IA32_MCG_EAX		0x00000180
 #define MSR_IA32_MCG_EBX		0x00000181

arch/x86/kernel/apic/apic.c +53 ~~-20~~

133 lines not on this page · raw message

arch/x86/kernel/apic/io_apic.c +3 -2

index 1817fa9..b134f0b 100644
@@ -3317,8 +3317,9 @@ int arch_setup_hpet_msi(unsigned int irq, unsigned int id)
 	int ret;
 
 	if (irq_remapping_enabled) {
-		if (!setup_hpet_msi_remapped(irq, id))
-			return -1;
+		ret = setup_hpet_msi_remapped(irq, id);
+		if (ret)
+			return ret;
 	}
 
 	ret = msi_compose_msg(NULL, irq, &msg, id);

arch/x86/kernel/hpet.c +2 -2

index 1460a5d..e28670f 100644
@@ -434,7 +434,7 @@ void hpet_msi_unmask(struct irq_data *data)
 
 	/* unmask it */
 	cfg = hpet_readl(HPET_Tn_CFG(hdev->num));
-	cfg |= HPET_TN_FSB;
+	cfg |= HPET_TN_ENABLE | HPET_TN_FSB;
 	hpet_writel(cfg, HPET_Tn_CFG(hdev->num));
 }

@@ -445,7 +445,7 @@ void hpet_msi_mask(struct irq_data *data)
 
 	/* mask it */
 	cfg = hpet_readl(HPET_Tn_CFG(hdev->num));
-	cfg &= ~HPET_TN_FSB;
+	cfg &= ~(HPET_TN_ENABLE | HPET_TN_FSB);
 	hpet_writel(cfg, HPET_Tn_CFG(hdev->num));
 }